From eda3dd00760039493fa2afc00193aa47b6ce8c58 Mon Sep 17 00:00:00 2001 From: Chris Forbes Date: Tue, 9 Sep 2014 21:28:46 +1200 Subject: i965: Add device limits for tess threads & URB entries This should cover all platforms prior to Skylake. Signed-off-by: Chris Forbes Signed-off-by: Kenneth Graunke Acked-by: Ben Widawsky --- src/mesa/drivers/dri/i965/brw_context.c | 4 ++++ src/mesa/drivers/dri/i965/brw_context.h | 4 ++++ src/mesa/drivers/dri/i965/brw_device_info.c | 36 +++++++++++++++++++++++++++++ src/mesa/drivers/dri/i965/brw_device_info.h | 4 ++++ 4 files changed, 48 insertions(+) (limited to 'src') diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c index e20da0b8ef8..50b138720d8 100644 --- a/src/mesa/drivers/dri/i965/brw_context.c +++ b/src/mesa/drivers/dri/i965/brw_context.c @@ -811,11 +811,15 @@ brwCreateContext(gl_api api, brw_init_surface_formats(brw); brw->max_vs_threads = devinfo->max_vs_threads; + brw->max_hs_threads = devinfo->max_hs_threads; + brw->max_ds_threads = devinfo->max_ds_threads; brw->max_gs_threads = devinfo->max_gs_threads; brw->max_wm_threads = devinfo->max_wm_threads; brw->urb.size = devinfo->urb.size; brw->urb.min_vs_entries = devinfo->urb.min_vs_entries; brw->urb.max_vs_entries = devinfo->urb.max_vs_entries; + brw->urb.max_hs_entries = devinfo->urb.max_hs_entries; + brw->urb.max_ds_entries = devinfo->urb.max_ds_entries; brw->urb.max_gs_entries = devinfo->urb.max_gs_entries; /* Estimate the size of the mappable aperture into the GTT. There's an diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index 4e722087faf..197ed3e6dc6 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -1192,6 +1192,8 @@ struct brw_context * for each pipeline stage. */ int max_vs_threads; + int max_hs_threads; + int max_ds_threads; int max_gs_threads; int max_wm_threads; @@ -1207,6 +1209,8 @@ struct brw_context GLuint min_vs_entries; /* Minimum number of VS entries */ GLuint max_vs_entries; /* Maximum number of VS entries */ + GLuint max_hs_entries; /* Maximum number of HS entries */ + GLuint max_ds_entries; /* Maximum number of DS entries */ GLuint max_gs_entries; /* Maximum number of GS entries */ GLuint nr_vs_entries; diff --git a/src/mesa/drivers/dri/i965/brw_device_info.c b/src/mesa/drivers/dri/i965/brw_device_info.c index 3c3c5643af2..ec4e22ed927 100644 --- a/src/mesa/drivers/dri/i965/brw_device_info.c +++ b/src/mesa/drivers/dri/i965/brw_device_info.c @@ -113,12 +113,16 @@ static const struct brw_device_info brw_device_info_ivb_gt1 = { GEN7_FEATURES, .is_ivybridge = true, .gt = 1, .needs_unlit_centroid_workaround = true, .max_vs_threads = 36, + .max_hs_threads = 36, + .max_ds_threads = 36, .max_gs_threads = 36, .max_wm_threads = 48, .urb = { .size = 128, .min_vs_entries = 32, .max_vs_entries = 512, + .max_hs_entries = 32, + .max_ds_entries = 288, .max_gs_entries = 192, }, }; @@ -127,12 +131,16 @@ static const struct brw_device_info brw_device_info_ivb_gt2 = { GEN7_FEATURES, .is_ivybridge = true, .gt = 2, .needs_unlit_centroid_workaround = true, .max_vs_threads = 128, + .max_hs_threads = 128, + .max_ds_threads = 128, .max_gs_threads = 128, .max_wm_threads = 172, .urb = { .size = 256, .min_vs_entries = 32, .max_vs_entries = 704, + .max_hs_entries = 64, + .max_ds_entries = 448, .max_gs_entries = 320, }, }; @@ -142,12 +150,16 @@ static const struct brw_device_info brw_device_info_byt = { .needs_unlit_centroid_workaround = true, .has_llc = false, .max_vs_threads = 36, + .max_hs_threads = 36, + .max_ds_threads = 36, .max_gs_threads = 36, .max_wm_threads = 48, .urb = { .size = 128, .min_vs_entries = 32, .max_vs_entries = 512, + .max_hs_entries = 32, + .max_ds_entries = 288, .max_gs_entries = 192, }, }; @@ -155,12 +167,16 @@ static const struct brw_device_info brw_device_info_byt = { static const struct brw_device_info brw_device_info_hsw_gt1 = { GEN7_FEATURES, .is_haswell = true, .gt = 1, .max_vs_threads = 70, + .max_hs_threads = 70, + .max_ds_threads = 70, .max_gs_threads = 70, .max_wm_threads = 102, .urb = { .size = 128, .min_vs_entries = 32, .max_vs_entries = 640, + .max_hs_entries = 64, + .max_ds_entries = 384, .max_gs_entries = 256, }, }; @@ -168,12 +184,16 @@ static const struct brw_device_info brw_device_info_hsw_gt1 = { static const struct brw_device_info brw_device_info_hsw_gt2 = { GEN7_FEATURES, .is_haswell = true, .gt = 2, .max_vs_threads = 280, + .max_hs_threads = 256, + .max_ds_threads = 280, .max_gs_threads = 256, .max_wm_threads = 204, .urb = { .size = 256, .min_vs_entries = 64, .max_vs_entries = 1664, + .max_hs_entries = 128, + .max_ds_entries = 960, .max_gs_entries = 640, }, }; @@ -181,12 +201,16 @@ static const struct brw_device_info brw_device_info_hsw_gt2 = { static const struct brw_device_info brw_device_info_hsw_gt3 = { GEN7_FEATURES, .is_haswell = true, .gt = 3, .max_vs_threads = 280, + .max_hs_threads = 256, + .max_ds_threads = 280, .max_gs_threads = 256, .max_wm_threads = 408, .urb = { .size = 512, .min_vs_entries = 64, .max_vs_entries = 1664, + .max_hs_entries = 128, + .max_ds_entries = 960, .max_gs_entries = 640, }, }; @@ -198,6 +222,8 @@ static const struct brw_device_info brw_device_info_hsw_gt3 = { .has_llc = true, \ .has_pln = true, \ .max_vs_threads = 504, \ + .max_hs_threads = 504, \ + .max_ds_threads = 504, \ .max_gs_threads = 504, \ .max_wm_threads = 384 \ @@ -207,6 +233,8 @@ static const struct brw_device_info brw_device_info_bdw_gt1 = { .size = 192, .min_vs_entries = 64, .max_vs_entries = 2560, + .max_hs_entries = 504, + .max_ds_entries = 1536, .max_gs_entries = 960, } }; @@ -217,6 +245,8 @@ static const struct brw_device_info brw_device_info_bdw_gt2 = { .size = 384, .min_vs_entries = 64, .max_vs_entries = 2560, + .max_hs_entries = 504, + .max_ds_entries = 1536, .max_gs_entries = 960, } }; @@ -227,6 +257,8 @@ static const struct brw_device_info brw_device_info_bdw_gt3 = { .size = 384, .min_vs_entries = 64, .max_vs_entries = 2560, + .max_hs_entries = 504, + .max_ds_entries = 1536, .max_gs_entries = 960, } }; @@ -238,12 +270,16 @@ static const struct brw_device_info brw_device_info_chv = { GEN8_FEATURES, .is_cherryview = 1, .gt = 1, .has_llc = false, .max_vs_threads = 80, + .max_hs_threads = 80, + .max_ds_threads = 80, .max_gs_threads = 80, .max_wm_threads = 128, .urb = { .size = 128, .min_vs_entries = 34, .max_vs_entries = 640, + .max_hs_entries = 80, + .max_ds_entries = 384, .max_gs_entries = 256, } }; diff --git a/src/mesa/drivers/dri/i965/brw_device_info.h b/src/mesa/drivers/dri/i965/brw_device_info.h index e506beb9360..7c9f5d0ff4c 100644 --- a/src/mesa/drivers/dri/i965/brw_device_info.h +++ b/src/mesa/drivers/dri/i965/brw_device_info.h @@ -66,6 +66,8 @@ struct brw_device_info * @{ */ unsigned max_vs_threads; + unsigned max_hs_threads; + unsigned max_ds_threads; unsigned max_gs_threads; unsigned max_wm_threads; @@ -73,6 +75,8 @@ struct brw_device_info unsigned size; unsigned min_vs_entries; unsigned max_vs_entries; + unsigned max_hs_entries; + unsigned max_ds_entries; unsigned max_gs_entries; } urb; /** @} */ -- cgit v1.2.3