From eb0d3e8a90df3f6a39a3ffc911a335554fc8cd98 Mon Sep 17 00:00:00 2001 From: Marek Olšák Date: Sat, 7 Nov 2015 16:30:01 +0100 Subject: gallium/radeon: shorten render_cond variable names MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit and ..._cond -> ..._invert Reviewed-by: Nicolai Hähnle --- src/gallium/drivers/r600/r600_state_common.c | 2 +- src/gallium/drivers/radeon/r600_pipe_common.h | 6 +++--- src/gallium/drivers/radeon/r600_query.c | 14 +++++++------- src/gallium/drivers/radeon/r600_texture.c | 2 +- src/gallium/drivers/radeonsi/si_state_draw.c | 2 +- 5 files changed, 13 insertions(+), 13 deletions(-) (limited to 'src') diff --git a/src/gallium/drivers/r600/r600_state_common.c b/src/gallium/drivers/r600/r600_state_common.c index 5cf520899cf..d629194ca6e 100644 --- a/src/gallium/drivers/r600/r600_state_common.c +++ b/src/gallium/drivers/r600/r600_state_common.c @@ -1478,7 +1478,7 @@ static void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info struct pipe_draw_info info = *dinfo; struct pipe_index_buffer ib = {}; struct radeon_winsys_cs *cs = rctx->b.gfx.cs; - bool render_cond_bit = rctx->b.current_render_cond && !rctx->b.render_cond_force_off; + bool render_cond_bit = rctx->b.render_cond && !rctx->b.render_cond_force_off; uint64_t mask; if (!info.indirect && !info.count && (info.indexed || !info.count_from_stream_output)) { diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h index ba9000f74ec..ebe633b9125 100644 --- a/src/gallium/drivers/radeon/r600_pipe_common.h +++ b/src/gallium/drivers/radeon/r600_pipe_common.h @@ -418,9 +418,9 @@ struct r600_common_context { /* Render condition. */ struct r600_atom render_cond_atom; - struct pipe_query *current_render_cond; - unsigned current_render_cond_mode; - boolean current_render_cond_cond; + struct pipe_query *render_cond; + unsigned render_cond_mode; + boolean render_cond_invert; bool render_cond_force_off; /* for u_blitter */ /* MSAA sample locations. diff --git a/src/gallium/drivers/radeon/r600_query.c b/src/gallium/drivers/radeon/r600_query.c index 9f92587a54b..8c2b601a96c 100644 --- a/src/gallium/drivers/radeon/r600_query.c +++ b/src/gallium/drivers/radeon/r600_query.c @@ -307,7 +307,7 @@ static void r600_emit_query_predication(struct r600_common_context *ctx, struct r600_atom *atom) { struct radeon_winsys_cs *cs = ctx->gfx.cs; - struct r600_query *query = (struct r600_query*)ctx->current_render_cond; + struct r600_query *query = (struct r600_query*)ctx->render_cond; struct r600_query_buffer *qbuf; uint32_t op; bool flag_wait; @@ -315,8 +315,8 @@ static void r600_emit_query_predication(struct r600_common_context *ctx, if (!query) return; - flag_wait = ctx->current_render_cond_mode == PIPE_RENDER_COND_WAIT || - ctx->current_render_cond_mode == PIPE_RENDER_COND_BY_REGION_WAIT; + flag_wait = ctx->render_cond_mode == PIPE_RENDER_COND_WAIT || + ctx->render_cond_mode == PIPE_RENDER_COND_BY_REGION_WAIT; switch (query->type) { case PIPE_QUERY_OCCLUSION_COUNTER: @@ -335,7 +335,7 @@ static void r600_emit_query_predication(struct r600_common_context *ctx, } /* if true then invert, see GL_ARB_conditional_render_inverted */ - if (ctx->current_render_cond_cond) + if (ctx->render_cond_invert) op |= PREDICATION_DRAW_NOT_VISIBLE; /* Draw if not visable/overflow */ else op |= PREDICATION_DRAW_VISIBLE; /* Draw if visable/overflow */ @@ -831,9 +831,9 @@ static void r600_render_condition(struct pipe_context *ctx, struct r600_query_buffer *qbuf; struct r600_atom *atom = &rctx->render_cond_atom; - rctx->current_render_cond = query; - rctx->current_render_cond_cond = condition; - rctx->current_render_cond_mode = mode; + rctx->render_cond = query; + rctx->render_cond_invert = condition; + rctx->render_cond_mode = mode; /* Compute the size of SET_PREDICATION packets. */ atom->num_dw = 0; diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c index edfdfe33187..3126cce8c22 100644 --- a/src/gallium/drivers/radeon/r600_texture.c +++ b/src/gallium/drivers/radeon/r600_texture.c @@ -1324,7 +1324,7 @@ void evergreen_do_fast_color_clear(struct r600_common_context *rctx, { int i; - if (rctx->current_render_cond) + if (rctx->render_cond) return; for (i = 0; i < fb->nr_cbufs; i++) { diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c index 79e88765d04..753abc8c103 100644 --- a/src/gallium/drivers/radeonsi/si_state_draw.c +++ b/src/gallium/drivers/radeonsi/si_state_draw.c @@ -457,7 +457,7 @@ static void si_emit_draw_packets(struct si_context *sctx, { struct radeon_winsys_cs *cs = sctx->b.gfx.cs; unsigned sh_base_reg = sctx->shader_userdata.sh_base[PIPE_SHADER_VERTEX]; - bool render_cond_bit = sctx->b.current_render_cond && !sctx->b.render_cond_force_off; + bool render_cond_bit = sctx->b.render_cond && !sctx->b.render_cond_force_off; if (info->count_from_stream_output) { struct r600_so_target *t = -- cgit v1.2.3