From d6333af7e9b01d0e878ddbb92b5f972c67f5350f Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Thu, 15 May 2008 20:38:41 +1000 Subject: r500: default rsunit swizzle like fglrx --- src/mesa/drivers/dri/r300/r300_cmdbuf.c | 8 ++++++++ src/mesa/drivers/dri/r300/r300_state.c | 9 ++++++--- 2 files changed, 14 insertions(+), 3 deletions(-) (limited to 'src') diff --git a/src/mesa/drivers/dri/r300/r300_cmdbuf.c b/src/mesa/drivers/dri/r300/r300_cmdbuf.c index 8596b466409..7ddb1a946e8 100644 --- a/src/mesa/drivers/dri/r300/r300_cmdbuf.c +++ b/src/mesa/drivers/dri/r300/r300_cmdbuf.c @@ -297,6 +297,7 @@ void r300InitCmdBuf(r300ContextPtr r300) int size, mtu; int has_tcl = 1; int is_r500 = 0; + int i; if (!(r300->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL)) has_tcl = 0; @@ -396,6 +397,13 @@ void r300InitCmdBuf(r300ContextPtr r300) if (is_r500) { ALLOC_STATE(ri, always, R500_RI_CMDSIZE, 0); r300->hw.ri.cmd[R300_RI_CMD_0] = cmdpacket0(R500_RS_IP_0, 16); + for (i = 0; i < 8; i++) { + r300->hw.ri.cmd[R300_RI_CMD_0 + i +1] = + (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_S_SHIFT) | + (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_T_SHIFT) | + (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_R_SHIFT) | + (R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT); + } ALLOC_STATE(rr, variable, R300_RR_CMDSIZE, 0); r300->hw.rr.cmd[R300_RR_CMD_0] = cmdpacket0(R500_RS_INST_0, 1); } else { diff --git a/src/mesa/drivers/dri/r300/r300_state.c b/src/mesa/drivers/dri/r300/r300_state.c index 006c2808c58..175c3859156 100644 --- a/src/mesa/drivers/dri/r300/r300_state.c +++ b/src/mesa/drivers/dri/r300/r300_state.c @@ -1716,7 +1716,6 @@ static void r500SetupRSUnit(GLcontext * ctx) else count = VB->AttribPtr[_TNL_ATTRIB_TEX(i)]->size; - swiz = 0; /* always have a least 2 tex coords */ swiz |= in_texcoords++ << R500_RS_IP_TEX_PTR_S_SHIFT; swiz |= in_texcoords++ << R500_RS_IP_TEX_PTR_T_SHIFT; @@ -1731,8 +1730,12 @@ static void r500SetupRSUnit(GLcontext * ctx) else swiz |= R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT; - - } + } else + swiz = (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_S_SHIFT) | + (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_T_SHIFT) | + (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_R_SHIFT) | + (R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT); + r300->hw.ri.cmd[R300_RI_INTERP_0 + i] = interp_col[i] | swiz; r300->hw.rr.cmd[R300_RR_INST_0 + fp_reg] = 0; -- cgit v1.2.3