From d2eecf0b0b24d203d0f171807681dffd830d54de Mon Sep 17 00:00:00 2001 From: Jason Ekstrand Date: Mon, 18 Dec 2017 11:29:14 -0800 Subject: intel/compiler/icl: Clear "null render target" bit in extended message descriptor Otherwise all our render target writes go no where. Reviewed-by: Matt Turner Reviewed-by: Kenneth Graunke --- src/intel/compiler/brw_eu_emit.c | 3 +++ src/intel/compiler/brw_inst.h | 3 +++ 2 files changed, 6 insertions(+) (limited to 'src') diff --git a/src/intel/compiler/brw_eu_emit.c b/src/intel/compiler/brw_eu_emit.c index f039af56d05..ee5a048bcaa 100644 --- a/src/intel/compiler/brw_eu_emit.c +++ b/src/intel/compiler/brw_eu_emit.c @@ -536,6 +536,9 @@ brw_set_dp_write_message(struct brw_codegen *p, if (devinfo->gen < 7) { brw_inst_set_dp_write_commit(devinfo, insn, send_commit_msg); } + + if (devinfo->gen >= 11) + brw_inst_set_null_rt(devinfo, insn, false); } void diff --git a/src/intel/compiler/brw_inst.h b/src/intel/compiler/brw_inst.h index e6998973b64..8663c1b7f5b 100644 --- a/src/intel/compiler/brw_inst.h +++ b/src/intel/compiler/brw_inst.h @@ -505,6 +505,9 @@ FF(sfid, /* 6: */ 27, 24, /* 7: */ 27, 24, /* 8: */ 27, 24) +FF(null_rt, + /* 4-7: */ -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + /* 8: */ 80, 80) /* actually only Gen11+ */ FC(base_mrf, 27, 24, devinfo->gen < 6); /** @} */ -- cgit v1.2.3