From c380973a9564be57acdae5ab6c6a9efcb72cf6c9 Mon Sep 17 00:00:00 2001 From: Jordan Justen Date: Sat, 30 Aug 2014 19:57:39 -0700 Subject: i965/fs: Support compute programs in fs_visitor v2: * Clean out some unneeded code copied from run_fs (krh) * Always use NIR * Split shader time out into a separate commit Signed-off-by: Jordan Justen Reviewed-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_context.c | 2 + src/mesa/drivers/dri/i965/brw_fs.cpp | 61 ++++++++++++++++++++++++++-- src/mesa/drivers/dri/i965/brw_fs.h | 10 +++++ src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 23 +++++++++++ 4 files changed, 93 insertions(+), 3 deletions(-) (limited to 'src') diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c index 0f2f9ad7d34..24edf6117a2 100644 --- a/src/mesa/drivers/dri/i965/brw_context.c +++ b/src/mesa/drivers/dri/i965/brw_context.c @@ -594,6 +594,8 @@ brw_initialize_context_constants(struct brw_context *brw) if (brw_env_var_as_boolean("INTEL_USE_NIR", true)) ctx->Const.ShaderCompilerOptions[MESA_SHADER_FRAGMENT].NirOptions = &nir_options; + ctx->Const.ShaderCompilerOptions[MESA_SHADER_COMPUTE].NirOptions = &nir_options; + /* ARB_viewport_array */ if (brw->gen >= 7 && ctx->API == API_OPENGL_CORE) { ctx->Const.MaxViewports = GEN7_NUM_VIEWPORTS; diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index ed86e0b291c..5878e7feee6 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp @@ -1719,9 +1719,15 @@ fs_visitor::assign_curb_setup() if (dispatch_width == 8) { prog_data->dispatch_grf_start_reg = payload.num_regs; } else { - assert(stage == MESA_SHADER_FRAGMENT); - brw_wm_prog_data *prog_data = (brw_wm_prog_data*) this->prog_data; - prog_data->dispatch_grf_start_reg_16 = payload.num_regs; + if (stage == MESA_SHADER_FRAGMENT) { + brw_wm_prog_data *prog_data = (brw_wm_prog_data*) this->prog_data; + prog_data->dispatch_grf_start_reg_16 = payload.num_regs; + } else if (stage == MESA_SHADER_COMPUTE) { + brw_cs_prog_data *prog_data = (brw_cs_prog_data*) this->prog_data; + prog_data->dispatch_grf_start_reg_16 = payload.num_regs; + } else { + unreachable("Unsupported shader type!"); + } } prog_data->curb_read_length = ALIGN(stage_prog_data->nr_params, 8) / 8; @@ -3776,6 +3782,14 @@ fs_visitor::setup_vs_payload() payload.num_regs = 2; } +void +fs_visitor::setup_cs_payload() +{ + assert(brw->gen >= 7); + + payload.num_regs = 1; +} + void fs_visitor::assign_binding_table_offsets() { @@ -4113,6 +4127,47 @@ fs_visitor::run_fs() return !failed; } +bool +fs_visitor::run_cs() +{ + assert(stage == MESA_SHADER_COMPUTE); + assert(shader); + + sanity_param_count = prog->Parameters->NumParameters; + + assign_common_binding_table_offsets(0); + + setup_cs_payload(); + + emit_nir_code(); + + if (failed) + return false; + + emit_cs_terminate(); + + calculate_cfg(); + + optimize(); + + assign_curb_setup(); + + fixup_3src_null_dest(); + allocate_registers(); + + if (failed) + return false; + + /* If any state parameters were appended, then ParameterValues could have + * been realloced, in which case the driver uniform storage set up by + * _mesa_associate_uniform_storage() would point to freed memory. Make + * sure that didn't happen. + */ + assert(sanity_param_count == prog->Parameters->NumParameters); + + return !failed; +} + const unsigned * brw_wm_fs_emit(struct brw_context *brw, void *mem_ctx, diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h index 4adde66b6fd..1b85a8b7824 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.h +++ b/src/mesa/drivers/dri/i965/brw_fs.h @@ -89,6 +89,14 @@ public: struct gl_vertex_program *cp, unsigned dispatch_width); + fs_visitor(struct brw_context *brw, + void *mem_ctx, + const struct brw_cs_prog_key *key, + struct brw_cs_prog_data *prog_data, + struct gl_shader_program *shader_prog, + struct gl_compute_program *cp, + unsigned dispatch_width); + ~fs_visitor(); void init(); @@ -189,12 +197,14 @@ public: bool run_fs(); bool run_vs(); + bool run_cs(); void optimize(); void allocate_registers(); void assign_binding_table_offsets(); void setup_payload_gen4(); void setup_payload_gen6(); void setup_vs_payload(); + void setup_cs_payload(); void fixup_3src_null_dest(); void assign_curb_setup(); void calculate_urb_setup(); diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp index 01d4cbd1ac7..eba188c3844 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp @@ -39,6 +39,7 @@ #include "brw_context.h" #include "brw_eu.h" #include "brw_wm.h" +#include "brw_cs.h" #include "brw_vec4.h" #include "brw_fs.h" #include "main/uniforms.h" @@ -4237,6 +4238,25 @@ fs_visitor::fs_visitor(struct brw_context *brw, init(); } +fs_visitor::fs_visitor(struct brw_context *brw, + void *mem_ctx, + const struct brw_cs_prog_key *key, + struct brw_cs_prog_data *prog_data, + struct gl_shader_program *shader_prog, + struct gl_compute_program *cp, + unsigned dispatch_width) + : backend_visitor(brw, shader_prog, &cp->Base, &prog_data->base, + MESA_SHADER_COMPUTE), + reg_null_f(retype(brw_null_vec(dispatch_width), BRW_REGISTER_TYPE_F)), + reg_null_d(retype(brw_null_vec(dispatch_width), BRW_REGISTER_TYPE_D)), + reg_null_ud(retype(brw_null_vec(dispatch_width), BRW_REGISTER_TYPE_UD)), + key(key), prog_data(&prog_data->base), + dispatch_width(dispatch_width) +{ + this->mem_ctx = mem_ctx; + init(); +} + void fs_visitor::init() { @@ -4248,6 +4268,9 @@ fs_visitor::init() case MESA_SHADER_GEOMETRY: key_tex = &((const brw_vue_prog_key *) key)->tex; break; + case MESA_SHADER_COMPUTE: + key_tex = &((const brw_cs_prog_key*) key)->tex; + break; default: unreachable("unhandled shader stage"); } -- cgit v1.2.3