From 80ea18d1a184606bd3cf6e90296e129f0c7f100e Mon Sep 17 00:00:00 2001 From: Chris Forbes Date: Tue, 9 Sep 2014 21:25:00 +1200 Subject: i965: Add backend structures for tess stages Signed-off-by: Chris Forbes Reviewed-by: Kenneth Graunke Reviewed-by: Matt Turner --- src/mesa/drivers/dri/i965/brw_compiler.h | 18 ++++++++++++ src/mesa/drivers/dri/i965/brw_context.c | 2 ++ src/mesa/drivers/dri/i965/brw_context.h | 44 ++++++++++++++++++++++++++++ src/mesa/drivers/dri/i965/brw_draw.c | 4 +++ src/mesa/drivers/dri/i965/brw_program.c | 22 ++++++++++++++ src/mesa/drivers/dri/i965/brw_state_upload.c | 8 +++++ 6 files changed, 98 insertions(+) (limited to 'src') diff --git a/src/mesa/drivers/dri/i965/brw_compiler.h b/src/mesa/drivers/dri/i965/brw_compiler.h index 1ee01eb0661..b2251bfd7a8 100644 --- a/src/mesa/drivers/dri/i965/brw_compiler.h +++ b/src/mesa/drivers/dri/i965/brw_compiler.h @@ -548,6 +548,24 @@ struct brw_vs_prog_data { bool uses_instanceid; }; +struct brw_tcs_prog_data +{ + struct brw_vue_prog_data base; + + /** Number vertices in output patch */ + int instances; +}; + + +struct brw_tes_prog_data +{ + struct brw_vue_prog_data base; + + enum brw_tess_partitioning partitioning; + enum brw_tess_output_topology output_topology; + enum brw_tess_domain domain; +}; + struct brw_gs_prog_data { struct brw_vue_prog_data base; diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c index d51d1018e21..7d7643ca66b 100644 --- a/src/mesa/drivers/dri/i965/brw_context.c +++ b/src/mesa/drivers/dri/i965/brw_context.c @@ -764,6 +764,8 @@ brwCreateContext(gl_api api, brw->has_swizzling = screen->hw_has_swizzling; brw->vs.base.stage = MESA_SHADER_VERTEX; + brw->tcs.base.stage = MESA_SHADER_TESS_CTRL; + brw->tes.base.stage = MESA_SHADER_TESS_EVAL; brw->gs.base.stage = MESA_SHADER_GEOMETRY; brw->wm.base.stage = MESA_SHADER_FRAGMENT; if (brw->gen >= 8) { diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index c4bbd80612c..4db3a3225f1 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -110,6 +110,12 @@ extern "C" { * enabled, it first passes them to a VS thread which is a good place * for the driver to implement any active vertex shader. * + * HS - Hull Shader (Tessellation Control Shader) + * + * TE - Tessellation Engine (Tessellation Primitive Generation) + * + * DS - Domain Shader (Tessellation Evaluation Shader) + * * GS - Geometry Shader. This corresponds to a new DX10 concept. If * enabled, incoming strips etc are passed to GS threads in individual * line/triangle/point units. The GS thread may perform arbitary @@ -304,6 +310,20 @@ struct brw_vertex_program { }; +/** Subclass of Mesa tessellation control program */ +struct brw_tess_ctrl_program { + struct gl_tess_ctrl_program program; + unsigned id; /**< serial no. to identify tess ctrl progs, never re-used */ +}; + + +/** Subclass of Mesa tessellation evaluation program */ +struct brw_tess_eval_program { + struct gl_tess_eval_program program; + unsigned id; /**< serial no. to identify tess eval progs, never re-used */ +}; + + /** Subclass of Mesa geometry program */ struct brw_geometry_program { struct gl_geometry_program program; @@ -938,6 +958,8 @@ struct brw_context */ const struct gl_vertex_program *vertex_program; const struct gl_geometry_program *geometry_program; + const struct gl_tess_ctrl_program *tess_ctrl_program; + const struct gl_tess_eval_program *tess_eval_program; const struct gl_fragment_program *fragment_program; const struct gl_compute_program *compute_program; @@ -1027,6 +1049,28 @@ struct brw_context struct brw_vs_prog_data *prog_data; } vs; + struct { + struct brw_stage_state base; + struct brw_tcs_prog_data *prog_data; + + /** + * True if the 3DSTATE_HS command most recently emitted to the 3D + * pipeline enabled the HS; false otherwise. + */ + bool enabled; + } tcs; + + struct { + struct brw_stage_state base; + struct brw_tes_prog_data *prog_data; + + /** + * True if the 3DSTATE_DS command most recently emitted to the 3D + * pipeline enabled the DS; false otherwise. + */ + bool enabled; + } tes; + struct { struct brw_stage_state base; struct brw_gs_prog_data *prog_data; diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c index f250208c11f..c08272f572d 100644 --- a/src/mesa/drivers/dri/i965/brw_draw.c +++ b/src/mesa/drivers/dri/i965/brw_draw.c @@ -425,6 +425,10 @@ brw_try_draw_prims(struct gl_context *ctx, _mesa_fls(ctx->FragmentProgram._Current->Base.SamplersUsed); brw->gs.base.sampler_count = ctx->GeometryProgram._Current ? _mesa_fls(ctx->GeometryProgram._Current->Base.SamplersUsed) : 0; + brw->tes.base.sampler_count = ctx->TessEvalProgram._Current ? + _mesa_fls(ctx->TessEvalProgram._Current->Base.SamplersUsed) : 0; + brw->tcs.base.sampler_count = ctx->TessCtrlProgram._Current ? + _mesa_fls(ctx->TessCtrlProgram._Current->Base.SamplersUsed) : 0; brw->vs.base.sampler_count = _mesa_fls(ctx->VertexProgram._Current->Base.SamplersUsed); diff --git a/src/mesa/drivers/dri/i965/brw_program.c b/src/mesa/drivers/dri/i965/brw_program.c index e7f4f80bdc8..20d4e0d6c4a 100644 --- a/src/mesa/drivers/dri/i965/brw_program.c +++ b/src/mesa/drivers/dri/i965/brw_program.c @@ -95,6 +95,28 @@ static struct gl_program *brwNewProgram( struct gl_context *ctx, } } + case GL_TESS_CONTROL_PROGRAM_NV: { + struct brw_tess_ctrl_program *prog = CALLOC_STRUCT(brw_tess_ctrl_program); + if (prog) { + prog->id = get_new_program_id(brw->intelScreen); + + return _mesa_init_gl_program(&prog->program.Base, target, id); + } else { + return NULL; + } + } + + case GL_TESS_EVALUATION_PROGRAM_NV: { + struct brw_tess_eval_program *prog = CALLOC_STRUCT(brw_tess_eval_program); + if (prog) { + prog->id = get_new_program_id(brw->intelScreen); + + return _mesa_init_gl_program(&prog->program.Base, target, id); + } else { + return NULL; + } + } + case GL_COMPUTE_PROGRAM_NV: { struct brw_compute_program *prog = CALLOC_STRUCT(brw_compute_program); if (prog) { diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c index 49dd0b612fd..a724c8b7652 100644 --- a/src/mesa/drivers/dri/i965/brw_state_upload.c +++ b/src/mesa/drivers/dri/i965/brw_state_upload.c @@ -722,6 +722,14 @@ brw_upload_pipeline_state(struct brw_context *brw, brw->ctx.NewDriverState |= BRW_NEW_FRAGMENT_PROGRAM; } + if (brw->tess_eval_program != ctx->TessEvalProgram._Current) { + brw->tess_eval_program = ctx->TessEvalProgram._Current; + } + + if (brw->tess_ctrl_program != ctx->TessCtrlProgram._Current) { + brw->tess_ctrl_program = ctx->TessCtrlProgram._Current; + } + if (brw->geometry_program != ctx->GeometryProgram._Current) { brw->geometry_program = ctx->GeometryProgram._Current; brw->ctx.NewDriverState |= BRW_NEW_GEOMETRY_PROGRAM; -- cgit v1.2.3