From 8036809799c453b02f4c8fedbb5faaeb19af90c2 Mon Sep 17 00:00:00 2001 From: Ilia Mirkin Date: Sat, 8 Apr 2017 14:56:16 -0400 Subject: nvc0: increase texture buffer object alignment to 256 for pre-GM107 We currently don't pass the low byte of the address via the surface info, so in order to work with images, these have to implicitly be aligned to 256. The proprietary driver also doesn't go out of its way to provide lower alignment. Fixes GL45-CTS.texture_buffer.texture_buffer_texture_buffer_range Signed-off-by: Ilia Mirkin Cc: mesa-stable@lists.freedesktop.org Reviewed-by: Samuel Pitoiset --- src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src') diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c index 7ef9bf9c9cf..da5561f53a5 100644 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c @@ -147,7 +147,7 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT: return 256; case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT: - if (class_3d < NVE4_3D_CLASS) + if (class_3d < GM107_3D_CLASS) return 256; /* IMAGE bindings require alignment to 256 */ return 16; case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT: -- cgit v1.2.3