From 68a77411e1ba81e72b8c174158fa7b162ecf9d69 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Thu, 19 Jan 2017 13:26:01 +1000 Subject: radv: emit vertex shader to correct hw block. This emits the shader to the ES block in the correct case. Reviewed-by: Bas Nieuwenhuizen Signed-off-by: Dave Airlie --- src/amd/vulkan/radv_cmd_buffer.c | 21 ++++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-) (limited to 'src') diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index f7f0ce06564..3d1542d4663 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -516,6 +516,22 @@ radv_emit_hw_vs(struct radv_cmd_buffer *cmd_buffer, S_028AB4_REUSE_OFF(shader->info.vs.writes_viewport_index)); } +static void +radv_emit_hw_es(struct radv_cmd_buffer *cmd_buffer, + struct radv_shader_variant *shader) +{ + struct radeon_winsys *ws = cmd_buffer->device->ws; + uint64_t va = ws->buffer_get_va(shader->bo); + + ws->cs_add_buffer(cmd_buffer->cs, shader->bo, 8); + + radeon_set_sh_reg_seq(cmd_buffer->cs, R_00B320_SPI_SHADER_PGM_LO_ES, 4); + radeon_emit(cmd_buffer->cs, va >> 8); + radeon_emit(cmd_buffer->cs, va >> 40); + radeon_emit(cmd_buffer->cs, shader->rsrc1); + radeon_emit(cmd_buffer->cs, shader->rsrc2); +} + static void radv_emit_vertex_shader(struct radv_cmd_buffer *cmd_buffer, struct radv_pipeline *pipeline) @@ -526,7 +542,10 @@ radv_emit_vertex_shader(struct radv_cmd_buffer *cmd_buffer, vs = pipeline->shaders[MESA_SHADER_VERTEX]; - radv_emit_hw_vs(cmd_buffer, pipeline, vs); + if (vs->info.vs.as_es) + radv_emit_hw_es(cmd_buffer, vs); + else + radv_emit_hw_vs(cmd_buffer, pipeline, vs); radeon_set_context_reg(cmd_buffer->cs, R_028A84_VGT_PRIMITIVEID_EN, 0); } -- cgit v1.2.3