From 65b2df3ec8906c51ae5b28df9c0b2c71981080d0 Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Tue, 13 May 2014 21:06:00 -0700 Subject: i965/fs: Replace c->key with a direct reference in fs_visitor. 'c' is going away. This is also shorter. Marking the key pointer as const will also deter people from changing it in fs_visitor, as it's absolutely not OK to modify it there. Signed-off-by: Kenneth Graunke Reviewed-by: Chris Forbes --- src/mesa/drivers/dri/i965/brw_fs.cpp | 26 ++++++------ src/mesa/drivers/dri/i965/brw_fs.h | 1 + src/mesa/drivers/dri/i965/brw_fs_fp.cpp | 2 +- src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 59 ++++++++++++++-------------- src/mesa/drivers/dri/i965/brw_wm_iz.cpp | 8 ++-- 5 files changed, 49 insertions(+), 47 deletions(-) (limited to 'src') diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index d083789b933..6fc92b46490 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp @@ -1031,7 +1031,7 @@ fs_visitor::emit_fragcoord_interpolation(ir_variable *ir) { fs_reg *reg = new(this->mem_ctx) fs_reg(this, ir->type); fs_reg wpos = *reg; - bool flip = !ir->data.origin_upper_left ^ c->key.render_to_fbo; + bool flip = !ir->data.origin_upper_left ^ key->render_to_fbo; /* gl_FragCoord.x */ if (ir->data.pixel_center_integer) { @@ -1050,7 +1050,7 @@ fs_visitor::emit_fragcoord_interpolation(ir_variable *ir) if (flip) { pixel_y.negate = true; - offset += c->key.drawable_height - 1.0; + offset += key->drawable_height - 1.0; } emit(ADD(wpos, pixel_y, fs_reg(offset))); @@ -1131,7 +1131,7 @@ fs_visitor::emit_general_interpolation(ir_variable *ir) } glsl_interp_qualifier interpolation_mode = - ir->determine_interpolation_mode(c->key.flat_shade); + ir->determine_interpolation_mode(key->flat_shade); int location = ir->data.location; for (unsigned int i = 0; i < array_elements; i++) { @@ -1162,8 +1162,8 @@ fs_visitor::emit_general_interpolation(ir_variable *ir) for (unsigned int k = 0; k < type->vector_elements; k++) { struct brw_reg interp = interp_reg(location, k); emit_linterp(attr, fs_reg(interp), interpolation_mode, - ir->data.centroid && !c->key.persample_shading, - ir->data.sample || c->key.persample_shading); + ir->data.centroid && !key->persample_shading, + ir->data.sample || key->persample_shading); if (brw->needs_unlit_centroid_workaround && ir->data.centroid) { /* Get the pixel/sample mask into f0 so that we know * which pixels are lit. Then, for each channel that is @@ -1220,7 +1220,7 @@ fs_visitor::compute_sample_position(fs_reg dst, fs_reg int_sample_pos) { assert(dst.type == BRW_REGISTER_TYPE_F); - if (c->key.compute_pos_offset) { + if (key->compute_pos_offset) { /* Convert int_sample_pos to floating point */ emit(MOV(dst, int_sample_pos)); /* Scale to the range [0, 1] */ @@ -1291,7 +1291,7 @@ fs_visitor::emit_sampleid_setup(ir_variable *ir) this->current_annotation = "compute sample id"; fs_reg *reg = new(this->mem_ctx) fs_reg(this, ir->type); - if (c->key.compute_sample_id) { + if (key->compute_sample_id) { fs_reg t1 = fs_reg(this, glsl_type::int_type); fs_reg t2 = fs_reg(this, glsl_type::int_type); t2.type = BRW_REGISTER_TYPE_UW; @@ -1521,7 +1521,7 @@ fs_visitor::calculate_urb_setup() */ struct brw_vue_map prev_stage_vue_map; brw_compute_vue_map(brw, &prev_stage_vue_map, - c->key.input_slots_valid); + key->input_slots_valid); int first_slot = 2 * BRW_SF_URB_ENTRY_READ_OFFSET; assert(prev_stage_vue_map.num_slots <= first_slot + 32); for (int slot = first_slot; slot < prev_stage_vue_map.num_slots; @@ -1545,7 +1545,7 @@ fs_visitor::calculate_urb_setup() if (i == VARYING_SLOT_PSIZ) continue; - if (c->key.input_slots_valid & BITFIELD64_BIT(i)) { + if (key->input_slots_valid & BITFIELD64_BIT(i)) { /* The back color slot is skipped when the front color is * also written to. In addition, some slots can be * written in the vertex shader and not read in the @@ -2841,7 +2841,7 @@ fs_visitor::setup_payload_gen6() } } - prog_data->uses_pos_offset = c->key.compute_pos_offset; + prog_data->uses_pos_offset = key->compute_pos_offset; /* R31: MSAA position offsets. */ if (prog_data->uses_pos_offset) { payload.sample_pos_reg = payload.num_regs; @@ -2876,7 +2876,7 @@ fs_visitor::assign_binding_table_offsets() * renderbuffer, which we place at surface index 0. */ prog_data->binding_table.render_target_start = next_binding_table_offset; - next_binding_table_offset += MAX2(c->key.nr_color_regions, 1); + next_binding_table_offset += MAX2(key->nr_color_regions, 1); assign_common_binding_table_offsets(next_binding_table_offset); } @@ -2961,7 +2961,7 @@ fs_visitor::run() /* We handle discards by keeping track of the still-live pixels in f0.1. * Initialize it with the dispatched pixels. */ - if (fp->UsesKill || c->key.alpha_test_func) { + if (fp->UsesKill || key->alpha_test_func) { fs_inst *discard_init = emit(FS_OPCODE_MOV_DISPATCH_TO_FLAGS); discard_init->flag_subreg = 1; } @@ -2985,7 +2985,7 @@ fs_visitor::run() emit(FS_OPCODE_PLACEHOLDER_HALT); - if (c->key.alpha_test_func) + if (key->alpha_test_func) emit_alpha_test(); emit_fb_writes(); diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h index 0c3cb0f7dc1..ba40aef0778 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.h +++ b/src/mesa/drivers/dri/i965/brw_fs.h @@ -494,6 +494,7 @@ public: struct gl_fragment_program *fp; struct brw_wm_compile *c; + const struct brw_wm_prog_key *const key; struct brw_wm_prog_data *prog_data; unsigned int sanity_param_count; diff --git a/src/mesa/drivers/dri/i965/brw_fs_fp.cpp b/src/mesa/drivers/dri/i965/brw_fs_fp.cpp index 49eaf054406..ba5514a5445 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_fp.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_fp.cpp @@ -652,7 +652,7 @@ fs_visitor::get_fp_dst_reg(const prog_dst_register *dst) /* Tell emit_fb_writes() to smear fragment.color across all the * color attachments. */ - for (int i = 1; i < c->key.nr_color_regions; i++) { + for (int i = 1; i < key->nr_color_regions; i++) { outputs[i] = outputs[0]; output_components[i] = output_components[0]; } diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp index a62ca9c5d1d..35d0d9c047a 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp @@ -77,7 +77,7 @@ fs_visitor::visit(ir_variable *ir) this->do_dual_src = true; } else if (ir->data.location == FRAG_RESULT_COLOR) { /* Writing gl_FragColor outputs to all color regions. */ - for (unsigned int i = 0; i < MAX2(c->key.nr_color_regions, 1); i++) { + for (unsigned int i = 0; i < MAX2(key->nr_color_regions, 1); i++) { this->outputs[i] = *reg; this->output_components[i] = 4; } @@ -1467,8 +1467,8 @@ fs_visitor::rescale_texcoord(ir_texture *ir, fs_reg coordinate, */ if (is_rect && (brw->gen < 6 || - (brw->gen >= 6 && (c->key.tex.gl_clamp_mask[0] & (1 << sampler) || - c->key.tex.gl_clamp_mask[1] & (1 << sampler))))) { + (brw->gen >= 6 && (key->tex.gl_clamp_mask[0] & (1 << sampler) || + key->tex.gl_clamp_mask[1] & (1 << sampler))))) { struct gl_program_parameter_list *params = prog->Parameters; int tokens[STATE_LENGTH] = { STATE_INTERNAL, @@ -1516,7 +1516,7 @@ fs_visitor::rescale_texcoord(ir_texture *ir, fs_reg coordinate, needs_gl_clamp = false; for (int i = 0; i < 2; i++) { - if (c->key.tex.gl_clamp_mask[i] & (1 << sampler)) { + if (key->tex.gl_clamp_mask[i] & (1 << sampler)) { fs_reg chan = coordinate; chan.reg_offset += i; @@ -1542,7 +1542,7 @@ fs_visitor::rescale_texcoord(ir_texture *ir, fs_reg coordinate, if (ir->coordinate && needs_gl_clamp) { for (unsigned int i = 0; i < MIN2(ir->coordinate->type->vector_elements, 3); i++) { - if (c->key.tex.gl_clamp_mask[i] & (1 << sampler)) { + if (key->tex.gl_clamp_mask[i] & (1 << sampler)) { fs_reg chan = coordinate; chan.reg_offset += i; @@ -1601,7 +1601,7 @@ fs_visitor::visit(ir_texture *ir) * emitting anything other than setting up the constant result. */ ir_constant *chan = ir->lod_info.component->as_constant(); - int swiz = GET_SWZ(c->key.tex.swizzles[sampler], chan->value.i[0]); + int swiz = GET_SWZ(key->tex.swizzles[sampler], chan->value.i[0]); if (swiz == SWIZZLE_ZERO || swiz == SWIZZLE_ONE) { fs_reg res = fs_reg(this, glsl_type::vec4_type); @@ -1669,7 +1669,7 @@ fs_visitor::visit(ir_texture *ir) ir->lod_info.sample_index->accept(this); sample_index = this->result; - if (brw->gen >= 7 && c->key.tex.compressed_multisample_layout_mask & (1<gen >= 7 && key->tex.compressed_multisample_layout_mask & (1<gen == 6 && ir->op == ir_tg4) { - emit_gen6_gather_wa(c->key.tex.gen6_gather_wa[sampler], dst); + emit_gen6_gather_wa(key->tex.gen6_gather_wa[sampler], dst); } swizzle_result(ir, dst, sampler); @@ -1760,14 +1760,14 @@ uint32_t fs_visitor::gather_channel(ir_texture *ir, int sampler) { ir_constant *chan = ir->lod_info.component->as_constant(); - int swiz = GET_SWZ(c->key.tex.swizzles[sampler], chan->value.i[0]); + int swiz = GET_SWZ(key->tex.swizzles[sampler], chan->value.i[0]); switch (swiz) { case SWIZZLE_X: return 0; case SWIZZLE_Y: /* gather4 sampler is broken for green channel on RG32F -- * we must ask for blue instead. */ - if (c->key.tex.gather_channel_quirk_mask & (1<tex.gather_channel_quirk_mask & (1<type == glsl_type::float_type) { /* Ignore DEPTH_TEXTURE_MODE swizzling. */ assert(ir->sampler->type->sampler_shadow); - } else if (c->key.tex.swizzles[sampler] != SWIZZLE_NOOP) { + } else if (key->tex.swizzles[sampler] != SWIZZLE_NOOP) { fs_reg swizzled_result = fs_reg(this, glsl_type::vec4_type); for (int i = 0; i < 4; i++) { - int swiz = GET_SWZ(c->key.tex.swizzles[sampler], i); + int swiz = GET_SWZ(key->tex.swizzles[sampler], i); fs_reg l = swizzled_result; l.reg_offset += i; @@ -1817,7 +1817,7 @@ fs_visitor::swizzle_result(ir_texture *ir, fs_reg orig_val, int sampler) emit(MOV(l, fs_reg(1.0f))); } else { fs_reg r = orig_val; - r.reg_offset += GET_SWZ(c->key.tex.swizzles[sampler], i); + r.reg_offset += GET_SWZ(key->tex.swizzles[sampler], i); emit(MOV(l, r)); } } @@ -2636,7 +2636,7 @@ fs_visitor::emit_color_write(int target, int index, int first_color_mrf) inst = emit(MOV(fs_reg(MRF, first_color_mrf + index * reg_width, color.type), color)); - inst->saturate = c->key.clamp_fragment_color; + inst->saturate = key->clamp_fragment_color; } else { /* pre-gen6 SIMD16 single source DP write looks like: * m + 0: r0 @@ -2657,18 +2657,18 @@ fs_visitor::emit_color_write(int target, int index, int first_color_mrf) inst = emit(MOV(fs_reg(MRF, BRW_MRF_COMPR4 + first_color_mrf + index, color.type), color)); - inst->saturate = c->key.clamp_fragment_color; + inst->saturate = key->clamp_fragment_color; } else { push_force_uncompressed(); inst = emit(MOV(fs_reg(MRF, first_color_mrf + index, color.type), color)); - inst->saturate = c->key.clamp_fragment_color; + inst->saturate = key->clamp_fragment_color; pop_force_uncompressed(); inst = emit(MOV(fs_reg(MRF, first_color_mrf + index + 4, color.type), half(color, 1))); inst->force_sechalf = true; - inst->saturate = c->key.clamp_fragment_color; + inst->saturate = key->clamp_fragment_color; } } } @@ -2705,10 +2705,10 @@ fs_visitor::emit_alpha_test() this->current_annotation = "Alpha test"; fs_inst *cmp; - if (c->key.alpha_test_func == GL_ALWAYS) + if (key->alpha_test_func == GL_ALWAYS) return; - if (c->key.alpha_test_func == GL_NEVER) { + if (key->alpha_test_func == GL_NEVER) { /* f0.1 = 0 */ fs_reg some_reg = fs_reg(retype(brw_vec8_grf(0, 0), BRW_REGISTER_TYPE_UW)); @@ -2720,8 +2720,8 @@ fs_visitor::emit_alpha_test() color.reg_offset += 3; /* f0.1 &= func(color, ref) */ - cmp = emit(CMP(reg_null_f, color, fs_reg(c->key.alpha_test_ref), - cond_for_alpha_func(c->key.alpha_test_func))); + cmp = emit(CMP(reg_null_f, color, fs_reg(key->alpha_test_ref), + cond_for_alpha_func(key->alpha_test_func))); } cmp->predicate = BRW_PREDICATE_NORMAL; cmp->flag_subreg = 1; @@ -2756,14 +2756,14 @@ fs_visitor::emit_fb_writes() if (brw->gen >= 6 && (brw->is_haswell || brw->gen >= 8 || !this->fp->UsesKill) && !do_dual_src && - c->key.nr_color_regions == 1) { + key->nr_color_regions == 1) { header_present = false; } if (header_present) { src0_alpha_to_render_target = brw->gen >= 6 && !do_dual_src && - c->key.replicate_alpha; + key->replicate_alpha; /* m2, m3 header */ nr += 2; } @@ -2830,7 +2830,7 @@ fs_visitor::emit_fb_writes() for (int i = 0; i < 4; i++) { fs_inst *inst = emit(MOV(fs_reg(MRF, color_mrf + i, src0.type), src0)); src0.reg_offset++; - inst->saturate = c->key.clamp_fragment_color; + inst->saturate = key->clamp_fragment_color; } this->current_annotation = ralloc_asprintf(this->mem_ctx, @@ -2839,7 +2839,7 @@ fs_visitor::emit_fb_writes() fs_inst *inst = emit(MOV(fs_reg(MRF, color_mrf + 4 + i, src1.type), src1)); src1.reg_offset++; - inst->saturate = c->key.clamp_fragment_color; + inst->saturate = key->clamp_fragment_color; } if (INTEL_DEBUG & DEBUG_SHADER_TIME) @@ -2861,7 +2861,7 @@ fs_visitor::emit_fb_writes() return; } - for (int target = 0; target < c->key.nr_color_regions; target++) { + for (int target = 0; target < key->nr_color_regions; target++) { this->current_annotation = ralloc_asprintf(this->mem_ctx, "FB write target %d", target); @@ -2876,7 +2876,7 @@ fs_visitor::emit_fb_writes() inst = emit(MOV(fs_reg(MRF, write_color_mrf, color.type), color)); - inst->saturate = c->key.clamp_fragment_color; + inst->saturate = key->clamp_fragment_color; write_color_mrf = color_mrf + reg_width; } @@ -2884,7 +2884,7 @@ fs_visitor::emit_fb_writes() emit_color_write(target, i, write_color_mrf); bool eot = false; - if (target == c->key.nr_color_regions - 1) { + if (target == key->nr_color_regions - 1) { eot = true; if (INTEL_DEBUG & DEBUG_SHADER_TIME) @@ -2906,7 +2906,7 @@ fs_visitor::emit_fb_writes() } } - if (c->key.nr_color_regions == 0) { + if (key->nr_color_regions == 0) { /* Even if there's no color buffers enabled, we still need to send * alpha out the pipeline to our null renderbuffer to support * alpha-testing, alpha-to-coverage, and so on. @@ -2960,6 +2960,7 @@ fs_visitor::fs_visitor(struct brw_context *brw, unsigned dispatch_width) : backend_visitor(brw, shader_prog, &fp->Base, &c->prog_data.base, MESA_SHADER_FRAGMENT), + key(&c->key), dispatch_width(dispatch_width) { this->c = c; diff --git a/src/mesa/drivers/dri/i965/brw_wm_iz.cpp b/src/mesa/drivers/dri/i965/brw_wm_iz.cpp index 5f719f622fa..0a639f176e1 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_iz.cpp +++ b/src/mesa/drivers/dri/i965/brw_wm_iz.cpp @@ -124,7 +124,7 @@ void fs_visitor::setup_payload_gen4() { GLuint reg = 2; bool kill_stats_promoted_workaround = false; - int lookup = c->key.iz_lookup; + int lookup = key->iz_lookup; bool uses_depth = (fp->Base.InputsRead & (1 << VARYING_SLOT_POS)) != 0; @@ -135,7 +135,7 @@ void fs_visitor::setup_payload_gen4() * statistics are enabled..." paragraph of 11.5.3.2: Early Depth * Test Cases [Pre-DevGT] of the 3D Pipeline - Windower B-Spec. */ - if (c->key.stats_wm && + if (key->stats_wm && (lookup & IZ_PS_KILL_ALPHATEST_BIT) && wm_iz_table[lookup].mode == P) { kill_stats_promoted_workaround = true; @@ -150,10 +150,10 @@ void fs_visitor::setup_payload_gen4() if (wm_iz_table[lookup].sd_to_rt || kill_stats_promoted_workaround) source_depth_to_render_target = true; - if (wm_iz_table[lookup].ds_present || c->key.line_aa != AA_NEVER) { + if (wm_iz_table[lookup].ds_present || key->line_aa != AA_NEVER) { payload.aa_dest_stencil_reg = reg; runtime_check_aads_emit = - !wm_iz_table[lookup].ds_present && c->key.line_aa == AA_SOMETIMES; + !wm_iz_table[lookup].ds_present && key->line_aa == AA_SOMETIMES; reg++; } -- cgit v1.2.3