From 3f9440cfbb0b616b81ad9f03814ebab7e2b7b8c2 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Sun, 6 Apr 2014 10:49:49 -0700 Subject: i965/gen7: Skip repeated NULL depth/stencil state emits. Improves cairo performance on glamor by 2.87752% +/- 0.966977 (n=57). Reviewed-by: Ian Romanick --- src/mesa/drivers/dri/i965/brw_blorp.cpp | 1 + src/mesa/drivers/dri/i965/brw_context.h | 3 +++ src/mesa/drivers/dri/i965/gen7_misc_state.c | 8 ++++++++ src/mesa/drivers/dri/i965/gen8_depth_state.c | 8 ++++++++ 4 files changed, 20 insertions(+) (limited to 'src') diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp b/src/mesa/drivers/dri/i965/brw_blorp.cpp index 252219e8564..57ff30a7fb0 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp.cpp +++ b/src/mesa/drivers/dri/i965/brw_blorp.cpp @@ -278,6 +278,7 @@ retry: */ brw->state.dirty.brw = ~0; brw->state.dirty.cache = ~0; + brw->no_depth_or_stencil = false; brw->ib.type = -1; /* Flush the sampler cache so any texturing from the destination is diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index 487142cd300..f8ca58fdd5b 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -1119,6 +1119,9 @@ struct brw_context /* Whether a meta-operation is in progress. */ bool meta_in_progress; + /* Whether the last depth/stencil packets were both NULL. */ + bool no_depth_or_stencil; + struct { struct brw_vertex_element inputs[VERT_ATTRIB_MAX]; struct brw_vertex_buffer buffers[VERT_ATTRIB_MAX]; diff --git a/src/mesa/drivers/dri/i965/gen7_misc_state.c b/src/mesa/drivers/dri/i965/gen7_misc_state.c index 8fb0eec7765..328b01e69df 100644 --- a/src/mesa/drivers/dri/i965/gen7_misc_state.c +++ b/src/mesa/drivers/dri/i965/gen7_misc_state.c @@ -52,6 +52,12 @@ gen7_emit_depth_stencil_hiz(struct brw_context *brw, const struct intel_renderbuffer *irb = NULL; const struct gl_renderbuffer *rb = NULL; + /* Skip repeated NULL depth/stencil emits (think 2D rendering). */ + if (!mt && brw->no_depth_or_stencil) { + assert(brw->hw_ctx); + return; + } + intel_emit_depth_stall_flushes(brw); irb = intel_get_renderbuffer(fb, BUFFER_DEPTH); @@ -190,6 +196,8 @@ gen7_emit_depth_stencil_hiz(struct brw_context *brw, OUT_BATCH(depth_mt ? depth_mt->depth_clear_value : 0); OUT_BATCH(1); ADVANCE_BATCH(); + + brw->no_depth_or_stencil = !mt; } /** diff --git a/src/mesa/drivers/dri/i965/gen8_depth_state.c b/src/mesa/drivers/dri/i965/gen8_depth_state.c index 621951e34fa..8f5718a2f54 100644 --- a/src/mesa/drivers/dri/i965/gen8_depth_state.c +++ b/src/mesa/drivers/dri/i965/gen8_depth_state.c @@ -49,6 +49,12 @@ emit_depth_packets(struct brw_context *brw, uint32_t lod, uint32_t min_array_element) { + /* Skip repeated NULL depth/stencil emits (think 2D rendering). */ + if (!depth_mt && !stencil_mt && brw->no_depth_or_stencil) { + assert(brw->hw_ctx); + return; + } + intel_emit_depth_stall_flushes(brw); /* _NEW_BUFFERS, _NEW_DEPTH, _NEW_STENCIL */ @@ -130,6 +136,8 @@ emit_depth_packets(struct brw_context *brw, OUT_BATCH(depth_mt ? depth_mt->depth_clear_value : 0); OUT_BATCH(1); ADVANCE_BATCH(); + + brw->no_depth_or_stencil = !depth_mt && !stencil_mt; } /* Awful vtable-compatible function; should be cleaned up in the future. */ -- cgit v1.2.3