From 2b977989f3f01c186677988494bbf9b7342b31f2 Mon Sep 17 00:00:00 2001 From: Jason Ekstrand Date: Fri, 23 Mar 2018 09:27:55 -0700 Subject: intel/vec4: Set channel_sizes for MOV_INDIRECT sources Otherwise, any indirect push constant access results in an assertion failure when we start digging through the channel_sizes array. This fixes dEQP-VK.pipeline.push_constant.graphics_pipeline.dynamic_index_vert on Haswell. It should be a harmless no-op for GL since indirect push constants aren't used there. Reviewed-by: Kenneth Graunke Fixes: e69e5c7006d "i965/vec4: load dvec3/4 uniforms first in the..." --- src/intel/compiler/brw_vec4.cpp | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'src') diff --git a/src/intel/compiler/brw_vec4.cpp b/src/intel/compiler/brw_vec4.cpp index 2f352a1118f..218925ccb12 100644 --- a/src/intel/compiler/brw_vec4.cpp +++ b/src/intel/compiler/brw_vec4.cpp @@ -695,8 +695,11 @@ vec4_visitor::pack_uniform_registers() * the next part of our packing algorithm. */ int reg = inst->src[0].nr; - for (unsigned i = 0; i < vec4s_read; i++) + int channel_size = type_sz(inst->src[0].type) / 4; + for (unsigned i = 0; i < vec4s_read; i++) { chans_used[reg + i] = 4; + channel_sizes[reg + i] = MAX2(channel_sizes[reg + i], channel_size); + } } } -- cgit v1.2.3