From 2214f99c07abe119c1e657999a875b7ae7e6c2de Mon Sep 17 00:00:00 2001 From: Jonathan Marek Date: Mon, 12 Aug 2019 11:34:57 -0400 Subject: etnaviv: avoid using RS for 64bpp formats At the same time, this change allows using BLT for 8bpp formats Signed-off-by: Jonathan Marek Reviewed-by: Christian Gmeiner --- src/gallium/drivers/etnaviv/etnaviv_resource.c | 6 +----- src/gallium/drivers/etnaviv/etnaviv_resource.h | 12 ++++++++++++ src/gallium/drivers/etnaviv/etnaviv_transfer.c | 2 +- 3 files changed, 14 insertions(+), 6 deletions(-) (limited to 'src') diff --git a/src/gallium/drivers/etnaviv/etnaviv_resource.c b/src/gallium/drivers/etnaviv/etnaviv_resource.c index be5d87168f1..f4200be437d 100644 --- a/src/gallium/drivers/etnaviv/etnaviv_resource.c +++ b/src/gallium/drivers/etnaviv/etnaviv_resource.c @@ -351,17 +351,13 @@ etna_resource_create(struct pipe_screen *pscreen, * and a texture-compatible base buffer in other cases * */ - if (templat->bind & (PIPE_BIND_SCANOUT | PIPE_BIND_DEPTH_STENCIL)) { if (screen->specs.pixel_pipes > 1 && !screen->specs.single_buffer) layout |= ETNA_LAYOUT_BIT_MULTI; if (screen->specs.can_supertile) layout |= ETNA_LAYOUT_BIT_SUPER; } else if (VIV_FEATURE(screen, chipMinorFeatures2, SUPERTILED_TEXTURE) && - /* RS can't tile 1 byte per pixel formats, will have to CPU tile, - * which doesn't support super-tiling - */ - util_format_get_blocksize(templat->format) > 1) { + etna_resource_hw_tileable(screen->specs.use_blt, templat)) { layout |= ETNA_LAYOUT_BIT_SUPER; } diff --git a/src/gallium/drivers/etnaviv/etnaviv_resource.h b/src/gallium/drivers/etnaviv/etnaviv_resource.h index 226e444b02a..51e54074139 100644 --- a/src/gallium/drivers/etnaviv/etnaviv_resource.h +++ b/src/gallium/drivers/etnaviv/etnaviv_resource.h @@ -30,6 +30,7 @@ #include "etnaviv_internal.h" #include "etnaviv_tiling.h" #include "pipe/p_state.h" +#include "util/format/u_format.h" #include "util/list.h" #include "util/set.h" #include "util/u_helpers.h" @@ -132,6 +133,17 @@ etna_resource_sampler_only(const struct pipe_resource *pres) PIPE_BIND_SAMPLER_VIEW; } +static inline bool +etna_resource_hw_tileable(bool use_blt, const struct pipe_resource *pres) +{ + if (use_blt) + return true; + + /* RS can only tile 16bpp or 32bpp formats */ + return util_format_get_blocksize(pres->format) == 2 || + util_format_get_blocksize(pres->format) == 4; +} + static inline struct etna_resource * etna_resource(struct pipe_resource *p) { diff --git a/src/gallium/drivers/etnaviv/etnaviv_transfer.c b/src/gallium/drivers/etnaviv/etnaviv_transfer.c index b0135c068ff..0115c5eeb7b 100644 --- a/src/gallium/drivers/etnaviv/etnaviv_transfer.c +++ b/src/gallium/drivers/etnaviv/etnaviv_transfer.c @@ -247,7 +247,7 @@ etna_transfer_map(struct pipe_context *pctx, struct pipe_resource *prsc, rsc = etna_resource(rsc->texture); } else if (rsc->ts_bo || (rsc->layout != ETNA_LAYOUT_LINEAR && - util_format_get_blocksize(format) > 1 && + etna_resource_hw_tileable(ctx->specs.use_blt, prsc) && /* HALIGN 4 resources are incompatible with the resolve engine, * so fall back to using software to detile this resource. */ rsc->halign != TEXTURE_HALIGN_FOUR)) { -- cgit v1.2.3