From 028f6d8317f00a94b09df81e8f2cb944077e64a7 Mon Sep 17 00:00:00 2001 From: Nanley Chery Date: Wed, 6 Jul 2016 11:13:15 -0700 Subject: isl: Fix assert on raw buffer surface state size See inline PRM reference. Cc: 12.0 Signed-off-by: Nanley Chery Reviewed-by: Jason Ekstrand --- src/intel/isl/isl_surface_state.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) (limited to 'src') diff --git a/src/intel/isl/isl_surface_state.c b/src/intel/isl/isl_surface_state.c index fc7e1bae026..58e9af5f8ee 100644 --- a/src/intel/isl/isl_surface_state.c +++ b/src/intel/isl/isl_surface_state.c @@ -460,8 +460,15 @@ isl_genX(buffer_fill_state_s)(void *state, uint32_t num_elements = info->size / info->stride; if (GEN_GEN >= 7) { + /* From the IVB PRM, SURFACE_STATE::Height, + * + * For typed buffer and structured buffer surfaces, the number + * of entries in the buffer ranges from 1 to 2^27. For raw buffer + * surfaces, the number of entries in the buffer is the number of bytes + * which can range from 1 to 2^30. + */ if (info->format == ISL_FORMAT_RAW) { - assert(num_elements <= (1ull << 31)); + assert(num_elements <= (1ull << 30)); assert((num_elements & 3) == 0); } else { assert(num_elements <= (1ull << 27)); -- cgit v1.2.3