From c3fc8b2870668fe0313fd35b2789306dbf3b9594 Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Sat, 7 Mar 2015 23:01:07 -0800 Subject: i965/fs: Set force_writemask_all on shader_time instructions. These computations don't have anything to do with the currently executing channels, so they should use force_writemask_all. This fixes assert failures. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86974 Signed-off-by: Kenneth Graunke Reviewed-by: Matt Turner Cc: mesa-stable@lists.freedesktop.org (cherry picked from commit ef9cc7d0c176669c03130abf576f2b700be39514) Conflicts: src/mesa/drivers/dri/i965/brw_fs.cpp --- src/mesa/drivers/dri/i965/brw_fs.cpp | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) (limited to 'src/mesa') diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index 1fc8cca96ad..67719d3e74c 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp @@ -760,18 +760,23 @@ fs_visitor::emit_shader_time_end() reset.set_smear(2); fs_inst *test = emit(AND(reg_null_d, reset, fs_reg(1u))); test->conditional_mod = BRW_CONDITIONAL_Z; + test->force_writemask_all = true; emit(IF(BRW_PREDICATE_NORMAL)); fs_reg start = shader_start_time; start.negate = true; fs_reg diff = fs_reg(GRF, virtual_grf_alloc(1), BRW_REGISTER_TYPE_UD, 1); - emit(ADD(diff, start, shader_end_time)); + fs_inst *add = ADD(diff, start, shader_end_time); + add->force_writemask_all = true; + emit(add); /* If there were no instructions between the two timestamp gets, the diff * is 2 cycles. Remove that overhead, so I can forget about that when * trying to determine the time taken for single instructions. */ - emit(ADD(diff, diff, fs_reg(-2u))); + add = ADD(diff, diff, fs_reg(-2u)); + add->force_writemask_all = true; + emit(add); emit_shader_time_write(type, diff); emit_shader_time_write(written_type, fs_reg(1u)); -- cgit v1.2.3