From bbea5c5a5a7fb327d4ef03f80fe19cfa8d8edccd Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Fri, 7 Oct 2011 21:45:34 -0700 Subject: i965: Clarify check for which cache to use on Gen6 data port reads. Currently, we use the Render Cache for scratch access (read/write data) and the Sampler Cache for all read only data (pull constants). Reversing the condition here is clearer: if the caller requested the Render Cache, use that. Otherwise, they requested the Data Cache (which does not exist on Gen6) or Sampler Cache, so use the Sampler Cache. This should not change behavior in any way. Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_eu_emit.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/mesa') diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c index 7f6ed6810bf..7773cff9217 100644 --- a/src/mesa/drivers/dri/i965/brw_eu_emit.c +++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c @@ -626,10 +626,10 @@ brw_set_dp_read_message(struct brw_compile *p, } else if (intel->gen == 6) { uint32_t target_function; - if (target_cache == BRW_DATAPORT_READ_TARGET_DATA_CACHE) - target_function = GEN6_MESSAGE_TARGET_DP_SAMPLER_CACHE; - else + if (target_cache == BRW_DATAPORT_READ_TARGET_RENDER_CACHE) target_function = GEN6_MESSAGE_TARGET_DP_RENDER_CACHE; + else + target_function = GEN6_MESSAGE_TARGET_DP_SAMPLER_CACHE; insn->bits3.gen6_dp.binding_table_index = binding_table_index; insn->bits3.gen6_dp.msg_control = msg_control; -- cgit v1.2.3