From b85a229e1f542426b1c8000569d89cd4768b9339 Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Thu, 7 Jan 2016 15:54:16 -0800 Subject: glsl: Delete the ir_binop_bfm and ir_triop_bfi opcodes. TGSI doesn't use these - it just translates ir_quadop_bitfield_insert directly. NIR can handle ir_quadop_bitfield_insert as well. These opcodes were only used for i965, and with Jason's recent patches, we can do this lowering in NIR (which also gains us SPIR-V handling). So there's not much point to retaining this GLSL IR lowering code. Signed-off-by: Kenneth Graunke Reviewed-by: Matt Turner Reviewed-by: Iago Toral Quiroga --- .../dri/i965/brw_fs_channel_expressions.cpp | 30 +++++----------------- src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 3 +-- src/mesa/drivers/dri/i965/brw_link.cpp | 2 -- src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 3 +-- src/mesa/program/ir_to_mesa.cpp | 2 -- src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 2 -- 6 files changed, 9 insertions(+), 33 deletions(-) (limited to 'src/mesa') diff --git a/src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp b/src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp index 78a82406ad7..21f0b703d00 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp @@ -143,7 +143,7 @@ ir_channel_expressions_visitor::visit_leave(ir_assignment *ir) ir_expression *expr = ir->rhs->as_expression(); bool found_vector = false; unsigned int i, vector_elements = 1; - ir_variable *op_var[3]; + ir_variable *op_var[4]; if (!expr) return visit_continue; @@ -345,20 +345,6 @@ ir_channel_expressions_visitor::visit_leave(ir_assignment *ir) case ir_unop_noise: unreachable("noise should have been broken down to function call"); - case ir_binop_bfm: { - /* Does not need to be scalarized, since its result will be identical - * for all channels. - */ - ir_rvalue *op0 = get_element(op_var[0], 0); - ir_rvalue *op1 = get_element(op_var[1], 0); - - assign(ir, 0, new(mem_ctx) ir_expression(expr->operation, - element_type, - op0, - op1)); - break; - } - case ir_binop_ubo_load: case ir_unop_get_buffer_size: unreachable("not yet supported"); @@ -380,22 +366,21 @@ ir_channel_expressions_visitor::visit_leave(ir_assignment *ir) } break; - case ir_triop_bfi: { - /* Only a single BFM is needed for multiple BFIs. */ - ir_rvalue *op0 = get_element(op_var[0], 0); - + case ir_quadop_bitfield_insert: for (i = 0; i < vector_elements; i++) { + ir_rvalue *op0 = get_element(op_var[0], i); ir_rvalue *op1 = get_element(op_var[1], i); ir_rvalue *op2 = get_element(op_var[2], i); + ir_rvalue *op3 = get_element(op_var[3], i); assign(ir, i, new(mem_ctx) ir_expression(expr->operation, element_type, - op0->clone(mem_ctx, NULL), + op0, op1, - op2)); + op2, + op3)); } break; - } case ir_unop_pack_snorm_2x16: case ir_unop_pack_snorm_4x8: @@ -410,7 +395,6 @@ ir_channel_expressions_visitor::visit_leave(ir_assignment *ir) case ir_binop_ldexp: case ir_binop_vector_extract: case ir_triop_vector_insert: - case ir_quadop_bitfield_insert: case ir_quadop_vector: case ir_unop_ssbo_unsized_array_length: unreachable("should have been lowered"); diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp index ad347fcdbaf..874092558e0 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp @@ -1037,8 +1037,7 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr) break; case nir_op_bitfield_insert: - unreachable("not reached: should be handled by " - "lower_instructions::bitfield_insert_to_bfm_bfi"); + unreachable("not reached: should have been lowered"); case nir_op_ishl: bld.SHL(result, op[0], op[1]); diff --git a/src/mesa/drivers/dri/i965/brw_link.cpp b/src/mesa/drivers/dri/i965/brw_link.cpp index 766c57ff60a..234afd554df 100644 --- a/src/mesa/drivers/dri/i965/brw_link.cpp +++ b/src/mesa/drivers/dri/i965/brw_link.cpp @@ -126,14 +126,12 @@ process_glsl_ir(gl_shader_stage stage, */ brw_lower_packing_builtins(brw, shader->Stage, shader->ir); do_mat_op_to_vec(shader->ir); - const int bitfield_insert = brw->gen >= 7 ? BITFIELD_INSERT_TO_BFM_BFI : 0; lower_instructions(shader->ir, MOD_TO_FLOOR | DIV_TO_MUL_RCP | SUB_TO_ADD_NEG | EXP_TO_EXP2 | LOG_TO_LOG2 | - bitfield_insert | LDEXP_TO_ARITH | CARRY_TO_ARITH | BORROW_TO_ARITH); diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp index a3bdbc35b49..ecca16663cf 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp @@ -1405,8 +1405,7 @@ vec4_visitor::nir_emit_alu(nir_alu_instr *instr) break; case nir_op_bitfield_insert: - unreachable("not reached: should be handled by " - "lower_instructions::bitfield_insert_to_bfm_bfi"); + unreachable("not reached: should have been lowered"); case nir_op_fsign: /* AND(val, 0x80000000) gives the sign bit. diff --git a/src/mesa/program/ir_to_mesa.cpp b/src/mesa/program/ir_to_mesa.cpp index 852655df105..9cde28dfc0a 100644 --- a/src/mesa/program/ir_to_mesa.cpp +++ b/src/mesa/program/ir_to_mesa.cpp @@ -1303,9 +1303,7 @@ ir_to_mesa_visitor::visit(ir_expression *ir) break; case ir_binop_vector_extract: - case ir_binop_bfm: case ir_triop_fma: - case ir_triop_bfi: case ir_triop_bitfield_extract: case ir_triop_vector_insert: case ir_quadop_bitfield_insert: diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp index 27a0a4f51e1..d424e3b335f 100644 --- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp +++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp @@ -2183,8 +2183,6 @@ glsl_to_tgsi_visitor::visit(ir_expression *ir) case ir_unop_unpack_unorm_4x8: case ir_binop_pack_half_2x16_split: - case ir_binop_bfm: - case ir_triop_bfi: case ir_quadop_vector: case ir_binop_vector_extract: case ir_triop_vector_insert: -- cgit v1.2.3