From b371734331a3a15966038de3e3e6e8c30372b3c2 Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Thu, 23 Jan 2014 10:58:25 -0800 Subject: i965/fs: Support arbitrarily large sampler indices on Broadwell+. I added support for these on Haswell, but forgot to update the Broadwell code before landing it. Partially fixes Piglit's max-samplers test. v2: Use get_element_ud() consistently, rather than using it for the source but using brw_vec1_grf for the destination.. Signed-off-by: Kenneth Graunke Reviewed-by: Eric Anholt --- src/mesa/drivers/dri/i965/gen8_fs_generator.cpp | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) (limited to 'src/mesa') diff --git a/src/mesa/drivers/dri/i965/gen8_fs_generator.cpp b/src/mesa/drivers/dri/i965/gen8_fs_generator.cpp index f9026912b1f..332b14f6031 100644 --- a/src/mesa/drivers/dri/i965/gen8_fs_generator.cpp +++ b/src/mesa/drivers/dri/i965/gen8_fs_generator.cpp @@ -252,6 +252,23 @@ gen8_fs_generator::generate_tex(fs_inst *ir, brw_imm_ud(ir->texture_offset)); } + if (ir->sampler >= 16) { + /* The "Sampler Index" field can only store values between 0 and 15. + * However, we can add an offset to the "Sampler State Pointer" + * field, effectively selecting a different set of 16 samplers. + * + * The "Sampler State Pointer" needs to be aligned to a 32-byte + * offset, and each sampler state is only 16-bytes, so we can't + * exclusively use the offset - we have to use both. + */ + gen8_instruction *add = + ADD(get_element_ud(src, 3), + get_element_ud(brw_vec8_grf(0, 0), 3), + brw_imm_ud(16 * (ir->sampler / 16) * + sizeof(gen7_sampler_state))); + gen8_set_mask_control(add, BRW_MASK_DISABLE); + } + default_state.exec_size = save_exec_size; } @@ -263,7 +280,7 @@ gen8_fs_generator::generate_tex(fs_inst *ir, gen8_set_src0(brw, inst, src); gen8_set_sampler_message(brw, inst, surf_index, - ir->sampler, + ir->sampler % 16, msg_type, rlen, ir->mlen, -- cgit v1.2.3