From 0eb819a2d175cab139f8c672b6d44148b2c99a4e Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Tue, 11 Aug 2009 16:02:54 -0700 Subject: i965: Store the dispatch width in the WM compile struct. I'll be using this in merging brw_wm_emit.c and brw_wm_glsl.c --- src/mesa/drivers/dri/i965/brw_wm.c | 2 ++ src/mesa/drivers/dri/i965/brw_wm.h | 1 + 2 files changed, 3 insertions(+) (limited to 'src/mesa') diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c index d381add71c7..ce8d0a4a639 100644 --- a/src/mesa/drivers/dri/i965/brw_wm.c +++ b/src/mesa/drivers/dri/i965/brw_wm.c @@ -171,9 +171,11 @@ static void do_wm_prog( struct brw_context *brw, * differently from "simple" shaders. */ if (fp->isGLSL) { + c->dispatch_width = 8; brw_wm_glsl_emit(brw, c); } else { + c->dispatch_width = 16; brw_wm_non_glsl_emit(brw, c); } diff --git a/src/mesa/drivers/dri/i965/brw_wm.h b/src/mesa/drivers/dri/i965/brw_wm.h index 7a46b1d5437..972c257d428 100644 --- a/src/mesa/drivers/dri/i965/brw_wm.h +++ b/src/mesa/drivers/dri/i965/brw_wm.h @@ -260,6 +260,7 @@ struct brw_wm_compile { GLuint tmp_index; GLuint tmp_max; GLuint subroutines[BRW_WM_MAX_SUBROUTINE]; + GLuint dispatch_width; /** we may need up to 3 constants per instruction (if use_const_buffer) */ struct { -- cgit v1.2.3