From 5606dfb572bf4b89b4882265924705bacc8c182b Mon Sep 17 00:00:00 2001 From: Ian Romanick Date: Tue, 17 Nov 2009 16:10:24 -0800 Subject: Merge branch 'outputswritten64' Add a GLbitfield64 type and several macros to operate on 64-bit fields. The OutputsWritten field of gl_program is changed to use that type. This results in a fair amount of fallout in drivers that use programs. No changes are strictly necessary at this point as all bits used are below the 32-bit boundary. Fairly soon several bits will be added for clip distances written by a vertex shader. This will cause several bits used for varyings to be pushed above the 32-bit boundary. This will affect any drivers that support GLSL. At this point, only the i965 driver has been modified to support this eventuality. I did this as a "squash" merge. There were several places through the outputswritten64 branch where things were broken. I foresee this causing difficulties later for bisecting. The history is still available in the branch. Conflicts: src/mesa/drivers/dri/i965/brw_wm.h --- src/mesa/main/ffvertex_prog.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mesa/main/ffvertex_prog.c') diff --git a/src/mesa/main/ffvertex_prog.c b/src/mesa/main/ffvertex_prog.c index 356476e35a5..fe2416d8946 100644 --- a/src/mesa/main/ffvertex_prog.c +++ b/src/mesa/main/ffvertex_prog.c @@ -438,7 +438,7 @@ static struct ureg register_input( struct tnl_program *p, GLuint input ) */ static struct ureg register_output( struct tnl_program *p, GLuint output ) { - p->program->Base.OutputsWritten |= (1<program->Base.OutputsWritten |= BITFIELD64_BIT(output); return make_ureg(PROGRAM_OUTPUT, output); } -- cgit v1.2.3 From 15fa484f514726a29bbf24df33c0551844f878d0 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Wed, 18 Nov 2009 03:05:14 -0800 Subject: mesa: Remove gratuitous padding in prog_dst_register. The padding was there to indicate the amount of space left from the number of expected bytes in the struct minus allocated bits. But uint bitfields get packed so that they don't cross uint boundaries, and we ended up allocating an extra dword to hold the pad field! --- src/mesa/drivers/dri/i965/brw_wm_fp.c | 1 - src/mesa/main/ffvertex_prog.c | 1 - src/mesa/shader/prog_instruction.h | 1 - 3 files changed, 3 deletions(-) (limited to 'src/mesa/main/ffvertex_prog.c') diff --git a/src/mesa/drivers/dri/i965/brw_wm_fp.c b/src/mesa/drivers/dri/i965/brw_wm_fp.c index 7d031795883..3737faf26fb 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_fp.c +++ b/src/mesa/drivers/dri/i965/brw_wm_fp.c @@ -138,7 +138,6 @@ static struct prog_dst_register dst_reg(GLuint file, GLuint idx) reg.CondMask = COND_TR; reg.CondSwizzle = 0; reg.CondSrc = 0; - reg.pad = 0; return reg; } diff --git a/src/mesa/main/ffvertex_prog.c b/src/mesa/main/ffvertex_prog.c index fe2416d8946..5cfa898031e 100644 --- a/src/mesa/main/ffvertex_prog.c +++ b/src/mesa/main/ffvertex_prog.c @@ -523,7 +523,6 @@ static void emit_dst( struct prog_dst_register *dst, dst->CondMask = COND_TR; /* always pass cond test */ dst->CondSwizzle = SWIZZLE_NOOP; dst->CondSrc = 0; - dst->pad = 0; /* Check that bitfield sizes aren't exceeded */ ASSERT(dst->Index == reg.idx); } diff --git a/src/mesa/shader/prog_instruction.h b/src/mesa/shader/prog_instruction.h index 1c687bc16cf..224350caac6 100644 --- a/src/mesa/shader/prog_instruction.h +++ b/src/mesa/shader/prog_instruction.h @@ -312,7 +312,6 @@ struct prog_dst_register */ GLuint CondSrc:1; /*@}*/ - GLuint pad:28; }; -- cgit v1.2.3