From af0e6336e9d7dc19d74950ce13b33e1fa1b2081d Mon Sep 17 00:00:00 2001 From: Brian Paul Date: Fri, 16 Jan 2009 16:02:34 -0700 Subject: i965: whitespace changes and reformatting --- src/mesa/drivers/dri/i965/brw_wm_pass0.c | 36 +++++++++++++------------------- src/mesa/drivers/dri/i965/brw_wm_pass1.c | 25 +++++++++++++--------- src/mesa/drivers/dri/i965/brw_wm_pass2.c | 28 ++++++++++++------------- 3 files changed, 42 insertions(+), 47 deletions(-) (limited to 'src/mesa/drivers') diff --git a/src/mesa/drivers/dri/i965/brw_wm_pass0.c b/src/mesa/drivers/dri/i965/brw_wm_pass0.c index 205a7160d39..d0c6b822909 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_pass0.c +++ b/src/mesa/drivers/dri/i965/brw_wm_pass0.c @@ -115,7 +115,7 @@ static const struct brw_wm_ref *get_param_ref( struct brw_wm_compile *c, ref->value = &c->creg[i/16]; ref->insn = 0; ref->prevuse = NULL; - + return ref; } } @@ -142,7 +142,7 @@ static const struct brw_wm_ref *get_const_ref( struct brw_wm_compile *c, */ c->constref[i].constval = *constval; c->constref[i].ref = get_param_ref(c, constval); - + return c->constref[i].ref; } else { @@ -198,7 +198,7 @@ static const struct brw_wm_ref *pass0_get_reg( struct brw_wm_compile *c, */ ref = get_const_ref(c, &plist->ParameterValues[idx][component]); break; - + case PROGRAM_STATE_VAR: case PROGRAM_UNIFORM: /* These may change from run to run: @@ -229,14 +229,13 @@ static const struct brw_wm_ref *pass0_get_reg( struct brw_wm_compile *c, - /*********************************************************************** * Straight translation to internal instruction format */ static void pass0_set_dst( struct brw_wm_compile *c, - struct brw_wm_instruction *out, - const struct prog_instruction *inst, + struct brw_wm_instruction *out, + const struct prog_instruction *inst, GLuint writemask ) { const struct prog_dst_register *dst = &inst->DstReg; @@ -245,18 +244,17 @@ static void pass0_set_dst( struct brw_wm_compile *c, for (i = 0; i < 4; i++) { if (writemask & (1<dst[i] = get_value(c); - pass0_set_fpreg_value(c, dst->File, dst->Index, i, out->dst[i]); } } - + out->writemask = writemask; } static void pass0_set_dst_scalar( struct brw_wm_compile *c, - struct brw_wm_instruction *out, - const struct prog_instruction *inst, + struct brw_wm_instruction *out, + const struct prog_instruction *inst, GLuint writemask ) { if (writemask) { @@ -282,7 +280,6 @@ static void pass0_set_dst_scalar( struct brw_wm_compile *c, } - static const struct brw_wm_ref *get_fp_src_reg_ref( struct brw_wm_compile *c, struct prog_src_register src, GLuint i ) @@ -292,14 +289,13 @@ static const struct brw_wm_ref *get_fp_src_reg_ref( struct brw_wm_compile *c, static const GLfloat const_zero = 0.0; static const GLfloat const_one = 1.0; - if (component == SWIZZLE_ZERO) src_ref = get_const_ref(c, &const_zero); else if (component == SWIZZLE_ONE) src_ref = get_const_ref(c, &const_one); else src_ref = pass0_get_reg(c, src.File, src.Index, component); - + return src_ref; } @@ -311,19 +307,19 @@ static struct brw_wm_ref *get_new_ref( struct brw_wm_compile *c, { const struct brw_wm_ref *ref = get_fp_src_reg_ref(c, src, i); struct brw_wm_ref *newref = get_ref(c); - + newref->value = ref->value; newref->hw_reg = ref->hw_reg; - if (insn) { + if (insn) { newref->insn = insn - c->instruction; newref->prevuse = newref->value->lastuse; newref->value->lastuse = newref; } - if (src.NegateBase & (1<hw_reg.negate ^= 1; - + if (src.Abs) { newref->hw_reg.negate = 0; newref->hw_reg.abs = 1; @@ -333,7 +329,6 @@ static struct brw_wm_ref *get_new_ref( struct brw_wm_compile *c, } - static struct brw_wm_instruction *translate_insn( struct brw_wm_compile *c, const struct prog_instruction *inst ) { @@ -418,6 +413,7 @@ static void pass0_init_payload( struct brw_wm_compile *c ) &c->payload.input_interp[i] ); } + /*********************************************************************** * PASS 0 * @@ -440,7 +436,6 @@ void brw_wm_pass0( struct brw_wm_compile *c ) for (insn = 0; insn < c->nr_fp_insns; insn++) { const struct prog_instruction *inst = &c->prog_instructions[insn]; - /* Optimize away moves, otherwise emit translated instruction: */ switch (inst->Opcode) { @@ -453,8 +448,6 @@ void brw_wm_pass0( struct brw_wm_compile *c ) translate_insn(c, inst); } break; - - default: translate_insn(c, inst); break; @@ -465,4 +458,3 @@ void brw_wm_pass0( struct brw_wm_compile *c ) brw_wm_print_program(c, "pass0"); } } - diff --git a/src/mesa/drivers/dri/i965/brw_wm_pass1.c b/src/mesa/drivers/dri/i965/brw_wm_pass1.c index f6f3a38e9e0..6eaed8a665b 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_pass1.c +++ b/src/mesa/drivers/dri/i965/brw_wm_pass1.c @@ -58,7 +58,8 @@ static void unlink_ref(struct brw_wm_ref *ref) if (ref == value->lastuse) { value->lastuse = ref->prevuse; - } else { + } + else { struct brw_wm_ref *i = value->lastuse; while (i->prevuse != ref) i = i->prevuse; i->prevuse = ref->prevuse; @@ -75,8 +76,9 @@ static void track_arg(struct brw_wm_compile *c, for (i = 0; i < 4; i++) { struct brw_wm_ref *ref = inst->src[arg][i]; if (ref) { - if (readmask & (1<value->contributes_to_output = 1; + } else { unlink_ref(ref); inst->src[arg][i] = NULL; @@ -88,15 +90,21 @@ static void track_arg(struct brw_wm_compile *c, static GLuint get_texcoord_mask( GLuint tex_idx ) { switch (tex_idx) { - case TEXTURE_1D_INDEX: return WRITEMASK_X; - case TEXTURE_2D_INDEX: return WRITEMASK_XY; - case TEXTURE_3D_INDEX: return WRITEMASK_XYZ; - case TEXTURE_CUBE_INDEX: return WRITEMASK_XYZ; - case TEXTURE_RECT_INDEX: return WRITEMASK_XY; + case TEXTURE_1D_INDEX: + return WRITEMASK_X; + case TEXTURE_2D_INDEX: + return WRITEMASK_XY; + case TEXTURE_3D_INDEX: + return WRITEMASK_XYZ; + case TEXTURE_CUBE_INDEX: + return WRITEMASK_XYZ; + case TEXTURE_RECT_INDEX: + return WRITEMASK_XY; default: return 0; } } + /* Step two: Basically this is dead code elimination. * * Iterate backwards over instructions, noting which values @@ -273,6 +281,3 @@ void brw_wm_pass1( struct brw_wm_compile *c ) brw_wm_print_program(c, "pass1"); } } - - - diff --git a/src/mesa/drivers/dri/i965/brw_wm_pass2.c b/src/mesa/drivers/dri/i965/brw_wm_pass2.c index 6fca9ad220a..780edbc42e6 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_pass2.c +++ b/src/mesa/drivers/dri/i965/brw_wm_pass2.c @@ -84,7 +84,7 @@ static void init_registers( struct brw_wm_compile *c ) for (j = 0; j < c->nr_creg; j++) prealloc_reg(c, &c->creg[j], i++); - for (j = 0; j < FRAG_ATTRIB_MAX; j++) + for (j = 0; j < FRAG_ATTRIB_MAX; j++) { if (inputs & (1<payload.input_interp[index], i++); } + } assert(nr_interp_regs >= 1); @@ -120,7 +121,7 @@ static void update_register_usage(struct brw_wm_compile *c, /* Only search those which can change: */ if (grf->nextuse < thisinsn) { - struct brw_wm_ref *ref = grf->value->lastuse; + const struct brw_wm_ref *ref = grf->value->lastuse; /* Has last use of value been passed? */ @@ -148,7 +149,7 @@ static void spill_value(struct brw_wm_compile *c, /* Allocate a spill slot. Note that allocations start from 0x40 - * the first slot is reserved to mean "undef" in brw_wm_emit.c */ - if (!value->spill_slot) { + if (!value->spill_slot) { c->last_scratch += 0x40; value->spill_slot = c->last_scratch; } @@ -189,7 +190,7 @@ static GLuint search_contiguous_regs(struct brw_wm_compile *c, if (grf[i+j].nextuse < group_nextuse) group_nextuse = grf[i+j].nextuse; } - + if (group_nextuse > furthest) { furthest = group_nextuse; reg = i; @@ -197,7 +198,7 @@ static GLuint search_contiguous_regs(struct brw_wm_compile *c, } assert(furthest != thisinsn); - + /* Any non-empty regs will need to be spilled: */ for (j = 0; j < nr; j++) @@ -243,7 +244,7 @@ static void alloc_contiguous_dest(struct brw_wm_compile *c, static void load_args(struct brw_wm_compile *c, struct brw_wm_instruction *inst) -{ +{ GLuint thisinsn = inst - c->instruction; GLuint i,j; @@ -258,17 +259,17 @@ static void load_args(struct brw_wm_compile *c, * register allocation and mark the ref as requiring a fill. */ GLuint reg = search_contiguous_regs(c, 1, thisinsn); - + c->pass2_grf[reg].value = ref->value; c->pass2_grf[reg].nextuse = thisinsn; - + ref->value->resident = &c->pass2_grf[reg]; /* Note that a fill is required: */ ref->unspill_reg = reg*2; } - + /* Adjust the hw_reg to point at the value's current location: */ assert(ref->value == ref->value->resident->value); @@ -294,7 +295,7 @@ void brw_wm_pass2( struct brw_wm_compile *c ) for (insn = 0; insn < c->nr_insns; insn++) { struct brw_wm_instruction *inst = &c->instruction[insn]; - + /* Update registers' nextuse values: */ update_register_usage(c, insn); @@ -322,11 +323,11 @@ void brw_wm_pass2( struct brw_wm_compile *c ) break; } - if (TEST_DST_SPILLS && inst->opcode != WM_PIXELXY) + if (TEST_DST_SPILLS && inst->opcode != WM_PIXELXY) { for (i = 0; i < 4; i++) if (inst->dst[i]) spill_value(c, inst->dst[i]); - + } } if (INTEL_DEBUG & DEBUG_WM) { @@ -339,6 +340,3 @@ void brw_wm_pass2( struct brw_wm_compile *c ) brw_wm_print_program(c, "pass2/done"); } } - - - -- cgit v1.2.3