From 9ea60ce58f8494e0b79771f93227f4b8181731de Mon Sep 17 00:00:00 2001 From: Paul Berry Date: Fri, 22 Jun 2012 20:45:49 -0700 Subject: i965/msaa: Implement glSampleCoverage. This patch enables glSampleCoverage() functionality, which allows the client program to specify that only a portion of the samples be lit up when performing multisampled rendering. i965 supports glSampleCoverage() through the 3DSTATE_SAMPLE_MASK command packet, which allows the driver to specify a bitfield indicating which samples to light up. Fixes piglit tests "EXT_framebuffer_multisample/sample-coverage {2,4} {inverted,non-inverted}". Reviewed-by: Anuj Phogat --- src/mesa/drivers/dri/i965/brw_context.h | 3 ++- src/mesa/drivers/dri/i965/gen6_blorp.cpp | 2 +- src/mesa/drivers/dri/i965/gen6_multisample_state.c | 26 ++++++++++++++++++---- src/mesa/drivers/dri/i965/gen7_blorp.cpp | 2 +- 4 files changed, 26 insertions(+), 7 deletions(-) (limited to 'src/mesa/drivers/dri') diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index 6e0e1add5f8..69659c4e53c 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -1151,7 +1151,8 @@ gen6_emit_3dstate_multisample(struct brw_context *brw, unsigned num_samples); void gen6_emit_3dstate_sample_mask(struct brw_context *brw, - unsigned num_samples); + unsigned num_samples, float coverage, + bool coverage_invert); /* gen7_urb.c */ void diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.cpp b/src/mesa/drivers/dri/i965/gen6_blorp.cpp index 3e11152cbd0..b2cafdb35c0 100644 --- a/src/mesa/drivers/dri/i965/gen6_blorp.cpp +++ b/src/mesa/drivers/dri/i965/gen6_blorp.cpp @@ -1042,7 +1042,7 @@ gen6_blorp_exec(struct intel_context *intel, uint32_t prog_offset = params->get_wm_prog(brw, &prog_data); gen6_blorp_emit_batch_head(brw, params); gen6_emit_3dstate_multisample(brw, params->num_samples); - gen6_emit_3dstate_sample_mask(brw, params->num_samples); + gen6_emit_3dstate_sample_mask(brw, params->num_samples, 1.0, false); gen6_blorp_emit_state_base_address(brw, params); gen6_blorp_emit_vertices(brw, params); gen6_blorp_emit_urb_config(brw, params); diff --git a/src/mesa/drivers/dri/i965/gen6_multisample_state.c b/src/mesa/drivers/dri/i965/gen6_multisample_state.c index 3cf94f68bdb..f0648c3fcc7 100644 --- a/src/mesa/drivers/dri/i965/gen6_multisample_state.c +++ b/src/mesa/drivers/dri/i965/gen6_multisample_state.c @@ -56,7 +56,8 @@ gen6_emit_3dstate_multisample(struct brw_context *brw, */ void gen6_emit_3dstate_sample_mask(struct brw_context *brw, - unsigned num_samples) + unsigned num_samples, float coverage, + bool coverage_invert) { struct intel_context *intel = &brw->intel; @@ -65,7 +66,15 @@ gen6_emit_3dstate_sample_mask(struct brw_context *brw, BEGIN_BATCH(2); OUT_BATCH(_3DSTATE_SAMPLE_MASK << 16 | (2 - 2)); - OUT_BATCH(num_samples > 0 ? 15 : 1); + if (num_samples > 0) { + int coverage_int = (int) (num_samples * coverage + 0.5); + uint32_t coverage_bits = (1 << coverage_int) - 1; + if (coverage_invert) + coverage_bits ^= (1 << num_samples) - 1; + OUT_BATCH(coverage_bits); + } else { + OUT_BATCH(1); + } ADVANCE_BATCH(); } @@ -75,6 +84,14 @@ static void upload_multisample_state(struct brw_context *brw) struct intel_context *intel = &brw->intel; struct gl_context *ctx = &intel->ctx; unsigned num_samples = 0; + float coverage = 1.0; + float coverage_invert = false; + + /* _NEW_MULTISAMPLE */ + if (ctx->Multisample._Enabled && ctx->Multisample.SampleCoverage) { + coverage = ctx->Multisample.SampleCoverageValue; + coverage_invert = ctx->Multisample.SampleCoverageInvert; + } /* _NEW_BUFFERS */ if (ctx->DrawBuffer->_ColorDrawBuffers[0]) @@ -84,13 +101,14 @@ static void upload_multisample_state(struct brw_context *brw) intel_emit_post_sync_nonzero_flush(intel); gen6_emit_3dstate_multisample(brw, num_samples); - gen6_emit_3dstate_sample_mask(brw, num_samples); + gen6_emit_3dstate_sample_mask(brw, num_samples, coverage, coverage_invert); } const struct brw_tracked_state gen6_multisample_state = { .dirty = { - .mesa = _NEW_BUFFERS, + .mesa = _NEW_BUFFERS | + _NEW_MULTISAMPLE, .brw = BRW_NEW_CONTEXT, .cache = 0 }, diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.cpp b/src/mesa/drivers/dri/i965/gen7_blorp.cpp index bf79891b085..ec6312078b7 100644 --- a/src/mesa/drivers/dri/i965/gen7_blorp.cpp +++ b/src/mesa/drivers/dri/i965/gen7_blorp.cpp @@ -733,7 +733,7 @@ gen7_blorp_exec(struct intel_context *intel, gen6_blorp_emit_batch_head(brw, params); gen7_allocate_push_constants(brw); gen6_emit_3dstate_multisample(brw, params->num_samples); - gen6_emit_3dstate_sample_mask(brw, params->num_samples); + gen6_emit_3dstate_sample_mask(brw, params->num_samples, 1.0, false); gen6_blorp_emit_state_base_address(brw, params); gen6_blorp_emit_vertices(brw, params); gen7_blorp_emit_urb_config(brw, params); -- cgit v1.2.3