From f0896e7f80c2c00d263b3ecd7bb18dfffa9a01a8 Mon Sep 17 00:00:00 2001 From: Marek Olšák Date: Wed, 26 May 2010 04:36:29 +0200 Subject: r300/compiler: implement SGT+SLE opcodes Reported-by: Gianluca Anzolin --- .../drivers/dri/r300/compiler/radeon_program_alu.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) (limited to 'src/mesa/drivers/dri/r300/compiler') diff --git a/src/mesa/drivers/dri/r300/compiler/radeon_program_alu.c b/src/mesa/drivers/dri/r300/compiler/radeon_program_alu.c index 6e8a0d24a48..d07843c2c94 100644 --- a/src/mesa/drivers/dri/r300/compiler/radeon_program_alu.c +++ b/src/mesa/drivers/dri/r300/compiler/radeon_program_alu.c @@ -600,6 +600,24 @@ static void transform_r300_vertex_fix_LIT(struct radeon_compiler* c, inst->U.I.SrcReg[0] = srcreg(RC_FILE_TEMPORARY, tempreg); } +static void transform_r300_vertex_SGT(struct radeon_compiler* c, + struct rc_instruction* inst) +{ + /* x > y <==> -x < -y */ + inst->U.I.Opcode = RC_OPCODE_SLT; + inst->U.I.SrcReg[0].Negate ^= RC_MASK_XYZW; + inst->U.I.SrcReg[1].Negate ^= RC_MASK_XYZW; +} + +static void transform_r300_vertex_SLE(struct radeon_compiler* c, + struct rc_instruction* inst) +{ + /* x <= y <==> -x >= -y */ + inst->U.I.Opcode = RC_OPCODE_SGE; + inst->U.I.SrcReg[0].Negate ^= RC_MASK_XYZW; + inst->U.I.SrcReg[1].Negate ^= RC_MASK_XYZW; +} + /** * For use with radeonLocalTransform, this transforms non-native ALU * instructions of the r300 up to r500 vertex engine. @@ -621,6 +639,8 @@ int r300_transform_vertex_alu( case RC_OPCODE_SUB: transform_SUB(c, inst); return 1; case RC_OPCODE_SWZ: transform_SWZ(c, inst); return 1; case RC_OPCODE_XPD: transform_XPD(c, inst); return 1; + case RC_OPCODE_SLE: transform_r300_vertex_SLE(c, inst); return 1; + case RC_OPCODE_SGT: transform_r300_vertex_SGT(c, inst); return 1; default: return 0; } -- cgit v1.2.3