From a5e1c9f1d5b6063f0a92634967475a05362c0d31 Mon Sep 17 00:00:00 2001 From: Topi Pohjolainen Date: Thu, 8 Jun 2017 11:24:51 +0300 Subject: i965/gen4: Add support for single layer in alignment workaround On gen < 6 one doesn't have level or layer specifiers available for render and depth targets. In order to support rendering to specific level/layer, driver needs to manually offset the surface to the desired slice. There are, however, alignment restrictions to respect as well and in come cases the only option is to use temporary single slice surface which driver copies after rendering to the full miptree. Current alignment workaround introduces new texture images which are added to the parent texture object. Texture validation later on copies the additional levels back to the surface that contains the full mipmap. This only works for non-arrayed surfaces and driver currently creates new arrayed images in vain - individual layers within the newly created are still unaligned the same as before. This patch drops this mechanism and instead attaches single temporary slice into the render buffer. This gets immediately copied back to the mipmapped and/or arrayed surface just after the render is done. Sitting on top of earlier series cleaning up the depth buffer state, this patch additionally fixes the following piglit tests: arb_framebuffer_object.fbo-generatemipmap-cubemap.g965m64 arb_texture_cube_map.copyteximage cube.g965m64 arb_texture_cube_map.copyteximage cube.ilkm64 arb_pixel_buffer_object.texsubimage array pbo.g965m64 ext_framebuffer_object.fbo-cubemap.g965m64 ext_texture_array.copyteximage 1d_array.g45m64 ext_texture_array.copyteximage 1d_array.g965m64 ext_texture_array.copyteximage 1d_array.ilkm64 ext_texture_array.copyteximage 2d_array.g45m64 ext_texture_array.copyteximage 2d_array.g965m64 ext_texture_array.copyteximage 2d_array.ilkm64 ext_texture_array.fbo-array.g965m64 ext_texture_array.fbo-generatemipmap-array.g965m64 ext_texture_array.gen-mipmap.g965m64 Reviewed-by: Jason Ekstrand Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_fbo.c | 19 ++++++++++++------- 1 file changed, 12 insertions(+), 7 deletions(-) (limited to 'src/mesa/drivers/dri/i965/intel_fbo.c') diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c b/src/mesa/drivers/dri/i965/intel_fbo.c index 864ff32a1bb..478e7b88842 100644 --- a/src/mesa/drivers/dri/i965/intel_fbo.c +++ b/src/mesa/drivers/dri/i965/intel_fbo.c @@ -952,11 +952,11 @@ intel_renderbuffer_move_to_temp(struct brw_context *brw, intel_get_image_dims(rb->TexImage, &width, &height, &depth); - new_mt = intel_miptree_create(brw, rb->TexImage->TexObject->Target, + assert(irb->align_wa_mt == NULL); + new_mt = intel_miptree_create(brw, GL_TEXTURE_2D, intel_image->base.Base.TexFormat, - intel_image->base.Base.Level, - intel_image->base.Base.Level, - width, height, depth, + 0, 0, + width, height, 1, irb->mt->num_samples, layout_flags); @@ -964,11 +964,16 @@ intel_renderbuffer_move_to_temp(struct brw_context *brw, intel_miptree_alloc_hiz(brw, new_mt); } - intel_miptree_copy_teximage(brw, intel_image, new_mt, invalidate); + if (!invalidate) + intel_miptree_copy_slice(brw, intel_image->mt, + intel_image->base.Base.Level, irb->mt_layer, + new_mt, 0, 0); - intel_miptree_reference(&irb->mt, intel_image->mt); - intel_renderbuffer_set_draw_offset(irb); + intel_miptree_reference(&irb->align_wa_mt, new_mt); intel_miptree_release(&new_mt); + + irb->draw_x = 0; + irb->draw_y = 0; } void -- cgit v1.2.3