From 6fa1130cd21926cdd4ae86aa12ee3f5c0bb5ba33 Mon Sep 17 00:00:00 2001 From: Ben Widawsky Date: Tue, 13 Oct 2015 20:50:21 -0700 Subject: i965/skl: skip fast clears for certain surface formats Some of the information originally in this commit message is now in the patch before this. SKL adds compressible render targets and as a result mutates some of the programming for fast clears and resolves. There is a new internal surface type called the CCS. The old AUX_MCS bit becomes AUX_CCS_D. "Auxiliary Surfaces For Sampled Tiled Resource". The formats which are supported are defined in the table titled "Render Target Surface Types [SKL+]". There is no PRM yet to reference. The previously implemented helper function already does the right thing provided the table is correct. v2: Use better English in commit message (Matt) s/compressable/compressible/ (Matt) Don't compare bools to true (Matt) Use the helper function and don't increase the context size - this is mostly implemented in the patch just before this (Chad, Neil) Remove an "invalid" assert (Chad) Fix assertion to check num_samples > 1, instead of num_samples (Chad) v3: Use Matt's code as Requested-by: Chad. I didn't even look at it since Chad said he was fine with that, and presumably Matt is fine with it. v4: Use better quote from spec (Topi) Cc: Chad Versace Signed-off-by: Ben Widawsky Reviewed-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/gen8_surface_state.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'src/mesa/drivers/dri/i965/gen8_surface_state.c') diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c b/src/mesa/drivers/dri/i965/gen8_surface_state.c index 69098583357..e81b64629f8 100644 --- a/src/mesa/drivers/dri/i965/gen8_surface_state.c +++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c @@ -222,6 +222,7 @@ gen8_emit_texture_surface_state(struct brw_context *brw, int surf_index = surf_offset - &brw->wm.base.surf_offset[0]; unsigned tiling_mode, pitch; const unsigned tr_mode = surface_tiling_resource_mode(mt->tr_mode); + const uint32_t surf_type = translate_tex_target(target); if (mt->format == MESA_FORMAT_S_UINT8) { tiling_mode = GEN8_SURFACE_TILING_W; @@ -245,9 +246,14 @@ gen8_emit_texture_surface_state(struct brw_context *brw, */ if (brw->gen >= 9 || mt->num_samples == 1) assert(mt->halign == 16); + + if (brw->gen >= 9) { + assert(mt->num_samples > 1 || + brw_losslessly_compressible_format(brw, surf_type)); + } + } - const uint32_t surf_type = translate_tex_target(target); uint32_t *surf = allocate_surface_state(brw, surf_offset, surf_index); surf[0] = SET_FIELD(surf_type, BRW_SURFACE_TYPE) | -- cgit v1.2.3