From 4b35ab9bdb4e663f41ff5c9ae5bbcc650b6093f9 Mon Sep 17 00:00:00 2001 From: Chris Wilson Date: Thu, 30 Apr 2015 17:04:51 +0100 Subject: i965: Rename intel_emit* to reflect their new location in brw_pipe_control Signed-off-by: Chris Wilson Reviewed-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_state_upload.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/mesa/drivers/dri/i965/brw_state_upload.c') diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c index 08d1ac28885..7662c3b580c 100644 --- a/src/mesa/drivers/dri/i965/brw_state_upload.c +++ b/src/mesa/drivers/dri/i965/brw_state_upload.c @@ -349,7 +349,7 @@ brw_upload_initial_gpu_state(struct brw_context *brw) return; if (brw->gen == 6) - intel_emit_post_sync_nonzero_flush(brw); + brw_emit_post_sync_nonzero_flush(brw); brw_upload_invariant_state(brw); @@ -710,7 +710,7 @@ brw_upload_pipeline_state(struct brw_context *brw, /* Emit Sandybridge workaround flushes on every primitive, for safety. */ if (brw->gen == 6) - intel_emit_post_sync_nonzero_flush(brw); + brw_emit_post_sync_nonzero_flush(brw); brw_upload_programs(brw, pipeline); merge_ctx_state(brw, &state); -- cgit v1.2.3