From 36e82b137d4a77f24de0fc722c80e445b6e3375c Mon Sep 17 00:00:00 2001 From: Iago Toral Quiroga Date: Tue, 22 Sep 2015 13:01:18 +0200 Subject: i965: make pull constant loads in gen6 start at MRFs 16/17 So they do not conflict with our (un)spills (MRF 21..23) or our URB writes (MRF 1..15) Reviewed-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_fs.cpp | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'src/mesa/drivers/dri/i965/brw_fs.cpp') diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index 2a90ed4b165..b4b98109e0c 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp @@ -50,6 +50,8 @@ #include "glsl/glsl_types.h" #include "program/sampler.h" +#define FIRST_PULL_LOAD_MRF(gen) ((gen) == 6 ? 16 : 13) + using namespace brw; void @@ -210,7 +212,7 @@ fs_visitor::VARYING_PULL_CONSTANT_LOAD(const fs_builder &bld, inst->regs_written = regs_written; if (devinfo->gen < 7) { - inst->base_mrf = 13; + inst->base_mrf = FIRST_PULL_LOAD_MRF(devinfo->gen); inst->header_size = 1; if (devinfo->gen == 4) inst->mlen = 3; @@ -2999,7 +3001,7 @@ fs_visitor::lower_uniform_pull_constant_loads() * else does except for register spill/unspill, which generates and * uses its MRF within a single IR instruction. */ - inst->base_mrf = 14; + inst->base_mrf = FIRST_PULL_LOAD_MRF(devinfo->gen) + 1; inst->mlen = 1; } } -- cgit v1.2.3