From 014251ef42e296bb9ed43f2a9fc00752fbf4450e Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Thu, 20 Jun 2013 15:04:54 -0700 Subject: i915: Drop context fields specific to 965+ chipsets. Reviewed-by: Kenneth Graunke --- src/mesa/drivers/dri/i915/intel_context.h | 29 ----------------------------- 1 file changed, 29 deletions(-) (limited to 'src/mesa/drivers/dri/i915/intel_context.h') diff --git a/src/mesa/drivers/dri/i915/intel_context.h b/src/mesa/drivers/dri/i915/intel_context.h index 033ab476826..50ddf54977d 100644 --- a/src/mesa/drivers/dri/i915/intel_context.h +++ b/src/mesa/drivers/dri/i915/intel_context.h @@ -171,28 +171,6 @@ struct intel_context void (*annotate_aub)(struct intel_context *intel); bool (*render_target_supported)(struct intel_context *intel, struct gl_renderbuffer *rb); - - /** - * Surface state operations (i965+ only) - * \{ - */ - void (*update_texture_surface)(struct gl_context *ctx, - unsigned unit, - uint32_t *binding_table, - unsigned surf_index); - void (*update_renderbuffer_surface)(struct brw_context *brw, - struct gl_renderbuffer *rb, - bool layered, - unsigned unit); - void (*update_null_renderbuffer_surface)(struct brw_context *brw, - unsigned unit); - void (*create_constant_surface)(struct brw_context *brw, - drm_intel_bo *bo, - uint32_t offset, - uint32_t size, - uint32_t *out_offset, - bool dword_pitch); - /** \} */ } vtbl; GLbitfield Fallback; /**< mask of INTEL_FALLBACK_x bits */ @@ -205,16 +183,9 @@ struct intel_context * Generation number of the hardware: 2 is 8xx, 3 is 9xx pre-965, 4 is 965. */ int gen; - int gt; - bool is_haswell; - bool is_baytrail; - bool is_g4x; bool is_945; - bool has_llc; bool has_swizzling; - int urb_size; - drm_intel_context *hw_ctx; struct intel_batchbuffer batch; -- cgit v1.2.3