From dee58ecd2e3b23d1a3d2cdffb99d3dd314421b39 Mon Sep 17 00:00:00 2001 From: Jason Ekstrand Date: Thu, 2 Nov 2017 18:32:39 -0700 Subject: intel/fs/nir: Use Q immediates for load_const on gen8+ MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Reviewed-by: Samuel Iglesias Gonsálvez --- src/intel/compiler/brw_fs_nir.cpp | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) (limited to 'src/intel') diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index 99e652a4a0c..342ac8170b0 100644 --- a/src/intel/compiler/brw_fs_nir.cpp +++ b/src/intel/compiler/brw_fs_nir.cpp @@ -1442,9 +1442,17 @@ fs_visitor::nir_emit_load_const(const fs_builder &bld, break; case 64: - for (unsigned i = 0; i < instr->def.num_components; i++) - bld.MOV(offset(reg, bld, i), - setup_imm_df(bld, instr->value.f64[i])); + assert(devinfo->gen >= 7); + if (devinfo->gen == 7) { + /* We don't get 64-bit integer types until gen8 */ + for (unsigned i = 0; i < instr->def.num_components; i++) { + bld.MOV(retype(offset(reg, bld, i), BRW_REGISTER_TYPE_DF), + setup_imm_df(bld, instr->value.f64[i])); + } + } else { + for (unsigned i = 0; i < instr->def.num_components; i++) + bld.MOV(offset(reg, bld, i), brw_imm_q(instr->value.i64[i])); + } break; default: -- cgit v1.2.3