From 47c2aa5b481389bfc68d688f02aa1fd4f095713a Mon Sep 17 00:00:00 2001 From: Ian Romanick Date: Wed, 12 Jun 2019 13:19:25 -0700 Subject: intel/vec4: Reswizzle VF immediates too Previously, an instruction like mul(8) vgrf29.xy:F, vgrf25.yxxx:F, [-1F, 1F, 0F, 0F] would get rewritten as mul(8) vgrf0.yz:F, vgrf25.yyxx:F, [-1F, 1F, 0F, 0F] The latter does not produce the correct result. The VF immediate in the second should be either [-1F, -1F, 1F, 1F] or [0F, -1F, 1F, 0F]. This commit produces the former. Fixes: 1ee1d8ab468 ("i965/vec4: Reswizzle sources when necessary.") Reviewed-by: Matt Turner --- src/intel/compiler/brw_vec4.cpp | 24 +++++++++++++++++++++++- 1 file changed, 23 insertions(+), 1 deletion(-) (limited to 'src/intel/compiler') diff --git a/src/intel/compiler/brw_vec4.cpp b/src/intel/compiler/brw_vec4.cpp index 971439fa472..26e2a0ecf5b 100644 --- a/src/intel/compiler/brw_vec4.cpp +++ b/src/intel/compiler/brw_vec4.cpp @@ -1204,9 +1204,31 @@ vec4_instruction::reswizzle(int dst_writemask, int swizzle) opcode != BRW_OPCODE_DP3 && opcode != BRW_OPCODE_DP2 && opcode != VEC4_OPCODE_PACK_BYTES) { for (int i = 0; i < 3; i++) { - if (src[i].file == BAD_FILE || src[i].file == IMM) + if (src[i].file == BAD_FILE) continue; + if (src[i].file == IMM) { + assert(src[i].type != BRW_REGISTER_TYPE_V && + src[i].type != BRW_REGISTER_TYPE_UV); + + /* Vector immediate types need to be reswizzled. */ + if (src[i].type == BRW_REGISTER_TYPE_VF) { + const unsigned imm[] = { + (src[i].ud >> 0) & 0x0ff, + (src[i].ud >> 8) & 0x0ff, + (src[i].ud >> 16) & 0x0ff, + (src[i].ud >> 24) & 0x0ff, + }; + + src[i] = brw_imm_vf4(imm[BRW_GET_SWZ(swizzle, 0)], + imm[BRW_GET_SWZ(swizzle, 1)], + imm[BRW_GET_SWZ(swizzle, 2)], + imm[BRW_GET_SWZ(swizzle, 3)]); + } + + continue; + } + src[i].swizzle = brw_compose_swizzle(swizzle, src[i].swizzle); } } -- cgit v1.2.3