From 3a584a15c0b1dd6c31a6520a0f749306f48d5782 Mon Sep 17 00:00:00 2001 From: Matt Turner Date: Mon, 23 Oct 2017 10:44:39 -0700 Subject: intel/compiler/fs: Don't generate integer DWord multiply on Gen11 Like CHV et al., Gen11 does not support 32x32 -> 32/64-bit integer multiplies. Reviewed-by: Kenneth Graunke --- src/intel/compiler/brw_fs.cpp | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) (limited to 'src/intel/compiler') diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp index bed632d21b9..113f62c46c7 100644 --- a/src/intel/compiler/brw_fs.cpp +++ b/src/intel/compiler/brw_fs.cpp @@ -3549,11 +3549,7 @@ fs_visitor::lower_integer_multiplication() inst->dst.type != BRW_REGISTER_TYPE_UD)) continue; - /* Gen8's MUL instruction can do a 32-bit x 32-bit -> 32-bit - * operation directly, but CHV/BXT cannot. - */ - if (devinfo->gen >= 8 && - !devinfo->is_cherryview && !gen_device_info_is_9lp(devinfo)) + if (devinfo->has_integer_dword_mul) continue; if (inst->src[1].file == IMM && -- cgit v1.2.3