From a1afef8de0118a5952e21fec7e017c905a59637f Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Sun, 10 Dec 2017 17:03:32 -0800 Subject: i965: Combine {VS,FS}_OPCODE_GET_BUFFER_SIZE opcodes. These are the same, we don't need a separate opcode enum per backend. Reviewed-by: Jason Ekstrand --- src/intel/compiler/brw_vec4_nir.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/intel/compiler/brw_vec4_nir.cpp') diff --git a/src/intel/compiler/brw_vec4_nir.cpp b/src/intel/compiler/brw_vec4_nir.cpp index 4ff3ef9927e..7131fa06b4a 100644 --- a/src/intel/compiler/brw_vec4_nir.cpp +++ b/src/intel/compiler/brw_vec4_nir.cpp @@ -455,7 +455,7 @@ vec4_visitor::nir_emit_intrinsic(nir_intrinsic_instr *instr) prog_data->base.binding_table.ssbo_start + ssbo_index; dst_reg result_dst = get_nir_dest(instr->dest); vec4_instruction *inst = new(mem_ctx) - vec4_instruction(VS_OPCODE_GET_BUFFER_SIZE, result_dst); + vec4_instruction(SHADER_OPCODE_GET_BUFFER_SIZE, result_dst); inst->base_mrf = 2; inst->mlen = 1; /* always at least one */ -- cgit v1.2.3