From 70de61594dcf99f24eb31ebf98d62f13e1f44c2e Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Sun, 22 Nov 2015 20:12:17 -0800 Subject: i965/fs: Add infrastructure for generating CSEL instructions. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit v2 (idr): Don't allow CSEL with a non-float src2. v3 (idr): Add CSEL to fs_inst::flags_written. Suggested by Matt. v4 (idr): Only set BRW_ALIGN_16 on Gen < 10 (suggested by Matt). Don't reset the access mode afterwards (suggested by Samuel and Matt). Add support for CSEL not modifying the flags to more places (requested by Matt). Signed-off-by: Kenneth Graunke Signed-off-by: Ian Romanick Reviewed-by: Samuel Iglesias Gonsálvez [v3] Reviewed-by: Matt Turner --- src/intel/compiler/brw_vec4.cpp | 1 + 1 file changed, 1 insertion(+) (limited to 'src/intel/compiler/brw_vec4.cpp') diff --git a/src/intel/compiler/brw_vec4.cpp b/src/intel/compiler/brw_vec4.cpp index ac6b997b668..e4838146ac1 100644 --- a/src/intel/compiler/brw_vec4.cpp +++ b/src/intel/compiler/brw_vec4.cpp @@ -1557,6 +1557,7 @@ vec4_visitor::dump_instruction(backend_instruction *be_inst, FILE *file) fprintf(file, "%s", conditional_modifier[inst->conditional_mod]); if (!inst->predicate && (devinfo->gen < 5 || (inst->opcode != BRW_OPCODE_SEL && + inst->opcode != BRW_OPCODE_CSEL && inst->opcode != BRW_OPCODE_IF && inst->opcode != BRW_OPCODE_WHILE))) { fprintf(file, ".f%d.%d", inst->flag_subreg / 2, inst->flag_subreg % 2); -- cgit v1.2.3