From e8f0483ec408037ce7b7c6014674f13cc4461079 Mon Sep 17 00:00:00 2001 From: Tapani Pälli Date: Fri, 6 Mar 2020 08:59:16 +0200 Subject: intel/compiler: detect if atomic load store operations are used MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Patch adds a new arg and modifies existing calls from i965, anv pass NULL but iris stores this information for later use. Signed-off-by: Tapani Pälli Reviewed-by: Lionel Landwerlin Part-of: --- src/intel/compiler/brw_nir.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'src/intel/compiler/brw_nir.h') diff --git a/src/intel/compiler/brw_nir.h b/src/intel/compiler/brw_nir.h index 32a8badaa24..b0ef195c261 100644 --- a/src/intel/compiler/brw_nir.h +++ b/src/intel/compiler/brw_nir.h @@ -121,7 +121,8 @@ void brw_nir_lower_fs_outputs(nir_shader *nir); bool brw_nir_lower_conversions(nir_shader *nir); bool brw_nir_lower_image_load_store(nir_shader *nir, - const struct gen_device_info *devinfo); + const struct gen_device_info *devinfo, + bool *uses_atomic_load_store); void brw_nir_rewrite_image_intrinsic(nir_intrinsic_instr *intrin, nir_ssa_def *index); void brw_nir_rewrite_bindless_image_intrinsic(nir_intrinsic_instr *intrin, -- cgit v1.2.3