From de7ed0ba55225c391b439a129c4fc5f57359416f Mon Sep 17 00:00:00 2001
From: Anusha Srivatsa <anusha.srivatsa@intel.com>
Date: Thu, 22 Jun 2017 10:42:32 -0700
Subject: i965/CFL: Add PCI Ids for Coffee Lake.

Coffee Lake has a gen9 graphics following KBL.
From 3D perspective, CFL is a clone of KBL/SKL features.

v2: Change commit message, correct alignment <Anuj Phogat>
v3: Update IDs.
v4: Initialize l3_banks, correct nomenclature <Anuj>

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Acked-by: Benjamin Widawsky <benjamin.widawsky@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
---
 src/intel/common/gen_device_info.c | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

(limited to 'src/intel/common/gen_device_info.c')

diff --git a/src/intel/common/gen_device_info.c b/src/intel/common/gen_device_info.c
index 423748ea08c..f008b76ea47 100644
--- a/src/intel/common/gen_device_info.c
+++ b/src/intel/common/gen_device_info.c
@@ -607,6 +607,32 @@ static const struct gen_device_info gen_device_info_glk_2x6 = {
    .is_geminilake = true,
 };
 
+static const struct gen_device_info gen_device_info_cfl_gt1 = {
+   GEN9_FEATURES,
+   .is_coffeelake = true,
+   .gt = 1,
+
+   .num_slices = 1,
+   .l3_banks = 2,
+};
+static const struct gen_device_info gen_device_info_cfl_gt2 = {
+   GEN9_FEATURES,
+   .is_coffeelake = true,
+   .gt = 2,
+
+   .num_slices = 1,
+   .l3_banks = 4,
+};
+
+static const struct gen_device_info gen_device_info_cfl_gt3 = {
+   GEN9_FEATURES,
+   .is_coffeelake = true,
+   .gt = 3,
+
+   .num_slices = 2,
+   .l3_banks = 8,
+};
+
 #define GEN10_HW_INFO                               \
    .gen = 10,                                       \
    .num_thread_per_eu = 7,                          \
-- 
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