From b85a229e1f542426b1c8000569d89cd4768b9339 Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Thu, 7 Jan 2016 15:54:16 -0800 Subject: glsl: Delete the ir_binop_bfm and ir_triop_bfi opcodes. TGSI doesn't use these - it just translates ir_quadop_bitfield_insert directly. NIR can handle ir_quadop_bitfield_insert as well. These opcodes were only used for i965, and with Jason's recent patches, we can do this lowering in NIR (which also gains us SPIR-V handling). So there's not much point to retaining this GLSL IR lowering code. Signed-off-by: Kenneth Graunke Reviewed-by: Matt Turner Reviewed-by: Iago Toral Quiroga --- src/glsl/ir_constant_expression.cpp | 17 ----------------- 1 file changed, 17 deletions(-) (limited to 'src/glsl/ir_constant_expression.cpp') diff --git a/src/glsl/ir_constant_expression.cpp b/src/glsl/ir_constant_expression.cpp index f02e959bd18..38b6dd59759 100644 --- a/src/glsl/ir_constant_expression.cpp +++ b/src/glsl/ir_constant_expression.cpp @@ -1616,23 +1616,6 @@ ir_expression::constant_expression_value(struct hash_table *variable_context) break; } - case ir_binop_bfm: { - int bits = op[0]->value.i[0]; - int offset = op[1]->value.i[0]; - - for (unsigned c = 0; c < components; c++) { - if (bits == 0) - data.u[c] = op[0]->value.u[c]; - else if (offset < 0 || bits < 0) - data.u[c] = 0; /* Undefined for bitfieldInsert, per spec. */ - else if (offset + bits > 32) - data.u[c] = 0; /* Undefined for bitfieldInsert, per spec. */ - else - data.u[c] = ((1 << bits) - 1) << offset; - } - break; - } - case ir_binop_ldexp: for (unsigned c = 0; c < components; c++) { if (op[0]->type->base_type == GLSL_TYPE_DOUBLE) { -- cgit v1.2.3