From b6051bc7859829588b2361da96f8e828a7fe1326 Mon Sep 17 00:00:00 2001 From: Tom Stellard Date: Thu, 26 Jul 2012 19:20:14 +0000 Subject: radeon/llvm: Remove AMDGPUUtil.cpp --- src/gallium/drivers/radeon/AMDGPUISelLowering.cpp | 3 +- src/gallium/drivers/radeon/AMDGPUUtil.cpp | 41 ----------------------- src/gallium/drivers/radeon/AMDGPUUtil.h | 32 ------------------ src/gallium/drivers/radeon/Makefile.sources | 1 - src/gallium/drivers/radeon/R600ISelLowering.cpp | 1 - src/gallium/drivers/radeon/SIAssignInterpRegs.cpp | 23 +++++++++++-- src/gallium/drivers/radeon/SICodeEmitter.cpp | 1 - src/gallium/drivers/radeon/SIRegisterInfo.cpp | 1 - 8 files changed, 22 insertions(+), 81 deletions(-) delete mode 100644 src/gallium/drivers/radeon/AMDGPUUtil.cpp delete mode 100644 src/gallium/drivers/radeon/AMDGPUUtil.h (limited to 'src/gallium') diff --git a/src/gallium/drivers/radeon/AMDGPUISelLowering.cpp b/src/gallium/drivers/radeon/AMDGPUISelLowering.cpp index e22df8efb0e..0a70164fcbf 100644 --- a/src/gallium/drivers/radeon/AMDGPUISelLowering.cpp +++ b/src/gallium/drivers/radeon/AMDGPUISelLowering.cpp @@ -13,10 +13,9 @@ #include "AMDGPUISelLowering.h" #include "AMDILIntrinsicInfo.h" -#include "AMDGPUUtil.h" -#include "llvm/CodeGen/SelectionDAG.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineRegisterInfo.h" +#include "llvm/CodeGen/SelectionDAG.h" #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h" using namespace llvm; diff --git a/src/gallium/drivers/radeon/AMDGPUUtil.cpp b/src/gallium/drivers/radeon/AMDGPUUtil.cpp deleted file mode 100644 index 4bbb5e0ce1b..00000000000 --- a/src/gallium/drivers/radeon/AMDGPUUtil.cpp +++ /dev/null @@ -1,41 +0,0 @@ -//===-- AMDGPUUtil.cpp - AMDGPU Utility functions -------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// Common utility functions used by hw codegen targets -// -//===----------------------------------------------------------------------===// - -#include "AMDGPUUtil.h" -#include "AMDGPUInstrInfo.h" -#include "AMDGPURegisterInfo.h" -#include "AMDIL.h" -#include "llvm/CodeGen/MachineFunction.h" -#include "llvm/CodeGen/MachineInstrBuilder.h" -#include "llvm/CodeGen/MachineRegisterInfo.h" -#include "llvm/Target/TargetInstrInfo.h" -#include "llvm/Target/TargetMachine.h" -#include "llvm/Target/TargetRegisterInfo.h" - -using namespace llvm; - -void AMDGPU::utilAddLiveIn(MachineFunction * MF, - MachineRegisterInfo & MRI, - const TargetInstrInfo * TII, - unsigned physReg, unsigned virtReg) -{ - if (!MRI.isLiveIn(physReg)) { - MRI.addLiveIn(physReg, virtReg); - MF->front().addLiveIn(physReg); - BuildMI(MF->front(), MF->front().begin(), DebugLoc(), - TII->get(TargetOpcode::COPY), virtReg) - .addReg(physReg); - } else { - MRI.replaceRegWith(virtReg, MRI.getLiveInVirtReg(physReg)); - } -} diff --git a/src/gallium/drivers/radeon/AMDGPUUtil.h b/src/gallium/drivers/radeon/AMDGPUUtil.h deleted file mode 100644 index 5ae95e7efce..00000000000 --- a/src/gallium/drivers/radeon/AMDGPUUtil.h +++ /dev/null @@ -1,32 +0,0 @@ -//===-- AMDGPUUtil.h - AMDGPU Utility function declarations -----*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// Declarations for utility functions common to all hw codegen targets. -// -//===----------------------------------------------------------------------===// - -#ifndef AMDGPU_UTIL_H -#define AMDGPU_UTIL_H - -namespace llvm { - -class MachineFunction; -class MachineRegisterInfo; -class TargetInstrInfo; - -namespace AMDGPU { - -void utilAddLiveIn(MachineFunction * MF, MachineRegisterInfo & MRI, - const TargetInstrInfo * TII, unsigned physReg, unsigned virtReg); - -} // End namespace AMDGPU - -} // End namespace llvm - -#endif // AMDGPU_UTIL_H diff --git a/src/gallium/drivers/radeon/Makefile.sources b/src/gallium/drivers/radeon/Makefile.sources index 5e0d415cfb3..3a75ce96945 100644 --- a/src/gallium/drivers/radeon/Makefile.sources +++ b/src/gallium/drivers/radeon/Makefile.sources @@ -34,7 +34,6 @@ CPP_SOURCES := \ AMDGPUConvertToISA.cpp \ AMDGPUInstrInfo.cpp \ AMDGPURegisterInfo.cpp \ - AMDGPUUtil.cpp \ R600CodeEmitter.cpp \ R600ISelLowering.cpp \ R600InstrInfo.cpp \ diff --git a/src/gallium/drivers/radeon/R600ISelLowering.cpp b/src/gallium/drivers/radeon/R600ISelLowering.cpp index bfc9227db7b..f33d90e4fd4 100644 --- a/src/gallium/drivers/radeon/R600ISelLowering.cpp +++ b/src/gallium/drivers/radeon/R600ISelLowering.cpp @@ -13,7 +13,6 @@ //===----------------------------------------------------------------------===// #include "R600ISelLowering.h" -#include "AMDGPUUtil.h" #include "R600InstrInfo.h" #include "R600MachineFunctionInfo.h" #include "llvm/CodeGen/MachineInstrBuilder.h" diff --git a/src/gallium/drivers/radeon/SIAssignInterpRegs.cpp b/src/gallium/drivers/radeon/SIAssignInterpRegs.cpp index 817a10120d2..79e099badd4 100644 --- a/src/gallium/drivers/radeon/SIAssignInterpRegs.cpp +++ b/src/gallium/drivers/radeon/SIAssignInterpRegs.cpp @@ -19,10 +19,10 @@ #include "AMDGPU.h" -#include "AMDGPUUtil.h" #include "AMDIL.h" #include "SIMachineFunctionInfo.h" #include "llvm/CodeGen/MachineFunctionPass.h" +#include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/CodeGen/MachineRegisterInfo.h" using namespace llvm; @@ -35,6 +35,9 @@ private: static char ID; TargetMachine &TM; + void AddLiveIn(MachineFunction * MF, MachineRegisterInfo & MRI, + unsigned physReg, unsigned virtReg); + public: SIAssignInterpRegsPass(TargetMachine &tm) : MachineFunctionPass(ID), TM(tm) { } @@ -109,9 +112,25 @@ bool SIAssignInterpRegsPass::runOnMachineFunction(MachineFunction &MF) unsigned new_reg = AMDGPU::VReg_32RegisterClass->getRegister(used_vgprs); unsigned virt_reg = MRI.createVirtualRegister(AMDGPU::VReg_32RegisterClass); MRI.replaceRegWith(InterpUse[interp_idx].regs[reg_idx], virt_reg); - AMDGPU::utilAddLiveIn(&MF, MRI, TM.getInstrInfo(), new_reg, virt_reg); + AddLiveIn(&MF, MRI, new_reg, virt_reg); } } return false; } + +void SIAssignInterpRegsPass::AddLiveIn(MachineFunction * MF, + MachineRegisterInfo & MRI, + unsigned physReg, unsigned virtReg) +{ + const TargetInstrInfo * TII = TM.getInstrInfo(); + if (!MRI.isLiveIn(physReg)) { + MRI.addLiveIn(physReg, virtReg); + MF->front().addLiveIn(physReg); + BuildMI(MF->front(), MF->front().begin(), DebugLoc(), + TII->get(TargetOpcode::COPY), virtReg) + .addReg(physReg); + } else { + MRI.replaceRegWith(virtReg, MRI.getLiveInVirtReg(physReg)); + } +} diff --git a/src/gallium/drivers/radeon/SICodeEmitter.cpp b/src/gallium/drivers/radeon/SICodeEmitter.cpp index fae56f4c968..692a02a4fcd 100644 --- a/src/gallium/drivers/radeon/SICodeEmitter.cpp +++ b/src/gallium/drivers/radeon/SICodeEmitter.cpp @@ -15,7 +15,6 @@ #include "AMDGPU.h" #include "AMDGPUCodeEmitter.h" -#include "AMDGPUUtil.h" #include "SIInstrInfo.h" #include "SIMachineFunctionInfo.h" #include "llvm/CodeGen/MachineFunctionPass.h" diff --git a/src/gallium/drivers/radeon/SIRegisterInfo.cpp b/src/gallium/drivers/radeon/SIRegisterInfo.cpp index 0d0e612080e..65e98089c90 100644 --- a/src/gallium/drivers/radeon/SIRegisterInfo.cpp +++ b/src/gallium/drivers/radeon/SIRegisterInfo.cpp @@ -14,7 +14,6 @@ #include "SIRegisterInfo.h" #include "AMDGPUTargetMachine.h" -#include "AMDGPUUtil.h" using namespace llvm; -- cgit v1.2.3