From 4a4ff66dbebe836492a6b6321742c21ca9bcd70a Mon Sep 17 00:00:00 2001 From: Marek Olšák Date: Tue, 24 Jan 2017 03:41:05 +0100 Subject: radeonsi: also prefetch compute shaders MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Reviewed-by: Nicolai Hähnle --- src/gallium/drivers/radeonsi/si_compute.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'src/gallium') diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/gallium/drivers/radeonsi/si_compute.c index fe29fb154d5..d05c488f38c 100644 --- a/src/gallium/drivers/radeonsi/si_compute.c +++ b/src/gallium/drivers/radeonsi/si_compute.c @@ -372,6 +372,18 @@ static bool si_switch_compute_shader(struct si_context *sctx, RADEON_PRIO_SCRATCH_BUFFER); } + /* Prefetch the compute shader to TC L2. + * + * We should also prefetch graphics shaders if a compute dispatch was + * the last command, and the compute shader if a draw call was the last + * command. However, that would add more complexity and we're likely + * to get a shader state change in that case anyway. + */ + if (sctx->b.chip_class >= CIK) { + cik_prefetch_TC_L2_async(sctx, &program->shader.bo->b.b, + 0, program->shader.bo->b.b.width0); + } + shader_va = shader->bo->gpu_address + offset; if (program->use_code_object_v2) { /* Shader code is placed after the amd_kernel_code_t -- cgit v1.2.3