From 6b554d863f05f77ed8fe0ba99e157b3558c5abc2 Mon Sep 17 00:00:00 2001 From: Marek Olšák Date: Mon, 26 Nov 2018 17:06:20 -0500 Subject: winsys/amdgpu,radeon: pass vm_alignment to buffer_from_handle MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Acked-by: Christian König --- src/gallium/winsys/amdgpu/drm/amdgpu_bo.c | 3 ++- src/gallium/winsys/radeon/drm/radeon_drm_bo.c | 3 ++- src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 1 + 3 files changed, 5 insertions(+), 2 deletions(-) (limited to 'src/gallium/winsys') diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c index 36041133d0d..e32e23361f4 100644 --- a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c +++ b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c @@ -1397,6 +1397,7 @@ no_slab: static struct pb_buffer *amdgpu_bo_from_handle(struct radeon_winsys *rws, struct winsys_handle *whandle, + unsigned vm_alignment, unsigned *stride, unsigned *offset) { @@ -1454,7 +1455,7 @@ static struct pb_buffer *amdgpu_bo_from_handle(struct radeon_winsys *rws, goto error; r = amdgpu_va_range_alloc(ws->dev, amdgpu_gpu_va_range_general, - result.alloc_size, 1 << 20, 0, &va, &va_handle, + result.alloc_size, vm_alignment, 0, &va, &va_handle, AMDGPU_VA_RANGE_HIGH); if (r) goto error; diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c index 07a9b2d758e..d1e2a8685ba 100644 --- a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c +++ b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c @@ -1134,6 +1134,7 @@ static struct pb_buffer *radeon_winsys_bo_from_ptr(struct radeon_winsys *rws, static struct pb_buffer *radeon_winsys_bo_from_handle(struct radeon_winsys *rws, struct winsys_handle *whandle, + unsigned vm_alignment, unsigned *stride, unsigned *offset) { @@ -1239,7 +1240,7 @@ done: if (ws->info.r600_has_virtual_memory && !bo->va) { struct drm_radeon_gem_va va; - bo->va = radeon_bomgr_find_va64(ws, bo->base.size, 1 << 20); + bo->va = radeon_bomgr_find_va64(ws, bo->base.size, vm_alignment); va.handle = bo->handle; va.operation = RADEON_VA_MAP; diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c index cf07a8d8e26..293372cc26d 100644 --- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c +++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c @@ -589,6 +589,7 @@ static bool do_winsys_init(struct radeon_drm_winsys *ws) /* 2D tiling on CIK is supported since DRM 2.35.0 */ ws->info.has_2d_tiling = ws->info.chip_class <= SI || ws->info.drm_minor >= 35; ws->info.has_read_registers_query = ws->info.drm_minor >= 42; + ws->info.max_alignment = 1024*1024; ws->check_vm = strstr(debug_get_option("R600_DEBUG", ""), "check_vm") != NULL; -- cgit v1.2.3