From 8b58a14ef76f6d6e6c71fff2cb5c8fa6662a1882 Mon Sep 17 00:00:00 2001 From: Marek Olšák Date: Wed, 2 May 2018 18:35:27 -0400 Subject: ac/gpu_info: add htile_cmask_support_1d_tiling MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Reviewed-by: Nicolai Hähnle --- src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/gallium/winsys/radeon') diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c index 6e3162d1cf3..21579fd9563 100644 --- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c +++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c @@ -529,6 +529,9 @@ static bool do_winsys_init(struct radeon_drm_winsys *ws) ws->info.tcc_cache_line_size = 64; /* TC L2 line size on GCN */ ws->info.ib_start_alignment = 4096; ws->info.kernel_flushes_hdp_before_ib = ws->info.drm_minor >= 40; + /* HTILE is broken with 1D tiling on old kernels and CIK. */ + ws->info.htile_cmask_support_1d_tiling = ws->info.chip_class != CIK || + ws->info.drm_minor >= 38; ws->check_vm = strstr(debug_get_option("R600_DEBUG", ""), "check_vm") != NULL; -- cgit v1.2.3