From e7fb9c73a73b94d92f308c45a87772bb62ae5c9c Mon Sep 17 00:00:00 2001
From: Marek Olšák <marek.olsak@amd.com>
Date: Thu, 14 Nov 2019 17:49:51 -0500
Subject: ac: fill num_rings for remaining IPs

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
---
 src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

(limited to 'src/gallium/winsys/radeon/drm')

diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
index 0177fe110c2..0a4da02262e 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
@@ -303,6 +303,7 @@ static bool do_winsys_init(struct radeon_drm_winsys *ws)
        ws->info.has_dedicated_vram = true;
     }
 
+    ws->info.num_rings[RING_GFX] = 1;
     /* Check for dma */
     ws->info.num_rings[RING_DMA] = 0;
     /* DMA is disabled on R700. There is IB corruption and hangs. */
@@ -316,16 +317,20 @@ static bool do_winsys_init(struct radeon_drm_winsys *ws)
     if (ws->info.drm_minor >= 32) {
 	uint32_t value = RADEON_CS_RING_UVD;
         if (radeon_get_drm_value(ws->fd, RADEON_INFO_RING_WORKING,
-                                 "UVD Ring working", &value))
+                                 "UVD Ring working", &value)) {
             ws->info.has_hw_decode = value;
+            ws->info.num_rings[RING_UVD] = 1;
+        }
 
         value = RADEON_CS_RING_VCE;
         if (radeon_get_drm_value(ws->fd, RADEON_INFO_RING_WORKING,
                                  NULL, &value) && value) {
 
             if (radeon_get_drm_value(ws->fd, RADEON_INFO_VCE_FW_VERSION,
-                                     "VCE FW version", &value))
+                                     "VCE FW version", &value)) {
                 ws->info.vce_fw_version = value;
+                ws->info.num_rings[RING_VCE] = 1;
+            }
 	}
     }
 
-- 
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