From 676bc2514039f8f631b1fcc0215aaa6647eda946 Mon Sep 17 00:00:00 2001 From: Sonny Jiang Date: Thu, 12 Nov 2015 12:08:31 -0500 Subject: winsys/amdgpu: addrlib - port fix error for workaround for 1D tiling MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Sonny Jiang Reviewed-by: Alex Deucher Reviewed-by: Michel Dänzer --- src/gallium/winsys/amdgpu/drm/addrlib/r800/egbaddrlib.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/gallium/winsys/amdgpu') diff --git a/src/gallium/winsys/amdgpu/drm/addrlib/r800/egbaddrlib.cpp b/src/gallium/winsys/amdgpu/drm/addrlib/r800/egbaddrlib.cpp index b1e008b8392..110e3d007b8 100644 --- a/src/gallium/winsys/amdgpu/drm/addrlib/r800/egbaddrlib.cpp +++ b/src/gallium/winsys/amdgpu/drm/addrlib/r800/egbaddrlib.cpp @@ -672,7 +672,7 @@ BOOL_32 EgBasedAddrLib::ComputeSurfaceAlignmentsMicroTiled( if (flags.czDispCompatible) { *pBaseAlign = PowTwoAlign(*pBaseAlign, 4096); //Base address MOD 4096 = 0 - *pPitchAlign = PowTwoAlign(*pPitchAlign, 512 >> (BITS_TO_BYTES(bpp))); //(8 lines * pitch * bytes per pixel) MOD 4096 = 0 + *pPitchAlign = PowTwoAlign(*pPitchAlign, 512 / (BITS_TO_BYTES(bpp))); //(8 lines * pitch * bytes per pixel) MOD 4096 = 0 } // end Carrizo workaround for 1D tilling -- cgit v1.2.3