From f187a493225e33c5ce514c731a0a140d61dacb0b Mon Sep 17 00:00:00 2001 From: Nicolai Hähnle Date: Wed, 10 May 2017 17:35:25 +0200 Subject: ac/radeonsi: move amdgpu_addr_create to ac_surface MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit v2: - update Android.common.mk (Emil) - rebase on top of Raven support Reviewed-by: Marek Olšák (v1) --- src/gallium/winsys/amdgpu/drm/amdgpu_surface.c | 74 --------------------- src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c | 89 +------------------------- src/gallium/winsys/amdgpu/drm/amdgpu_winsys.h | 3 - 3 files changed, 1 insertion(+), 165 deletions(-) (limited to 'src/gallium/winsys/amdgpu/drm') diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c b/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c index 4d532e397d0..7480a432af6 100644 --- a/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c +++ b/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c @@ -32,14 +32,6 @@ #include "amdgpu_winsys.h" #include "util/u_format.h" -#ifndef CIASICIDGFXENGINE_SOUTHERNISLAND -#define CIASICIDGFXENGINE_SOUTHERNISLAND 0x0000000A -#endif - -#ifndef CIASICIDGFXENGINE_ARCTICISLAND -#define CIASICIDGFXENGINE_ARCTICISLAND 0x0000000D -#endif - static int amdgpu_surface_sanity(const struct pipe_resource *tex) { /* all dimension must be at least 1 ! */ @@ -88,72 +80,6 @@ static int amdgpu_surface_sanity(const struct pipe_resource *tex) return 0; } -static void *ADDR_API allocSysMem(const ADDR_ALLOCSYSMEM_INPUT * pInput) -{ - return malloc(pInput->sizeInBytes); -} - -static ADDR_E_RETURNCODE ADDR_API freeSysMem(const ADDR_FREESYSMEM_INPUT * pInput) -{ - free(pInput->pVirtAddr); - return ADDR_OK; -} - -ADDR_HANDLE amdgpu_addr_create(struct amdgpu_winsys *ws) -{ - ADDR_CREATE_INPUT addrCreateInput = {0}; - ADDR_CREATE_OUTPUT addrCreateOutput = {0}; - ADDR_REGISTER_VALUE regValue = {0}; - ADDR_CREATE_FLAGS createFlags = {{0}}; - ADDR_E_RETURNCODE addrRet; - - addrCreateInput.size = sizeof(ADDR_CREATE_INPUT); - addrCreateOutput.size = sizeof(ADDR_CREATE_OUTPUT); - - regValue.gbAddrConfig = ws->amdinfo.gb_addr_cfg; - createFlags.value = 0; - - if (ws->info.chip_class >= GFX9) { - addrCreateInput.chipEngine = CIASICIDGFXENGINE_ARCTICISLAND; - regValue.blockVarSizeLog2 = 0; - } else { - regValue.noOfBanks = ws->amdinfo.mc_arb_ramcfg & 0x3; - regValue.noOfRanks = (ws->amdinfo.mc_arb_ramcfg & 0x4) >> 2; - - regValue.backendDisables = ws->amdinfo.enabled_rb_pipes_mask; - regValue.pTileConfig = ws->amdinfo.gb_tile_mode; - regValue.noOfEntries = ARRAY_SIZE(ws->amdinfo.gb_tile_mode); - if (ws->info.chip_class == SI) { - regValue.pMacroTileConfig = NULL; - regValue.noOfMacroEntries = 0; - } else { - regValue.pMacroTileConfig = ws->amdinfo.gb_macro_tile_mode; - regValue.noOfMacroEntries = ARRAY_SIZE(ws->amdinfo.gb_macro_tile_mode); - } - - createFlags.useTileIndex = 1; - createFlags.useHtileSliceAlign = 1; - - addrCreateInput.chipEngine = CIASICIDGFXENGINE_SOUTHERNISLAND; - addrCreateInput.chipFamily = ws->family; - addrCreateInput.chipRevision = ws->rev_id; - } - - addrCreateInput.chipFamily = ws->family; - addrCreateInput.chipRevision = ws->rev_id; - addrCreateInput.callbacks.allocSysMem = allocSysMem; - addrCreateInput.callbacks.freeSysMem = freeSysMem; - addrCreateInput.callbacks.debugPrint = 0; - addrCreateInput.createFlags = createFlags; - addrCreateInput.regValue = regValue; - - addrRet = AddrCreate(&addrCreateInput, &addrCreateOutput); - if (addrRet != ADDR_OK) - return NULL; - - return addrCreateOutput.hLib; -} - static int gfx6_compute_level(struct amdgpu_winsys *ws, const struct pipe_resource *tex, struct radeon_surf *surf, bool is_stencil, diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c index 70319db80dc..a9c5c01c950 100644 --- a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c +++ b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c @@ -237,94 +237,7 @@ static bool do_winsys_init(struct amdgpu_winsys *ws, int fd) goto fail; } - /* family and rev_id are for addrlib */ - switch (ws->info.family) { - case CHIP_TAHITI: - ws->family = FAMILY_SI; - ws->rev_id = SI_TAHITI_P_A0; - break; - case CHIP_PITCAIRN: - ws->family = FAMILY_SI; - ws->rev_id = SI_PITCAIRN_PM_A0; - break; - case CHIP_VERDE: - ws->family = FAMILY_SI; - ws->rev_id = SI_CAPEVERDE_M_A0; - break; - case CHIP_OLAND: - ws->family = FAMILY_SI; - ws->rev_id = SI_OLAND_M_A0; - break; - case CHIP_HAINAN: - ws->family = FAMILY_SI; - ws->rev_id = SI_HAINAN_V_A0; - break; - case CHIP_BONAIRE: - ws->family = FAMILY_CI; - ws->rev_id = CI_BONAIRE_M_A0; - break; - case CHIP_KAVERI: - ws->family = FAMILY_KV; - ws->rev_id = KV_SPECTRE_A0; - break; - case CHIP_KABINI: - ws->family = FAMILY_KV; - ws->rev_id = KB_KALINDI_A0; - break; - case CHIP_HAWAII: - ws->family = FAMILY_CI; - ws->rev_id = CI_HAWAII_P_A0; - break; - case CHIP_MULLINS: - ws->family = FAMILY_KV; - ws->rev_id = ML_GODAVARI_A0; - break; - case CHIP_TONGA: - ws->family = FAMILY_VI; - ws->rev_id = VI_TONGA_P_A0; - break; - case CHIP_ICELAND: - ws->family = FAMILY_VI; - ws->rev_id = VI_ICELAND_M_A0; - break; - case CHIP_CARRIZO: - ws->family = FAMILY_CZ; - ws->rev_id = CARRIZO_A0; - break; - case CHIP_STONEY: - ws->family = FAMILY_CZ; - ws->rev_id = STONEY_A0; - break; - case CHIP_FIJI: - ws->family = FAMILY_VI; - ws->rev_id = VI_FIJI_P_A0; - break; - case CHIP_POLARIS10: - ws->family = FAMILY_VI; - ws->rev_id = VI_POLARIS10_P_A0; - break; - case CHIP_POLARIS11: - ws->family = FAMILY_VI; - ws->rev_id = VI_POLARIS11_M_A0; - break; - case CHIP_POLARIS12: - ws->family = FAMILY_VI; - ws->rev_id = VI_POLARIS12_V_A0; - break; - case CHIP_VEGA10: - ws->family = FAMILY_AI; - ws->rev_id = AI_VEGA10_P_A0; - break; - case CHIP_RAVEN: - ws->family = FAMILY_RV; - ws->rev_id = RAVEN_A0; - break; - default: - fprintf(stderr, "amdgpu: Unknown family.\n"); - goto fail; - } - - ws->addrlib = amdgpu_addr_create(ws); + ws->addrlib = amdgpu_addr_create(ws->info.family, &ws->amdinfo); if (!ws->addrlib) { fprintf(stderr, "amdgpu: Cannot create addrlib.\n"); goto fail; diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.h b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.h index a5154ffe7bf..896a463ee6f 100644 --- a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.h +++ b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.h @@ -73,8 +73,6 @@ struct amdgpu_winsys { struct amdgpu_gpu_info amdinfo; ADDR_HANDLE addrlib; - uint32_t rev_id; - unsigned family; bool check_vm; @@ -91,6 +89,5 @@ amdgpu_winsys(struct radeon_winsys *base) } void amdgpu_surface_init_functions(struct amdgpu_winsys *ws); -ADDR_HANDLE amdgpu_addr_create(struct amdgpu_winsys *ws); #endif -- cgit v1.2.3