From ad019bf5c65fbc10505c84c43050b5299192ca03 Mon Sep 17 00:00:00 2001 From: Marek Olšák Date: Thu, 16 Feb 2017 18:01:53 +0100 Subject: gallium: remove TGSI_OPCODE_CLAMP MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Not used and not widely supported. Use MIN+MAX instead. Reviewed-by: Dave Airlie Reviewed-by: Nicolai Hähnle --- src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 10 ---------- src/gallium/drivers/r300/r300_tgsi_to_rc.c | 1 - src/gallium/drivers/r600/r600_shader.c | 6 +++--- src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c | 3 --- src/gallium/drivers/svga/svga_tgsi_insn.c | 1 - 5 files changed, 3 insertions(+), 18 deletions(-) (limited to 'src/gallium/drivers') diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp index d634d2da928..fdaa628fb24 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp @@ -3366,16 +3366,6 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn) mkCvt(OP_CVT, TYPE_F32, dst0[c], TYPE_F32, fetchSrc(0, c)) ->rnd = ROUND_NI; break; - case TGSI_OPCODE_CLAMP: - FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) { - src0 = fetchSrc(0, c); - src1 = fetchSrc(1, c); - src2 = fetchSrc(2, c); - val0 = getScratch(); - mkOp2(OP_MIN, TYPE_F32, val0, src0, src1); - mkOp2(OP_MAX, TYPE_F32, dst0[c], val0, src2); - } - break; case TGSI_OPCODE_SLT: case TGSI_OPCODE_SGE: case TGSI_OPCODE_SEQ: diff --git a/src/gallium/drivers/r300/r300_tgsi_to_rc.c b/src/gallium/drivers/r300/r300_tgsi_to_rc.c index 59dfa05f317..a9e3d6d7477 100644 --- a/src/gallium/drivers/r300/r300_tgsi_to_rc.c +++ b/src/gallium/drivers/r300/r300_tgsi_to_rc.c @@ -53,7 +53,6 @@ static unsigned translate_opcode(unsigned opcode) case TGSI_OPCODE_LRP: return RC_OPCODE_LRP; /* case TGSI_OPCODE_DP2A: return RC_OPCODE_DP2A; */ case TGSI_OPCODE_FRC: return RC_OPCODE_FRC; - case TGSI_OPCODE_CLAMP: return RC_OPCODE_CLAMP; case TGSI_OPCODE_FLR: return RC_OPCODE_FLR; case TGSI_OPCODE_ROUND: return RC_OPCODE_ROUND; case TGSI_OPCODE_EX2: return RC_OPCODE_EX2; diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c index b80a3f8b629..8cb3f8b2f4d 100644 --- a/src/gallium/drivers/r600/r600_shader.c +++ b/src/gallium/drivers/r600/r600_shader.c @@ -9097,7 +9097,7 @@ static const struct r600_shader_tgsi_instruction r600_shader_tgsi_instruction[] [22] = { ALU_OP0_NOP, tgsi_unsupported}, [23] = { ALU_OP0_NOP, tgsi_unsupported}, [TGSI_OPCODE_FRC] = { ALU_OP1_FRACT, tgsi_op2}, - [TGSI_OPCODE_CLAMP] = { ALU_OP0_NOP, tgsi_unsupported}, + [25] = { ALU_OP0_NOP, tgsi_unsupported}, [TGSI_OPCODE_FLR] = { ALU_OP1_FLOOR, tgsi_op2}, [TGSI_OPCODE_ROUND] = { ALU_OP1_RNDNE, tgsi_op2}, [TGSI_OPCODE_EX2] = { ALU_OP1_EXP_IEEE, tgsi_trans_srcx_replicate}, @@ -9295,7 +9295,7 @@ static const struct r600_shader_tgsi_instruction eg_shader_tgsi_instruction[] = [22] = { ALU_OP0_NOP, tgsi_unsupported}, [23] = { ALU_OP0_NOP, tgsi_unsupported}, [TGSI_OPCODE_FRC] = { ALU_OP1_FRACT, tgsi_op2}, - [TGSI_OPCODE_CLAMP] = { ALU_OP0_NOP, tgsi_unsupported}, + [25] = { ALU_OP0_NOP, tgsi_unsupported}, [TGSI_OPCODE_FLR] = { ALU_OP1_FLOOR, tgsi_op2}, [TGSI_OPCODE_ROUND] = { ALU_OP1_RNDNE, tgsi_op2}, [TGSI_OPCODE_EX2] = { ALU_OP1_EXP_IEEE, tgsi_trans_srcx_replicate}, @@ -9518,7 +9518,7 @@ static const struct r600_shader_tgsi_instruction cm_shader_tgsi_instruction[] = [22] = { ALU_OP0_NOP, tgsi_unsupported}, [23] = { ALU_OP0_NOP, tgsi_unsupported}, [TGSI_OPCODE_FRC] = { ALU_OP1_FRACT, tgsi_op2}, - [TGSI_OPCODE_CLAMP] = { ALU_OP0_NOP, tgsi_unsupported}, + [25] = { ALU_OP0_NOP, tgsi_unsupported}, [TGSI_OPCODE_FLR] = { ALU_OP1_FLOOR, tgsi_op2}, [TGSI_OPCODE_ROUND] = { ALU_OP1_RNDNE, tgsi_op2}, [TGSI_OPCODE_EX2] = { ALU_OP1_EXP_IEEE, cayman_emit_float_instr}, diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c b/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c index e03d0538dfa..10268e9a28b 100644 --- a/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c +++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c @@ -733,9 +733,6 @@ void si_shader_context_init_alu(struct lp_build_tgsi_context *bld_base) HAVE_LLVM >= 0x0308 ? "llvm.bitreverse.i32" : "llvm.AMDGPU.brev"; bld_base->op_actions[TGSI_OPCODE_CEIL].emit = build_tgsi_intrinsic_nomem; bld_base->op_actions[TGSI_OPCODE_CEIL].intr_name = "llvm.ceil.f32"; - bld_base->op_actions[TGSI_OPCODE_CLAMP].emit = build_tgsi_intrinsic_nomem; - bld_base->op_actions[TGSI_OPCODE_CLAMP].intr_name = - HAVE_LLVM >= 0x0308 ? "llvm.AMDGPU.clamp." : "llvm.AMDIL.clamp."; bld_base->op_actions[TGSI_OPCODE_CMP].emit = emit_cmp; bld_base->op_actions[TGSI_OPCODE_COS].emit = build_tgsi_intrinsic_nomem; bld_base->op_actions[TGSI_OPCODE_COS].intr_name = "llvm.cos.f32"; diff --git a/src/gallium/drivers/svga/svga_tgsi_insn.c b/src/gallium/drivers/svga/svga_tgsi_insn.c index 0efd72d7992..fc3ec5eed73 100644 --- a/src/gallium/drivers/svga/svga_tgsi_insn.c +++ b/src/gallium/drivers/svga/svga_tgsi_insn.c @@ -3000,7 +3000,6 @@ svga_emit_instruction(struct svga_shader_emitter *emit, /* These aren't actually used by any of the frontends we care * about: */ - case TGSI_OPCODE_CLAMP: case TGSI_OPCODE_AND: case TGSI_OPCODE_OR: case TGSI_OPCODE_I2F: -- cgit v1.2.3