From 72128962d640846472c1b0dc22cf4ac6ce875dc9 Mon Sep 17 00:00:00 2001 From: Jerome Glisse Date: Sat, 8 May 2010 21:09:24 +0100 Subject: r600g: Initial import --- src/gallium/drivers/r600/Makefile | 26 + src/gallium/drivers/r600/SConscript | 21 + src/gallium/drivers/r600/r600_blit.c | 81 +++ src/gallium/drivers/r600/r600_buffer.c | 177 ++++++ src/gallium/drivers/r600/r600_compiler.c | 446 +++++++++++++++ src/gallium/drivers/r600/r600_compiler.h | 329 +++++++++++ src/gallium/drivers/r600/r600_compiler_dump.c | 270 +++++++++ src/gallium/drivers/r600/r600_compiler_r600.c | 763 ++++++++++++++++++++++++++ src/gallium/drivers/r600/r600_compiler_r700.c | 213 +++++++ src/gallium/drivers/r600/r600_compiler_tgsi.c | 717 ++++++++++++++++++++++++ src/gallium/drivers/r600/r600_context.c | 167 ++++++ src/gallium/drivers/r600/r600_context.h | 101 ++++ src/gallium/drivers/r600/r600_draw.c | 215 ++++++++ src/gallium/drivers/r600/r600_helper.c | 176 ++++++ src/gallium/drivers/r600/r600_query.c | 66 +++ src/gallium/drivers/r600/r600_screen.c | 241 ++++++++ src/gallium/drivers/r600/r600_screen.h | 88 +++ src/gallium/drivers/r600/r600_shader.c | 218 ++++++++ src/gallium/drivers/r600/r600_shader.h | 130 +++++ src/gallium/drivers/r600/r600_sq.h | 606 ++++++++++++++++++++ src/gallium/drivers/r600/r600_state.c | 433 +++++++++++++++ src/gallium/drivers/r600/r600_texture.c | 198 +++++++ src/gallium/drivers/r600/r600_texture.h | 46 ++ src/gallium/drivers/r600/r600d.h | 677 +++++++++++++++++++++++ src/gallium/drivers/r600/r700_sq.h | 609 ++++++++++++++++++++ src/gallium/drivers/r600/radeon.h | 602 ++++++++++++++++++++ 26 files changed, 7616 insertions(+) create mode 100644 src/gallium/drivers/r600/Makefile create mode 100644 src/gallium/drivers/r600/SConscript create mode 100644 src/gallium/drivers/r600/r600_blit.c create mode 100644 src/gallium/drivers/r600/r600_buffer.c create mode 100644 src/gallium/drivers/r600/r600_compiler.c create mode 100644 src/gallium/drivers/r600/r600_compiler.h create mode 100644 src/gallium/drivers/r600/r600_compiler_dump.c create mode 100644 src/gallium/drivers/r600/r600_compiler_r600.c create mode 100644 src/gallium/drivers/r600/r600_compiler_r700.c create mode 100644 src/gallium/drivers/r600/r600_compiler_tgsi.c create mode 100644 src/gallium/drivers/r600/r600_context.c create mode 100644 src/gallium/drivers/r600/r600_context.h create mode 100644 src/gallium/drivers/r600/r600_draw.c create mode 100644 src/gallium/drivers/r600/r600_helper.c create mode 100644 src/gallium/drivers/r600/r600_query.c create mode 100644 src/gallium/drivers/r600/r600_screen.c create mode 100644 src/gallium/drivers/r600/r600_screen.h create mode 100644 src/gallium/drivers/r600/r600_shader.c create mode 100644 src/gallium/drivers/r600/r600_shader.h create mode 100644 src/gallium/drivers/r600/r600_sq.h create mode 100644 src/gallium/drivers/r600/r600_state.c create mode 100644 src/gallium/drivers/r600/r600_texture.c create mode 100644 src/gallium/drivers/r600/r600_texture.h create mode 100644 src/gallium/drivers/r600/r600d.h create mode 100644 src/gallium/drivers/r600/r700_sq.h create mode 100644 src/gallium/drivers/r600/radeon.h (limited to 'src/gallium/drivers') diff --git a/src/gallium/drivers/r600/Makefile b/src/gallium/drivers/r600/Makefile new file mode 100644 index 00000000000..bc58575c789 --- /dev/null +++ b/src/gallium/drivers/r600/Makefile @@ -0,0 +1,26 @@ +TOP = ../../../.. +include $(TOP)/configs/current + +LIBNAME = r600 + +LIBRARY_INCLUDES = \ + $(shell pkg-config libdrm --cflags-only-I) + +C_SOURCES = \ + r600_buffer.c \ + r600_context.c \ + r600_draw.c \ + r600_blit.c \ + r600_helper.c \ + r600_query.c \ + r600_screen.c \ + r600_state.c \ + r600_texture.c \ + r600_shader.c \ + r600_compiler.c \ + r600_compiler_tgsi.c \ + r600_compiler_dump.c \ + r600_compiler_r600.c \ + r600_compiler_r700.c + +include ../../Makefile.template diff --git a/src/gallium/drivers/r600/SConscript b/src/gallium/drivers/r600/SConscript new file mode 100644 index 00000000000..a88c5452529 --- /dev/null +++ b/src/gallium/drivers/r600/SConscript @@ -0,0 +1,21 @@ +Import('*') + +env = env.Clone() +env.Append(CPPPATH = [ + '#/include', + '#/src/mesa', +]) + +r600 = env.ConvenienceLibrary( + target = 'r600', + source = [ + 'r600_buffer.c', + 'r600_context.c', + 'r600_draw.c', + 'r600_query.c', + 'r600_screen.c', + 'r600_state.c', + 'r600_texture.c', + ]) + +Export('r600') diff --git a/src/gallium/drivers/r600/r600_blit.c b/src/gallium/drivers/r600/r600_blit.c new file mode 100644 index 00000000000..88b865ef9a6 --- /dev/null +++ b/src/gallium/drivers/r600/r600_blit.c @@ -0,0 +1,81 @@ +/* + * Copyright 2009 Marek Olšák + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Jerome Glisse + * Marek Olšák + */ +#include +#include +#include +#include +#include "r600_screen.h" +#include "r600_texture.h" +#include "r600_context.h" + +static void r600_blitter_save_states(struct pipe_context *ctx) +{ + struct r600_context *rctx = (struct r600_context*)ctx; + + util_blitter_save_blend(rctx->blitter, + rctx->draw->state[R600_BLEND]); + util_blitter_save_depth_stencil_alpha(rctx->blitter, + rctx->draw->state[R600_DSA]); + util_blitter_save_stencil_ref(rctx->blitter, &rctx->stencil_ref); + util_blitter_save_rasterizer(rctx->blitter, + rctx->draw->state[R600_RASTERIZER]); + util_blitter_save_fragment_shader(rctx->blitter, + rctx->ps_shader); + util_blitter_save_vertex_shader(rctx->blitter, + rctx->vs_shader); +} + +void r600_clear(struct pipe_context *ctx, unsigned buffers, + const float *rgba, double depth, unsigned stencil) +{ + struct r600_context *rctx = (struct r600_context*)ctx; + struct pipe_framebuffer_state *fb = &rctx->fb_state; + +#if 0 + r600_blitter_save_states(ctx); + util_blitter_clear(rctx->blitter, fb->width, fb->height, + fb->nr_cbufs, buffers, rgba, depth, + stencil); +#endif +} + +void r600_surface_copy(struct pipe_context *ctx, + struct pipe_surface *dst, + unsigned dstx, unsigned dsty, + struct pipe_surface *src, + unsigned srcx, unsigned srcy, + unsigned width, unsigned height) +{ +} + +void r600_surface_fill(struct pipe_context *ctx, + struct pipe_surface *dst, + unsigned dstx, unsigned dsty, + unsigned width, unsigned height, + unsigned value) +{ +} diff --git a/src/gallium/drivers/r600/r600_buffer.c b/src/gallium/drivers/r600/r600_buffer.c new file mode 100644 index 00000000000..f3a0208b003 --- /dev/null +++ b/src/gallium/drivers/r600/r600_buffer.c @@ -0,0 +1,177 @@ +/* + * Copyright 2010 Jerome Glisse + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Jerome Glisse + * Corbin Simpson + */ +#include +#include +#include +#include +#include +#include "r600_screen.h" +#include "r600_texture.h" +#include "r600_context.h" + +static u32 r600_domain_from_usage(unsigned usage) +{ + u32 domain = RADEON_GEM_DOMAIN_GTT; + + if (usage & PIPE_BUFFER_USAGE_GPU_WRITE) { + domain |= RADEON_GEM_DOMAIN_VRAM; + } + if (usage & PIPE_BUFFER_USAGE_PIXEL) { + domain |= RADEON_GEM_DOMAIN_VRAM; + } + if (usage & PIPE_BUFFER_USAGE_VERTEX) { + domain |= RADEON_GEM_DOMAIN_GTT; + } + if (usage & PIPE_BUFFER_USAGE_INDEX) { + domain |= RADEON_GEM_DOMAIN_GTT; + } + return domain; +} + +static struct pipe_buffer *r600_buffer_create(struct pipe_screen *screen, + unsigned alignment, + unsigned usage, + unsigned size) +{ + struct r600_screen *rscreen = r600_screen(screen); + struct r600_pipe_buffer *rbuffer; + struct radeon_bo *bo; + struct pb_desc desc; + + rbuffer = CALLOC_STRUCT(r600_pipe_buffer); + if (rbuffer == NULL) + return NULL; + + pipe_reference_init(&rbuffer->base.reference, 1); + rbuffer->base.screen = screen; + rbuffer->base.alignment = alignment; + rbuffer->base.usage = usage; + rbuffer->base.size = size; + + if (usage & PIPE_BUFFER_USAGE_CONSTANT) { + desc.alignment = alignment; + desc.usage = usage; + rbuffer->pb = pb_malloc_buffer_create(size, &desc); + if (rbuffer->pb == NULL) { + free(rbuffer); + return NULL; + } + return &rbuffer->base; + } + rbuffer->domain = r600_domain_from_usage(usage); + bo = radeon_bo(rscreen->rw, 0, size, alignment, NULL); + if (bo == NULL) { + FREE(rbuffer); + return NULL; + } + rbuffer->bo = bo; + return &rbuffer->base; +} + +static struct pipe_buffer *r600_user_buffer_create(struct pipe_screen *screen, + void *ptr, unsigned bytes) +{ + struct r600_pipe_buffer *rbuffer; + struct r600_screen *rscreen = r600_screen(screen); + + rbuffer = (struct r600_pipe_buffer*)r600_buffer_create(screen, 0, 0, bytes); + if (rbuffer == NULL) { + return NULL; + } + radeon_bo_map(rscreen->rw, rbuffer->bo); + memcpy(rbuffer->bo->data, ptr, bytes); + radeon_bo_unmap(rscreen->rw, rbuffer->bo); + return &rbuffer->base; +} + +static void r600_buffer_destroy(struct pipe_buffer *buffer) +{ + struct r600_pipe_buffer *rbuffer = (struct r600_pipe_buffer*)buffer; + struct r600_screen *rscreen = r600_screen(buffer->screen); + + if (rbuffer->pb) { + pipe_reference_init(&rbuffer->pb->base.reference, 0); + pb_destroy(rbuffer->pb); + rbuffer->pb = NULL; + } + if (rbuffer->bo) { + radeon_bo_decref(rscreen->rw, rbuffer->bo); + } + FREE(rbuffer); +} + +static void *r600_buffer_map_range(struct pipe_screen *screen, + struct pipe_buffer *buffer, + unsigned offset, unsigned length, + unsigned usage) +{ + struct r600_pipe_buffer *rbuffer = (struct r600_pipe_buffer*)buffer; + struct r600_screen *rscreen = r600_screen(buffer->screen); + int write = 0; + + if (rbuffer->pb) { + return pb_map(rbuffer->pb, usage); + } + if (usage & PIPE_BUFFER_USAGE_DONTBLOCK) { + /* FIXME */ + } + if (usage & PIPE_BUFFER_USAGE_CPU_WRITE) { + write = 1; + } + if (radeon_bo_map(rscreen->rw, rbuffer->bo)) { + return NULL; + } + return rbuffer->bo->data; +} + +static void r600_buffer_unmap( struct pipe_screen *screen, struct pipe_buffer *buffer) +{ + struct r600_pipe_buffer *rbuffer = (struct r600_pipe_buffer*)buffer; + struct r600_screen *rscreen = r600_screen(buffer->screen); + + if (rbuffer->pb) { + pb_unmap(rbuffer->pb); + } else { + radeon_bo_unmap(rscreen->rw, rbuffer->bo); + } +} + +static void r600_buffer_flush_mapped_range(struct pipe_screen *screen, + struct pipe_buffer *buf, + unsigned offset, unsigned length) +{ +} + +void r600_screen_init_buffer_functions(struct pipe_screen *screen) +{ + screen->buffer_create = r600_buffer_create; + screen->user_buffer_create = r600_user_buffer_create; + screen->buffer_map_range = r600_buffer_map_range; + screen->buffer_flush_mapped_range = r600_buffer_flush_mapped_range; + screen->buffer_unmap = r600_buffer_unmap; + screen->buffer_destroy = r600_buffer_destroy; +} diff --git a/src/gallium/drivers/r600/r600_compiler.c b/src/gallium/drivers/r600/r600_compiler.c new file mode 100644 index 00000000000..f1be2bbdf4f --- /dev/null +++ b/src/gallium/drivers/r600/r600_compiler.c @@ -0,0 +1,446 @@ +/* + * Copyright 2010 Jerome Glisse + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + */ +#include +#include +#include +#include +#include +#include "r600_compiler.h" + +struct c_vector *c_vector_new(void) +{ + struct c_vector *v = calloc(1, sizeof(struct c_vector)); + + if (v == NULL) { + return NULL; + } + c_list_init(v); + return v; +} + +static unsigned c_opcode_is_alu(unsigned opcode) +{ + switch (opcode) { + case C_OPCODE_MOV: + case C_OPCODE_MUL: + case C_OPCODE_MAD: + case C_OPCODE_ARL: + case C_OPCODE_LIT: + case C_OPCODE_RCP: + case C_OPCODE_RSQ: + case C_OPCODE_EXP: + case C_OPCODE_LOG: + case C_OPCODE_ADD: + case C_OPCODE_DP3: + case C_OPCODE_DP4: + case C_OPCODE_DST: + case C_OPCODE_MIN: + case C_OPCODE_MAX: + case C_OPCODE_SLT: + case C_OPCODE_SGE: + case C_OPCODE_SUB: + case C_OPCODE_LRP: + case C_OPCODE_CND: + case C_OPCODE_DP2A: + case C_OPCODE_FRC: + case C_OPCODE_CLAMP: + case C_OPCODE_FLR: + case C_OPCODE_ROUND: + case C_OPCODE_EX2: + case C_OPCODE_LG2: + case C_OPCODE_POW: + case C_OPCODE_XPD: + case C_OPCODE_ABS: + case C_OPCODE_RCC: + case C_OPCODE_DPH: + case C_OPCODE_COS: + case C_OPCODE_DDX: + case C_OPCODE_DDY: + case C_OPCODE_PK2H: + case C_OPCODE_PK2US: + case C_OPCODE_PK4B: + case C_OPCODE_PK4UB: + case C_OPCODE_RFL: + case C_OPCODE_SEQ: + case C_OPCODE_SFL: + case C_OPCODE_SGT: + case C_OPCODE_SIN: + case C_OPCODE_SLE: + case C_OPCODE_SNE: + case C_OPCODE_STR: + case C_OPCODE_UP2H: + case C_OPCODE_UP2US: + case C_OPCODE_UP4B: + case C_OPCODE_UP4UB: + case C_OPCODE_X2D: + case C_OPCODE_ARA: + case C_OPCODE_ARR: + case C_OPCODE_BRA: + case C_OPCODE_SSG: + case C_OPCODE_CMP: + case C_OPCODE_SCS: + case C_OPCODE_NRM: + case C_OPCODE_DIV: + case C_OPCODE_DP2: + case C_OPCODE_CEIL: + case C_OPCODE_I2F: + case C_OPCODE_NOT: + case C_OPCODE_TRUNC: + case C_OPCODE_SHL: + case C_OPCODE_AND: + case C_OPCODE_OR: + case C_OPCODE_MOD: + case C_OPCODE_XOR: + case C_OPCODE_SAD: + case C_OPCODE_NRM4: + case C_OPCODE_F2I: + case C_OPCODE_IDIV: + case C_OPCODE_IMAX: + case C_OPCODE_IMIN: + case C_OPCODE_INEG: + case C_OPCODE_ISGE: + case C_OPCODE_ISHR: + case C_OPCODE_ISLT: + case C_OPCODE_F2U: + case C_OPCODE_U2F: + case C_OPCODE_UADD: + case C_OPCODE_UDIV: + case C_OPCODE_UMAD: + case C_OPCODE_UMAX: + case C_OPCODE_UMIN: + case C_OPCODE_UMOD: + case C_OPCODE_UMUL: + case C_OPCODE_USEQ: + case C_OPCODE_USGE: + case C_OPCODE_USHR: + case C_OPCODE_USLT: + case C_OPCODE_USNE: + return 1; + case C_OPCODE_END: + case C_OPCODE_VFETCH: + case C_OPCODE_KILP: + case C_OPCODE_CAL: + case C_OPCODE_RET: + case C_OPCODE_TXB: + case C_OPCODE_TXL: + case C_OPCODE_BRK: + case C_OPCODE_IF: + case C_OPCODE_BGNFOR: + case C_OPCODE_REP: + case C_OPCODE_ELSE: + case C_OPCODE_ENDIF: + case C_OPCODE_ENDFOR: + case C_OPCODE_ENDREP: + case C_OPCODE_PUSHA: + case C_OPCODE_POPA: + case C_OPCODE_TXF: + case C_OPCODE_TXQ: + case C_OPCODE_CONT: + case C_OPCODE_EMIT: + case C_OPCODE_ENDPRIM: + case C_OPCODE_BGNLOOP: + case C_OPCODE_BGNSUB: + case C_OPCODE_ENDLOOP: + case C_OPCODE_ENDSUB: + case C_OPCODE_NOP: + case C_OPCODE_CALLNZ: + case C_OPCODE_IFC: + case C_OPCODE_BREAKC: + case C_OPCODE_KIL: + case C_OPCODE_TEX: + case C_OPCODE_TXD: + case C_OPCODE_TXP: + case C_OPCODE_SWITCH: + case C_OPCODE_CASE: + case C_OPCODE_DEFAULT: + case C_OPCODE_ENDSWITCH: + default: + return 0; + } +} + + +/* NEW */ +void c_node_init(struct c_node *node) +{ + memset(node, 0, sizeof(struct c_node)); + c_list_init(&node->predecessors); + c_list_init(&node->successors); + c_list_init(&node->childs); + c_list_init(&node->insts); + node->parent = NULL; +} + +static struct c_node_link *c_node_link_new(struct c_node *node) +{ + struct c_node_link *link; + + link = calloc(1, sizeof(struct c_node_link)); + if (link == NULL) + return NULL; + c_list_init(link); + link->node = node; + return link; +} + +int c_node_cfg_link(struct c_node *predecessor, struct c_node *successor) +{ + struct c_node_link *pedge, *sedge; + + pedge = c_node_link_new(successor); + sedge = c_node_link_new(predecessor); + if (sedge == NULL || pedge == NULL) { + free(sedge); + free(pedge); + return -ENOMEM; + } + c_list_add_tail(pedge, &predecessor->successors); + c_list_add_tail(sedge, &successor->predecessors); + return 0; +} + +int c_node_add_new_instruction_head(struct c_node *node, struct c_instruction *instruction) +{ + struct c_instruction *inst = calloc(1, sizeof(struct c_instruction)); + + if (inst == NULL) + return -ENOMEM; + memcpy(inst, instruction, sizeof(struct c_instruction)); + c_list_add(inst, &node->insts); + return 0; +} + +int c_node_add_new_instruction(struct c_node *node, struct c_instruction *instruction) +{ + struct c_instruction *inst = calloc(1, sizeof(struct c_instruction)); + + if (inst == NULL) + return -ENOMEM; + memcpy(inst, instruction, sizeof(struct c_instruction)); + c_list_add_tail(inst, &node->insts); + return 0; +} + +struct c_node *c_shader_cfg_new_node_after(struct c_shader *shader, struct c_node *predecessor) +{ + struct c_node *node = calloc(1, sizeof(struct c_node)); + + if (node == NULL) + return NULL; + c_node_init(node); + if (c_node_cfg_link(predecessor, node)) { + free(node); + return NULL; + } + c_list_add_tail(node, &shader->nodes); + return node; +} + +int c_shader_init(struct c_shader *shader, unsigned type) +{ + unsigned i; + int r; + + shader->type = type; + for (i = 0; i < C_FILE_COUNT; i++) { + shader->files[i].nvectors = 0; + c_list_init(&shader->files[i].vectors); + } + c_list_init(&shader->nodes); + c_node_init(&shader->entry); + c_node_init(&shader->end); + shader->entry.opcode = C_OPCODE_ENTRY; + shader->end.opcode = C_OPCODE_END; + r = c_node_cfg_link(&shader->entry, &shader->end); + if (r) + return r; + return 0; +} + +struct c_vector *c_shader_vector_new(struct c_shader *shader, unsigned file, unsigned name, int sid) +{ + struct c_vector *v = calloc(1, sizeof(struct c_vector)); + int i; + + if (v == NULL) { + return NULL; + } + for (i = 0; i < 4; i++) { + v->channel[i] = calloc(1, sizeof(struct c_channel)); + if (v->channel[i] == NULL) + goto out_err; + v->channel[i]->vindex = i; + v->channel[i]->vector = v; + } + v->file = file; + v->name = name; + v->sid = sid; + shader->files[v->file].nvectors++; + v->id = shader->nvectors++; + c_list_add_tail(v, &shader->files[v->file].vectors); + return v; +out_err: + for (i = 0; i < 4; i++) { + free(v->channel[i]); + } + free(v); + return NULL; +} + +static void c_node_remove_link(struct c_node_link *head, struct c_node *node) +{ + struct c_node_link *link, *tmp; + + c_list_for_each_safe(link, tmp, head) { + if (link->node == node) { + c_list_del(link); + free(link); + } + } +} + +static void c_node_destroy(struct c_node *node) +{ + struct c_instruction *i, *ni; + struct c_node_link *link, *tmp; + + c_list_for_each_safe(i, ni, &node->insts) { + c_list_del(i); + free(i); + } + if (node->parent) + c_node_remove_link(&node->parent->childs, node); + node->parent = NULL; + c_list_for_each_safe(link, tmp, &node->predecessors) { + c_node_remove_link(&link->node->successors, node); + c_list_del(link); + free(link); + } + c_list_for_each_safe(link, tmp, &node->successors) { + c_node_remove_link(&link->node->predecessors, node); + c_list_del(link); + free(link); + } + c_list_for_each_safe(link, tmp, &node->childs) { + link->node->parent = NULL; + c_list_del(link); + free(link); + } +} + +void c_shader_destroy(struct c_shader *shader) +{ + struct c_node *n, *nn; + struct c_vector *v, *nv; + unsigned i; + + for (i = 0; i < C_FILE_COUNT; i++) { + shader->files[i].nvectors = 0; + c_list_for_each_safe(v, nv, &shader->files[i].vectors) { + c_list_del(v); + free(v->channel[0]); + free(v->channel[1]); + free(v->channel[2]); + free(v->channel[3]); + free(v); + } + } + c_list_for_each_safe(n, nn, &shader->nodes) { + c_list_del(n); + c_node_destroy(n); + } + memset(shader, 0, sizeof(struct c_shader)); +} + +static void c_shader_dfs_without_rec(struct c_node *entry, struct c_node *node) +{ + struct c_node_link *link; + + if (entry == node || entry->visited) + return; + entry->visited = 1; + c_list_for_each(link, &entry->successors) { + c_shader_dfs_without_rec(link->node, node); + } +} + +static void c_shader_dfs_without(struct c_shader *shader, struct c_node *node) +{ + struct c_node *n; + + shader->entry.visited = 0; + shader->end.visited = 0; + c_list_for_each(n, &shader->nodes) { + n->visited = 0; + } + c_shader_dfs_without_rec(&shader->entry, node); +} + +static int c_shader_build_dominator_tree_rec(struct c_shader *shader, struct c_node *node) +{ + struct c_node_link *link, *nlink; + unsigned found = 0; + int r; + + if (node->done) + return 0; + node->done = 1; + c_list_for_each(link, &node->predecessors) { + /* if we remove this predecessor can we reach the current node ? */ + c_shader_dfs_without(shader, link->node); + if (node->visited == 0) { + /* we were unable to visit current node thus current + * predecessor is the immediate dominator of node, as + * their can be only one immediate dominator we break + */ + node->parent = link->node; + nlink = c_node_link_new(node); + if (nlink == NULL) + return -ENOMEM; + c_list_add_tail(nlink, &link->node->childs); + found = 1; + break; + } + } + /* this shouldn't happen there should at least be 1 denominator for each node */ + if (!found && node->opcode != C_OPCODE_ENTRY) { + fprintf(stderr, "invalid flow control graph node %p (%d) has no immediate dominator\n", + node, node->opcode); + return -EINVAL; + } + c_list_for_each(link, &node->predecessors) { + r = c_shader_build_dominator_tree_rec(shader, link->node); + if (r) + return r; + } + return 0; +} + +int c_shader_build_dominator_tree(struct c_shader *shader) +{ + struct c_node *node; + c_list_for_each(node, &shader->nodes) { + node->done = 0; + } + return c_shader_build_dominator_tree_rec(shader, &shader->end); +} diff --git a/src/gallium/drivers/r600/r600_compiler.h b/src/gallium/drivers/r600/r600_compiler.h new file mode 100644 index 00000000000..d3c13b519be --- /dev/null +++ b/src/gallium/drivers/r600/r600_compiler.h @@ -0,0 +1,329 @@ +/* + * Copyright 2010 Jerome Glisse + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + */ +#ifndef R600_COMPILER_H +#define R600_COMPILER_H + +struct c_vector; + +/* operand are the basic source/destination of each operation */ +struct c_channel { + struct c_channel *next; + struct c_channel *prev; + unsigned vindex; /**< index in vector X,Y,Z,W (0,1,2,3) */ + unsigned value; /**< immediate value 32bits */ + struct c_vector *vector; /**< vector to which it belongs */ +}; + +/* in GPU world most of the time operand are grouped into vector + * of 4 component this structure is mostly and handler to group + * operand into a same vector + */ +struct c_vector { + struct c_vector *next; + struct c_vector *prev; + unsigned id; /**< vector uniq id */ + unsigned name; /**< semantic name */ + unsigned file; /**< operand file C_FILE_* */ + int sid; /**< semantic id */ + struct c_channel *channel[4]; /**< operands */ +}; + +#define c_list_init(e) do { (e)->next = e; (e)->prev = e; } while(0) +#define c_list_add(e, h) do { (e)->next = (h)->next; (e)->prev = h; (h)->next = e; (e)->next->prev = e; } while(0) +#define c_list_add_tail(e, h) do { (e)->next = h; (e)->prev = (h)->prev; (h)->prev = e; (e)->prev->next = e; } while(0) +#define c_list_del(e) do { (e)->next->prev = (e)->prev; (e)->prev->next = (e)->next; c_list_init(e); } while(0) +#define c_list_for_each(p, h) for (p = (h)->next; p != (h); p = p->next) +#define c_list_for_each_from(p, s, h) for (p = s; p != (h); p = p->next) +#define c_list_for_each_safe(p, n, h) for (p = (h)->next, n = p->next; p != (h); p = n, n = p->next) +#define c_list_empty(h) ((h)->next == h) + + +#define C_PROGRAM_TYPE_VS 0 +#define C_PROGRAM_TYPE_FS 1 +#define C_PROGRAM_TYPE_COUNT 2 + +#define C_NODE_FLAG_ALU 1 +#define C_NODE_FLAG_FETCH 2 + +#define C_SWIZZLE_X 0 +#define C_SWIZZLE_Y 1 +#define C_SWIZZLE_Z 2 +#define C_SWIZZLE_W 3 +#define C_SWIZZLE_0 4 +#define C_SWIZZLE_1 5 +#define C_SWIZZLE_D 6 /**< discard */ + +#define C_FILE_NULL 0 +#define C_FILE_CONSTANT 1 +#define C_FILE_INPUT 2 +#define C_FILE_OUTPUT 3 +#define C_FILE_TEMPORARY 4 +#define C_FILE_SAMPLER 5 +#define C_FILE_ADDRESS 6 +#define C_FILE_IMMEDIATE 7 +#define C_FILE_LOOP 8 +#define C_FILE_PREDICATE 9 +#define C_FILE_SYSTEM_VALUE 10 +#define C_FILE_RESOURCE 11 +#define C_FILE_COUNT 12 + +#define C_SEMANTIC_POSITION 0 +#define C_SEMANTIC_COLOR 1 +#define C_SEMANTIC_BCOLOR 2 /**< back-face color */ +#define C_SEMANTIC_FOG 3 +#define C_SEMANTIC_PSIZE 4 +#define C_SEMANTIC_GENERIC 5 +#define C_SEMANTIC_NORMAL 6 +#define C_SEMANTIC_FACE 7 +#define C_SEMANTIC_EDGEFLAG 8 +#define C_SEMANTIC_PRIMID 9 +#define C_SEMANTIC_INSTANCEID 10 +#define C_SEMANTIC_VERTEXID 11 +#define C_SEMANTIC_COUNT 12 /**< number of semantic values */ + +#define C_OPCODE_ARL 0 +#define C_OPCODE_MOV 1 +#define C_OPCODE_LIT 2 +#define C_OPCODE_RCP 3 +#define C_OPCODE_RSQ 4 +#define C_OPCODE_EXP 5 +#define C_OPCODE_LOG 6 +#define C_OPCODE_MUL 7 +#define C_OPCODE_ADD 8 +#define C_OPCODE_DP3 9 +#define C_OPCODE_DP4 10 +#define C_OPCODE_DST 11 +#define C_OPCODE_MIN 12 +#define C_OPCODE_MAX 13 +#define C_OPCODE_SLT 14 +#define C_OPCODE_SGE 15 +#define C_OPCODE_MAD 16 +#define C_OPCODE_SUB 17 +#define C_OPCODE_LRP 18 +#define C_OPCODE_CND 19 +/* gap */ +#define C_OPCODE_DP2A 21 +/* gap */ +#define C_OPCODE_FRC 24 +#define C_OPCODE_CLAMP 25 +#define C_OPCODE_FLR 26 +#define C_OPCODE_ROUND 27 +#define C_OPCODE_EX2 28 +#define C_OPCODE_LG2 29 +#define C_OPCODE_POW 30 +#define C_OPCODE_XPD 31 +/* gap */ +#define C_OPCODE_ABS 33 +#define C_OPCODE_RCC 34 +#define C_OPCODE_DPH 35 +#define C_OPCODE_COS 36 +#define C_OPCODE_DDX 37 +#define C_OPCODE_DDY 38 +#define C_OPCODE_KILP 39 /* predicated kill */ +#define C_OPCODE_PK2H 40 +#define C_OPCODE_PK2US 41 +#define C_OPCODE_PK4B 42 +#define C_OPCODE_PK4UB 43 +#define C_OPCODE_RFL 44 +#define C_OPCODE_SEQ 45 +#define C_OPCODE_SFL 46 +#define C_OPCODE_SGT 47 +#define C_OPCODE_SIN 48 +#define C_OPCODE_SLE 49 +#define C_OPCODE_SNE 50 +#define C_OPCODE_STR 51 +#define C_OPCODE_TEX 52 +#define C_OPCODE_TXD 53 +#define C_OPCODE_TXP 54 +#define C_OPCODE_UP2H 55 +#define C_OPCODE_UP2US 56 +#define C_OPCODE_UP4B 57 +#define C_OPCODE_UP4UB 58 +#define C_OPCODE_X2D 59 +#define C_OPCODE_ARA 60 +#define C_OPCODE_ARR 61 +#define C_OPCODE_BRA 62 +#define C_OPCODE_CAL 63 +#define C_OPCODE_RET 64 +#define C_OPCODE_SSG 65 /* SGN */ +#define C_OPCODE_CMP 66 +#define C_OPCODE_SCS 67 +#define C_OPCODE_TXB 68 +#define C_OPCODE_NRM 69 +#define C_OPCODE_DIV 70 +#define C_OPCODE_DP2 71 +#define C_OPCODE_TXL 72 +#define C_OPCODE_BRK 73 +#define C_OPCODE_IF 74 +#define C_OPCODE_BGNFOR 75 +#define C_OPCODE_REP 76 +#define C_OPCODE_ELSE 77 +#define C_OPCODE_ENDIF 78 +#define C_OPCODE_ENDFOR 79 +#define C_OPCODE_ENDREP 80 +#define C_OPCODE_PUSHA 81 +#define C_OPCODE_POPA 82 +#define C_OPCODE_CEIL 83 +#define C_OPCODE_I2F 84 +#define C_OPCODE_NOT 85 +#define C_OPCODE_TRUNC 86 +#define C_OPCODE_SHL 87 +/* gap */ +#define C_OPCODE_AND 89 +#define C_OPCODE_OR 90 +#define C_OPCODE_MOD 91 +#define C_OPCODE_XOR 92 +#define C_OPCODE_SAD 93 +#define C_OPCODE_TXF 94 +#define C_OPCODE_TXQ 95 +#define C_OPCODE_CONT 96 +#define C_OPCODE_EMIT 97 +#define C_OPCODE_ENDPRIM 98 +#define C_OPCODE_BGNLOOP 99 +#define C_OPCODE_BGNSUB 100 +#define C_OPCODE_ENDLOOP 101 +#define C_OPCODE_ENDSUB 102 +/* gap */ +#define C_OPCODE_NOP 107 +/* gap */ +#define C_OPCODE_NRM4 112 +#define C_OPCODE_CALLNZ 113 +#define C_OPCODE_IFC 114 +#define C_OPCODE_BREAKC 115 +#define C_OPCODE_KIL 116 /* conditional kill */ +#define C_OPCODE_END 117 /* aka HALT */ +/* gap */ +#define C_OPCODE_F2I 119 +#define C_OPCODE_IDIV 120 +#define C_OPCODE_IMAX 121 +#define C_OPCODE_IMIN 122 +#define C_OPCODE_INEG 123 +#define C_OPCODE_ISGE 124 +#define C_OPCODE_ISHR 125 +#define C_OPCODE_ISLT 126 +#define C_OPCODE_F2U 127 +#define C_OPCODE_U2F 128 +#define C_OPCODE_UADD 129 +#define C_OPCODE_UDIV 130 +#define C_OPCODE_UMAD 131 +#define C_OPCODE_UMAX 132 +#define C_OPCODE_UMIN 133 +#define C_OPCODE_UMOD 134 +#define C_OPCODE_UMUL 135 +#define C_OPCODE_USEQ 136 +#define C_OPCODE_USGE 137 +#define C_OPCODE_USHR 138 +#define C_OPCODE_USLT 139 +#define C_OPCODE_USNE 140 +#define C_OPCODE_SWITCH 141 +#define C_OPCODE_CASE 142 +#define C_OPCODE_DEFAULT 143 +#define C_OPCODE_ENDSWITCH 144 +#define C_OPCODE_VFETCH 145 +#define C_OPCODE_ENTRY 146 +#define C_OPCODE_LAST 147 + +#define C_OPERAND_FLAG_ABS (1 << 0) +#define C_OPERAND_FLAG_NEG (1 << 1) + +struct c_operand { + struct c_vector *vector; + unsigned swizzle[4]; + unsigned flag[4]; +}; + +struct c_instruction { + struct c_instruction *next, *prev; + unsigned opcode; + unsigned ninput; + struct c_operand input[3]; + struct c_operand output; + unsigned write_mask; + void *backend; +}; + +struct c_node; + +struct c_node_link { + struct c_node_link *next; + struct c_node_link *prev; + struct c_node *node; +}; + +/** + * struct c_node + * + * @next: all node are in a double linked list, this point to + * next node + * @next: all node are in a double linked list, this point to + * previous node + * @predecessors: list of all predecessor nodes in the flow graph + * @successors: list of all sucessor nodes in the flow graph + * @parent: parent node in the depth first walk tree + * @childs: child nodes in the depth first walk tree + */ +struct c_node { + struct c_node *next, *prev; + struct c_node_link predecessors; + struct c_node_link successors; + struct c_node *parent; + struct c_node_link childs; + struct c_instruction insts; + unsigned opcode; + unsigned visited; + unsigned done; + void *backend; +}; + +struct c_file { + unsigned nvectors; + struct c_vector vectors; +}; + +struct c_shader { + unsigned nvectors; + struct c_file files[C_FILE_COUNT]; + struct c_node nodes; + struct c_node entry; + struct c_node end; + unsigned type; +}; + +int c_shader_init(struct c_shader *shader, unsigned type); +void c_shader_destroy(struct c_shader *shader); +struct c_vector *c_shader_vector_new(struct c_shader *shader, unsigned file, unsigned name, int sid); +int c_shader_build_dominator_tree(struct c_shader *shader); +void c_shader_dump(struct c_shader *shader); + +void c_node_init(struct c_node *node); +int c_node_add_new_instruction(struct c_node *node, struct c_instruction *instruction); +int c_node_add_new_instruction_head(struct c_node *node, struct c_instruction *instruction); + +/* control flow graph functions */ +int c_node_cfg_link(struct c_node *predecessor, struct c_node *successor); +struct c_node *c_node_cfg_new_after(struct c_node *predecessor); +struct c_node *c_shader_cfg_new_node_after(struct c_shader *shader, struct c_node *predecessor); + +struct c_vector *c_vector_new(void); + +#endif diff --git a/src/gallium/drivers/r600/r600_compiler_dump.c b/src/gallium/drivers/r600/r600_compiler_dump.c new file mode 100644 index 00000000000..9df6a38598e --- /dev/null +++ b/src/gallium/drivers/r600/r600_compiler_dump.c @@ -0,0 +1,270 @@ +/* + * Copyright 2010 Jerome Glisse + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + */ +#include +#include +#include +#include +#include "r600_compiler.h" + +static const char *c_file_swz[] = { + "x", + "y", + "z", + "w", + "0", + "1", + ".", +}; + +static const char *c_file_str[] = { + "NULL", + "CONSTANT", + "INPUT", + "OUTPUT", + "TEMPORARY", + "SAMPLER", + "ADDRESS", + "IMMEDIATE", + "LOOP", + "PREDICATE", + "SYSTEM_VALUE", +}; + +static const char *c_semantic_str[] = { + "POSITION", + "COLOR", + "BCOLOR", + "FOG", + "PSIZE", + "GENERIC", + "NORMAL", + "FACE", + "EDGEFLAG", + "PRIMID", + "INSTANCEID", +}; + +static const char *c_opcode_str[] = { + "ARL", + "MOV", + "LIT", + "RCP", + "RSQ", + "EXP", + "LOG", + "MUL", + "ADD", + "DP3", + "DP4", + "DST", + "MIN", + "MAX", + "SLT", + "SGE", + "MAD", + "SUB", + "LRP", + "CND", + "(INVALID)", + "DP2A", + "(INVALID)", + "(INVALID)", + "FRC", + "CLAMP", + "FLR", + "ROUND", + "EX2", + "LG2", + "POW", + "XPD", + "(INVALID)", + "ABS", + "RCC", + "DPH", + "COS", + "DDX", + "DDY", + "KILP", + "PK2H", + "PK2US", + "PK4B", + "PK4UB", + "RFL", + "SEQ", + "SFL", + "SGT", + "SIN", + "SLE", + "SNE", + "STR", + "TEX", + "TXD", + "TXP", + "UP2H", + "UP2US", + "UP4B", + "UP4UB", + "X2D", + "ARA", + "ARR", + "BRA", + "CAL", + "RET", + "SSG", + "CMP", + "SCS", + "TXB", + "NRM", + "DIV", + "DP2", + "TXL", + "BRK", + "IF", + "BGNFOR", + "REP", + "ELSE", + "ENDIF", + "ENDFOR", + "ENDREP", + "PUSHA", + "POPA", + "CEIL", + "I2F", + "NOT", + "TRUNC", + "SHL", + "(INVALID)", + "AND", + "OR", + "MOD", + "XOR", + "SAD", + "TXF", + "TXQ", + "CONT", + "EMIT", + "ENDPRIM", + "BGNLOOP", + "BGNSUB", + "ENDLOOP", + "ENDSUB", + "(INVALID)", + "(INVALID)", + "(INVALID)", + "(INVALID)", + "NOP", + "(INVALID)", + "(INVALID)", + "(INVALID)", + "(INVALID)", + "NRM4", + "CALLNZ", + "IFC", + "BREAKC", + "KIL", + "END", + "(INVALID)", + "F2I", + "IDIV", + "IMAX", + "IMIN", + "INEG", + "ISGE", + "ISHR", + "ISLT", + "F2U", + "U2F", + "UADD", + "UDIV", + "UMAD", + "UMAX", + "UMIN", + "UMOD", + "UMUL", + "USEQ", + "USGE", + "USHR", + "USLT", + "USNE", + "SWITCH", + "CASE", + "DEFAULT", + "ENDSWITCH", + "VFETCH", + "ENTRY", +}; + +static inline const char *c_get_name(const char *name[], unsigned i) +{ + return name[i]; +} + +static void pindent(unsigned indent) +{ + unsigned i; + for (i = 0; i < indent; i++) + fprintf(stderr, " "); +} + +static void c_node_dump(struct c_node *node, unsigned indent) +{ + struct c_instruction *i; + unsigned j; + + pindent(indent); fprintf(stderr, "# node %s\n", c_get_name(c_opcode_str, node->opcode)); + c_list_for_each(i, &node->insts) { + pindent(indent); fprintf(stderr, "%s", c_get_name(c_opcode_str, i->opcode)); + fprintf(stderr, " %s[%d][%s%s%s%s]", + c_get_name(c_file_str, i->output.vector->file), + i->output.vector->id, + c_get_name(c_file_swz, i->output.swizzle[0]), + c_get_name(c_file_swz, i->output.swizzle[1]), + c_get_name(c_file_swz, i->output.swizzle[2]), + c_get_name(c_file_swz, i->output.swizzle[3])); + for (j = 0; j < i->ninput; j++) { + fprintf(stderr, " %s[%d][%s%s%s%s]", + c_get_name(c_file_str, i->input[j].vector->file), + i->input[j].vector->id, + c_get_name(c_file_swz, i->input[j].swizzle[0]), + c_get_name(c_file_swz, i->input[j].swizzle[1]), + c_get_name(c_file_swz, i->input[j].swizzle[2]), + c_get_name(c_file_swz, i->input[j].swizzle[3])); + } + fprintf(stderr, ";\n"); + } +} + +static void c_shader_dump_rec(struct c_shader *shader, struct c_node *node, unsigned indent) +{ + struct c_node_link *link; + + c_node_dump(node, indent); + c_list_for_each(link, &node->childs) { + c_shader_dump_rec(shader, link->node, indent + 1); + } +} + +void c_shader_dump(struct c_shader *shader) +{ + c_shader_dump_rec(shader, &shader->entry, 0); +} diff --git a/src/gallium/drivers/r600/r600_compiler_r600.c b/src/gallium/drivers/r600/r600_compiler_r600.c new file mode 100644 index 00000000000..bed2b72f247 --- /dev/null +++ b/src/gallium/drivers/r600/r600_compiler_r600.c @@ -0,0 +1,763 @@ +/* + * Copyright 2010 Jerome Glisse + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + */ +#include +#include +#include +#include +#include +#include +#include "r600_context.h" +#include "r600_sq.h" + + +struct r600_shader_alu_translate { + unsigned copcode; + unsigned opcode; + unsigned is_op3; +}; + +static int r600_shader_alu_translate(struct r600_shader *rshader, + struct c_instruction *instruction); +struct r600_shader_alu_translate r600_alu_translate_list[C_OPCODE_LAST]; + +int r600_shader_insert_fetch(struct c_shader *shader) +{ + struct c_vector *vi, *vr, *v, *nv; + struct c_instruction instruction; + int r; + + if (shader->type != C_PROGRAM_TYPE_VS) + return 0; + vi = c_shader_vector_new(shader, C_FILE_INPUT, C_SEMANTIC_VERTEXID, -1); + if (vi == NULL) + return -ENOMEM; + c_list_for_each_safe(v, nv, &shader->files[C_FILE_INPUT].vectors) { + if (v == vi) + continue; + vr = c_shader_vector_new(shader, C_FILE_RESOURCE, C_SEMANTIC_GENERIC, -1); + if (vr == NULL) + return -ENOMEM; + memset(&instruction, 0, sizeof(struct c_instruction)); + instruction.opcode = C_OPCODE_VFETCH; + instruction.write_mask = 0xF; + instruction.ninput = 2; + instruction.output.vector = v; + instruction.input[0].vector = vi; + instruction.input[1].vector = vr; + instruction.output.swizzle[0] = C_SWIZZLE_X; + instruction.output.swizzle[1] = C_SWIZZLE_Y; + instruction.output.swizzle[2] = C_SWIZZLE_Z; + instruction.output.swizzle[3] = C_SWIZZLE_W; + r = c_node_add_new_instruction_head(&shader->entry, &instruction); + if (r) + return r; + c_list_del(v); + shader->files[C_FILE_INPUT].nvectors--; + c_list_add_tail(v, &shader->files[C_FILE_TEMPORARY].vectors); + shader->files[C_FILE_TEMPORARY].nvectors++; + v->file = C_FILE_TEMPORARY; + } + return 0; +} + +void r600_shader_cleanup(struct r600_shader *rshader) +{ + struct r600_shader_node *n, *nn; + struct r600_shader_vfetch *vf, *nvf; + struct r600_shader_alu *alu, *nalu; + int i; + + if (rshader == NULL) + return; + if (rshader->gpr) { + for (i = 0; i < rshader->nvector; i++) { + free(rshader->gpr[i]); + } + free(rshader->gpr); + rshader->gpr = NULL; + } + c_list_for_each_safe(n, nn, &rshader->nodes) { + c_list_del(n); + c_list_for_each_safe(vf, nvf, &n->vfetch) { + c_list_del(vf); + free(vf); + } + c_list_for_each_safe(alu, nalu, &n->alu) { + c_list_del(alu); + free(alu); + } + free(n); + } + free(rshader->bcode); + return; +} + +int r600_shader_vfetch_bytecode(struct r600_shader *rshader, + struct r600_shader_node *rnode, + struct r600_shader_vfetch *vfetch, + unsigned *cid) +{ + unsigned id = *cid; + + vfetch->cf_addr = id; + rshader->bcode[id++] = S_SQ_VTX_WORD0_BUFFER_ID(vfetch->sel[2]) | + S_SQ_VTX_WORD0_SRC_GPR(vfetch->sel[1]) | + S_SQ_VTX_WORD0_SRC_SEL_X(vfetch->chan[1]) | + S_SQ_VTX_WORD0_MEGA_FETCH_COUNT(0x1F); + rshader->bcode[id++] = S_SQ_VTX_WORD1_DST_SEL_X(vfetch->dsel[0]) | + S_SQ_VTX_WORD1_DST_SEL_Y(vfetch->dsel[1]) | + S_SQ_VTX_WORD1_DST_SEL_Z(vfetch->dsel[2]) | + S_SQ_VTX_WORD1_DST_SEL_W(vfetch->dsel[3]) | + S_SQ_VTX_WORD1_USE_CONST_FIELDS(1) | + S_SQ_VTX_WORD1_GPR_DST_GPR(vfetch->sel[0]); + rshader->bcode[id++] = S_SQ_VTX_WORD2_MEGA_FETCH(1); + rshader->bcode[id++] = 0; + *cid = id; + return 0; +} + +int r600_shader_update(struct r600_shader *rshader, enum pipe_format *resource_format) +{ + struct r600_shader_node *rnode; + struct r600_shader_vfetch *vfetch; + unsigned i; + + memcpy(rshader->resource_format, resource_format, + rshader->nresource * sizeof(enum pipe_format)); + c_list_for_each(rnode, &rshader->nodes) { + c_list_for_each(vfetch, &rnode->vfetch) { + const struct util_format_description *desc; + i = vfetch->cf_addr + 1; + rshader->bcode[i] &= C_SQ_VTX_WORD1_DST_SEL_X; + rshader->bcode[i] &= C_SQ_VTX_WORD1_DST_SEL_Y; + rshader->bcode[i] &= C_SQ_VTX_WORD1_DST_SEL_Z; + rshader->bcode[i] &= C_SQ_VTX_WORD1_DST_SEL_W; + desc = util_format_description(resource_format[vfetch->sel[2]]); + if (desc == NULL) { + fprintf(stderr, "%s unknown format %d\n", __func__, resource_format[vfetch->sel[2]]); + continue; + } + /* WARNING so far TGSI swizzle match R600 ones */ + rshader->bcode[i] |= S_SQ_VTX_WORD1_DST_SEL_X(desc->swizzle[0]); + rshader->bcode[i] |= S_SQ_VTX_WORD1_DST_SEL_Y(desc->swizzle[1]); + rshader->bcode[i] |= S_SQ_VTX_WORD1_DST_SEL_Z(desc->swizzle[2]); + rshader->bcode[i] |= S_SQ_VTX_WORD1_DST_SEL_W(desc->swizzle[3]); + } + } + return 0; +} + +int r600_shader_register(struct r600_shader *rshader) +{ + struct c_vector *v, *nv; + unsigned tid, cid, rid, i; + + rshader->nvector = rshader->cshader.nvectors; + rshader->gpr = calloc(rshader->nvector, sizeof(void*)); + if (rshader->gpr == NULL) + return -ENOMEM; + tid = 0; + cid = 0; + rid = 0; + /* alloc input first */ + c_list_for_each(v, &rshader->cshader.files[C_FILE_INPUT].vectors) { + nv = c_vector_new(); + if (nv == NULL) { + return -ENOMEM; + } + memcpy(nv, v, sizeof(struct c_vector)); + nv->id = tid++; + rshader->gpr[v->id] = nv; + } + for (i = 0; i < C_FILE_COUNT; i++) { + if (i == C_FILE_INPUT || i == C_FILE_IMMEDIATE) + continue; + c_list_for_each(v, &rshader->cshader.files[i].vectors) { + switch (v->file) { + case C_FILE_OUTPUT: + case C_FILE_TEMPORARY: + nv = c_vector_new(); + if (nv == NULL) { + return -ENOMEM; + } + memcpy(nv, v, sizeof(struct c_vector)); + nv->id = tid++; + rshader->gpr[v->id] = nv; + break; + case C_FILE_CONSTANT: + nv = c_vector_new(); + if (nv == NULL) { + return -ENOMEM; + } + memcpy(nv, v, sizeof(struct c_vector)); + nv->id = (cid++) + 256; + rshader->gpr[v->id] = nv; + break; + case C_FILE_RESOURCE: + nv = c_vector_new(); + if (nv == NULL) { + return -ENOMEM; + } + memcpy(nv, v, sizeof(struct c_vector)); + nv->id = (rid++); + rshader->gpr[v->id] = nv; + break; + default: + fprintf(stderr, "%s:%d unsupported file %d\n", __func__, __LINE__, v->file); + return -EINVAL; + } + } + } + rshader->ngpr = tid; + rshader->nconstant = cid; + rshader->nresource = rid; + return 0; +} + +int r600_shader_find_gpr(struct r600_shader *rshader, struct c_vector *v, + unsigned swizzle, unsigned *sel, unsigned *chan) +{ + struct c_vector *tmp; + + /* Values [0,127] correspond to GPR[0..127]. + * Values [256,511] correspond to cfile constants c[0..255]. + * Other special values are shown in the list below. + * 248 SQ_ALU_SRC_0: special constant 0.0. + * 249 SQ_ALU_SRC_1: special constant 1.0 float. + * 250 SQ_ALU_SRC_1_INT: special constant 1 integer. + * 251 SQ_ALU_SRC_M_1_INT: special constant -1 integer. + * 252 SQ_ALU_SRC_0_5: special constant 0.5 float. + * 253 SQ_ALU_SRC_LITERAL: literal constant. + * 254 SQ_ALU_SRC_PV: previous vector result. + * 255 SQ_ALU_SRC_PS: previous scalar result. + */ + *sel = 248; + *chan = 0; + if (v == NULL) + return 0; + if (v->file == C_FILE_IMMEDIATE) { + *sel = 253; + } else { + tmp = rshader->gpr[v->id]; + if (tmp == NULL) { + fprintf(stderr, "%s %d unknown register\n", __FILE__, __LINE__); + return -EINVAL; + } + *sel = tmp->id; + } + *chan = swizzle; + switch (swizzle) { + case C_SWIZZLE_X: + case C_SWIZZLE_Y: + case C_SWIZZLE_Z: + case C_SWIZZLE_W: + break; + case C_SWIZZLE_0: + *sel = 248; + *chan = 0; + break; + case C_SWIZZLE_1: + *sel = 249; + *chan = 0; + break; + default: + fprintf(stderr, "%s %d invalid swizzle %d\n", __FILE__, __LINE__, swizzle); + return -EINVAL; + } + return 0; +} + +static int r600_shader_new_node(struct r600_shader *rshader, struct c_node *node) +{ + struct r600_shader_node *rnode; + rnode = CALLOC_STRUCT(r600_shader_node); + if (rnode == NULL) + return -ENOMEM; + rnode->node = node; + c_list_init(&rnode->vfetch); + c_list_init(&rnode->alu); + c_list_add_tail(rnode, &rshader->nodes); + rshader->cur_node = rnode; + return 0; +} + +static int r600_shader_new_alu(struct r600_shader *rshader, struct r600_shader_alu *alu) +{ + struct r600_shader_alu *nalu; + + nalu = CALLOC_STRUCT(r600_shader_alu); + if (nalu == NULL) + return -ENOMEM; + memcpy(nalu, alu, sizeof(struct r600_shader_alu)); + c_list_add_tail(nalu, &rshader->cur_node->alu); + return 0; +} + +static int r600_shader_add_vfetch(struct r600_shader *rshader, + struct c_instruction *instruction) +{ + struct r600_shader_vfetch *vfetch; + int r; + + if (instruction == NULL) + return 0; + if (instruction->opcode != C_OPCODE_VFETCH) + return 0; + if (!c_list_empty(&rshader->cur_node->alu)) { + r = r600_shader_new_node(rshader, rshader->cur_node->node); + if (r) + return r; + } + vfetch = calloc(1, sizeof(struct r600_shader_vfetch)); + if (vfetch == NULL) + return -ENOMEM; + r = r600_shader_find_gpr(rshader, instruction->output.vector, 0, &vfetch->sel[0], &vfetch->chan[0]); + if (r) + return r; + r = r600_shader_find_gpr(rshader, instruction->input[0].vector, 0, &vfetch->sel[1], &vfetch->chan[1]); + if (r) + return r; + r = r600_shader_find_gpr(rshader, instruction->input[1].vector, 0, &vfetch->sel[2], &vfetch->chan[2]); + if (r) + return r; + vfetch->dsel[0] = C_SWIZZLE_X; + vfetch->dsel[1] = C_SWIZZLE_Y; + vfetch->dsel[2] = C_SWIZZLE_Z; + vfetch->dsel[3] = C_SWIZZLE_W; + c_list_add_tail(vfetch, &rshader->cur_node->vfetch); + rshader->cur_node->nslot += 2; + return 0; +} + +static int r600_node_translate(struct r600_shader *rshader, struct c_node *node) +{ + struct c_instruction *instruction; + int r; + + r = r600_shader_new_node(rshader, node); + if (r) + return r; + c_list_for_each(instruction, &node->insts) { + switch (instruction->opcode) { + case C_OPCODE_VFETCH: + r = r600_shader_add_vfetch(rshader, instruction); + if (r) + return r; + break; + default: + r = r600_shader_alu_translate(rshader, instruction); + if (r) + return r; + break; + } + } + return 0; +} + +int r600_shader_translate_rec(struct r600_shader *rshader, struct c_node *node) +{ + struct c_node_link *link; + int r; + + if (node->opcode == C_OPCODE_END) + return 0; + r = r600_node_translate(rshader, node); + if (r) + return r; + c_list_for_each(link, &node->childs) { + r = r600_shader_translate_rec(rshader, link->node); + if (r) + return r; + } + return 0; +} + +static int r600_shader_alu_translate(struct r600_shader *rshader, + struct c_instruction *instruction) +{ + struct r600_shader_alu_translate *info = &r600_alu_translate_list[instruction->opcode]; + struct r600_shader_alu alu; + unsigned rmask; + int r, i, j, c; + + if (!c_list_empty(&rshader->cur_node->vfetch)) { + r = r600_shader_new_node(rshader, rshader->cur_node->node); + if (r) + return r; + } + memset(&alu, 0, sizeof(struct r600_shader_alu)); + for (i = 0, c = 0; i < 4; i++) { + if (!(instruction->write_mask) || instruction->output.swizzle[i] == C_SWIZZLE_D) + continue; + alu.alu[c].opcode = instruction->opcode; + alu.alu[c].inst = info->opcode; + alu.alu[c].is_op3 = info->is_op3; + rmask = ~((1 << (i + 1)) - 1); + r = r600_shader_find_gpr(rshader, instruction->output.vector, + instruction->output.swizzle[i], + &alu.alu[c].dst.sel, &alu.alu[c].dst.chan); + if (r) { + fprintf(stderr, "%s %d register failed\n", __FILE__, __LINE__); + return r; + } + for (j = 0; j < instruction->ninput; j++) { + r = r600_shader_find_gpr(rshader, instruction->input[j].vector, + instruction->input[j].swizzle[i], + &alu.alu[c].src[j].sel, &alu.alu[c].src[j].chan); + if (r) { + fprintf(stderr, "%s %d register failed\n", __FILE__, __LINE__); + return r; + } + if (instruction->input[j].vector->file == C_FILE_IMMEDIATE) { + alu.literal[0] = instruction->input[j].vector->channel[0]->value; + alu.literal[1] = instruction->input[j].vector->channel[1]->value; + alu.literal[2] = instruction->input[j].vector->channel[2]->value; + alu.literal[3] = instruction->input[j].vector->channel[3]->value; + if (alu.alu[c].src[j].chan > 1) { + alu.nliteral = 4; + } else { + alu.nliteral = 2; + } + } + } + c++; + } + alu.nalu = c; + alu.alu[c - 1].last = 1; + r = r600_shader_new_alu(rshader, &alu); + return r; +} + +void r600_shader_node_place(struct r600_shader *rshader) +{ + struct r600_shader_node *node, *nnode; + struct r600_shader_alu *alu, *nalu; + struct r600_shader_vfetch *vfetch, *nvfetch; + unsigned cf_id = 0, cf_addr = 0; + + rshader->ncf = 0; + rshader->nslot = 0; + c_list_for_each_safe(node, nnode, &rshader->nodes) { + c_list_for_each_safe(alu, nalu, &node->alu) { + node->nslot += alu->nalu; + node->nslot += alu->nliteral >> 1; + } + node->nfetch = 0; + c_list_for_each_safe(vfetch, nvfetch, &node->vfetch) { + node->nslot += 2; + node->nfetch += 1; + } + if (!c_list_empty(&node->vfetch)) { + /* fetch node need to be 16 bytes aligned*/ + cf_addr += 1; + cf_addr &= 0xFFFFFFFEUL; + } + node->cf_id = cf_id; + node->cf_addr = cf_addr; + cf_id += 2; + cf_addr += node->nslot * 2; + rshader->ncf++; + } + rshader->nslot = cf_addr; + c_list_for_each_safe(node, nnode, &rshader->nodes) { + node->cf_addr += cf_id * 2; + } + rshader->ncf += rshader->cshader.files[C_FILE_OUTPUT].nvectors; + rshader->ndw = rshader->ncf * 2 + rshader->nslot * 2; +} + +int r600_shader_legalize(struct r600_shader *rshader) +{ + struct r600_shader_node *node, *nnode; + struct r600_shader_alu *alu, *nalu; + unsigned i; + + c_list_for_each_safe(node, nnode, &rshader->nodes) { + c_list_for_each_safe(alu, nalu, &node->alu) { + for (i = 0; i < alu->nalu; i++) { + switch (alu->alu[i].opcode) { + case C_OPCODE_DP3: + if (alu->alu[i].last) { + /* force W component to be 0 */ + alu->alu[i].src[0].chan = alu->alu[i].src[1].chan = 0; + alu->alu[i].src[0].sel = alu->alu[i].src[1].sel = 248; + } + break; + case C_OPCODE_SUB: + alu->alu[i].src[1].neg ^= 1; + break; + case C_OPCODE_ABS: + alu->alu[i].src[0].abs |= 1; + break; + default: + break; + } + } + } + } + return 0; +} + +#if 0 +static int r600_shader_alu_translate_lit(struct r600_shader *rshader, + struct c_instruction *instruction, + struct r600_shader_alu_translate *info) +{ + struct r600_shader_alu alu; + int r; + + if (rshader->cur_node->nvfetch) { + r = r600_shader_new_node(rshader, rshader->cur_node->node); + if (r) + return r; + } + /* dst.z = log(src0.y) */ + memset(&alu, 0, sizeof(struct r600_shader_alu)); + alu.opcode = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_CLAMPED; + alu.is_op3 = 0; + alu.last = 1; + alu.vector[0] = instruction->vectors[0]; + alu.vector[1] = instruction->vectors[1]; + alu.component[0] = C_SWIZZLE_Z; + alu.component[1] = C_SWIZZLE_Y; + r = r600_shader_new_alu(rshader, &alu); + if (r) + return r; + /* dst.z = MUL_LIT(src0.w, dst.z, src0.x) */ + memset(&alu, 0, sizeof(struct r600_shader_alu)); + alu.opcode = V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MUL_LIT; + alu.is_op3 = 0; + alu.last = 1; + alu.vector[0] = instruction->vectors[0]; + alu.vector[1] = instruction->vectors[1]; + alu.vector[2] = instruction->vectors[0]; + alu.vector[3] = instruction->vectors[1]; + alu.component[0] = C_SWIZZLE_Z; + alu.component[1] = C_SWIZZLE_W; + alu.component[2] = C_SWIZZLE_Z; + alu.component[3] = C_SWIZZLE_X; + r = r600_shader_new_alu(rshader, &alu); + if (r) + return r; + /* dst.z = exp(dst.z) */ + memset(&alu, 0, sizeof(struct r600_shader_alu)); + alu.opcode = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE; + alu.is_op3 = 0; + alu.last = 1; + alu.vector[0] = instruction->vectors[0]; + alu.vector[1] = instruction->vectors[0]; + alu.component[0] = C_SWIZZLE_Z; + alu.component[1] = C_SWIZZLE_Z; + r = r600_shader_new_alu(rshader, &alu); + if (r) + return r; + /* dst.x = 1 */ + memset(&alu, 0, sizeof(struct r600_shader_alu)); + alu.opcode = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV; + alu.is_op3 = 0; + alu.last = 0; + alu.vector[0] = instruction->vectors[0]; + alu.vector[1] = instruction->vectors[1]; + alu.component[0] = C_SWIZZLE_X; + alu.component[1] = C_SWIZZLE_1; + r = r600_shader_new_alu(rshader, &alu); + if (r) + return r; + /* dst.w = 1 */ + memset(&alu, 0, sizeof(struct r600_shader_alu)); + alu.opcode = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV; + alu.is_op3 = 0; + alu.last = 0; + alu.vector[0] = instruction->vectors[0]; + alu.vector[1] = instruction->vectors[1]; + alu.component[0] = C_SWIZZLE_W; + alu.component[1] = C_SWIZZLE_1; + r = r600_shader_new_alu(rshader, &alu); + if (r) + return r; + /* dst.y = max(src0.x, 0.0) */ + memset(&alu, 0, sizeof(struct r600_shader_alu)); + alu.opcode = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX; + alu.is_op3 = 0; + alu.last = 1; + alu.vector[0] = instruction->vectors[0]; + alu.vector[1] = instruction->vectors[1]; + alu.vector[2] = instruction->vectors[1]; + alu.component[0] = C_SWIZZLE_Y; + alu.component[1] = C_SWIZZLE_X; + alu.component[2] = C_SWIZZLE_0; + r = r600_shader_new_alu(rshader, &alu); + if (r) + return r; + return 0; +} +#endif +struct r600_shader_alu_translate r600_alu_translate_list[C_OPCODE_LAST] = { + {C_OPCODE_ARL, 0, 0}, + {C_OPCODE_MOV, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV, 0}, + {C_OPCODE_LIT, 0, 0}, + {C_OPCODE_RCP, 0, 0}, + {C_OPCODE_RSQ, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_FF, 0}, + {C_OPCODE_EXP, 0, 0}, + {C_OPCODE_LOG, 0, 0}, + {C_OPCODE_MUL, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL, 0}, + {C_OPCODE_ADD, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD, 0}, + {C_OPCODE_DP3, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4, 0}, + {C_OPCODE_DP4, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4, 0}, + {C_OPCODE_DST, 0, 0}, + {C_OPCODE_MIN, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN, 0}, + {C_OPCODE_MAX, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX, 0}, + {C_OPCODE_SLT, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT, 0}, + {C_OPCODE_SGE, 0, 0}, + {C_OPCODE_MAD, V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD, 1}, + {C_OPCODE_SUB, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD, 0}, + {C_OPCODE_LRP, 0, 0}, + {C_OPCODE_CND, 0, 0}, + {20, 0, 0}, + {C_OPCODE_DP2A, 0, 0}, + {22, 0, 0}, + {23, 0, 0}, + {C_OPCODE_FRC, 0, 0}, + {C_OPCODE_CLAMP, 0, 0}, + {C_OPCODE_FLR, 0, 0}, + {C_OPCODE_ROUND, 0, 0}, + {C_OPCODE_EX2, 0, 0}, + {C_OPCODE_LG2, 0, 0}, + {C_OPCODE_POW, 0, 0}, + {C_OPCODE_XPD, 0, 0}, + {32, 0, 0}, + {C_OPCODE_ABS, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV, 0}, + {C_OPCODE_RCC, 0, 0}, + {C_OPCODE_DPH, 0, 0}, + {C_OPCODE_COS, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_COS, 0}, + {C_OPCODE_DDX, 0, 0}, + {C_OPCODE_DDY, 0, 0}, + {C_OPCODE_KILP, 0, 0}, + {C_OPCODE_PK2H, 0, 0}, + {C_OPCODE_PK2US, 0, 0}, + {C_OPCODE_PK4B, 0, 0}, + {C_OPCODE_PK4UB, 0, 0}, + {C_OPCODE_RFL, 0, 0}, + {C_OPCODE_SEQ, 0, 0}, + {C_OPCODE_SFL, 0, 0}, + {C_OPCODE_SGT, 0, 0}, + {C_OPCODE_SIN, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SIN, 0}, + {C_OPCODE_SLE, 0, 0}, + {C_OPCODE_SNE, 0, 0}, + {C_OPCODE_STR, 0, 0}, + {C_OPCODE_TEX, 0, 0}, + {C_OPCODE_TXD, 0, 0}, + {C_OPCODE_TXP, 0, 0}, + {C_OPCODE_UP2H, 0, 0}, + {C_OPCODE_UP2US, 0, 0}, + {C_OPCODE_UP4B, 0, 0}, + {C_OPCODE_UP4UB, 0, 0}, + {C_OPCODE_X2D, 0, 0}, + {C_OPCODE_ARA, 0, 0}, + {C_OPCODE_ARR, 0, 0}, + {C_OPCODE_BRA, 0, 0}, + {C_OPCODE_CAL, 0, 0}, + {C_OPCODE_RET, 0, 0}, + {C_OPCODE_SSG, 0, 0}, + {C_OPCODE_CMP, 0, 0}, + {C_OPCODE_SCS, 0, 0}, + {C_OPCODE_TXB, 0, 0}, + {C_OPCODE_NRM, 0, 0}, + {C_OPCODE_DIV, 0, 0}, + {C_OPCODE_DP2, 0, 0}, + {C_OPCODE_TXL, 0, 0}, + {C_OPCODE_BRK, 0, 0}, + {C_OPCODE_IF, 0, 0}, + {C_OPCODE_BGNFOR, 0, 0}, + {C_OPCODE_REP, 0, 0}, + {C_OPCODE_ELSE, 0, 0}, + {C_OPCODE_ENDIF, 0, 0}, + {C_OPCODE_ENDFOR, 0, 0}, + {C_OPCODE_ENDREP, 0, 0}, + {C_OPCODE_PUSHA, 0, 0}, + {C_OPCODE_POPA, 0, 0}, + {C_OPCODE_CEIL, 0, 0}, + {C_OPCODE_I2F, 0, 0}, + {C_OPCODE_NOT, 0, 0}, + {C_OPCODE_TRUNC, 0, 0}, + {C_OPCODE_SHL, 0, 0}, + {88, 0, 0}, + {C_OPCODE_AND, 0, 0}, + {C_OPCODE_OR, 0, 0}, + {C_OPCODE_MOD, 0, 0}, + {C_OPCODE_XOR, 0, 0}, + {C_OPCODE_SAD, 0, 0}, + {C_OPCODE_TXF, 0, 0}, + {C_OPCODE_TXQ, 0, 0}, + {C_OPCODE_CONT, 0, 0}, + {C_OPCODE_EMIT, 0, 0}, + {C_OPCODE_ENDPRIM, 0, 0}, + {C_OPCODE_BGNLOOP, 0, 0}, + {C_OPCODE_BGNSUB, 0, 0}, + {C_OPCODE_ENDLOOP, 0, 0}, + {C_OPCODE_ENDSUB, 0, 0}, + {103, 0, 0}, + {104, 0, 0}, + {105, 0, 0}, + {106, 0, 0}, + {C_OPCODE_NOP, 0, 0}, + {108, 0, 0}, + {109, 0, 0}, + {110, 0, 0}, + {111, 0, 0}, + {C_OPCODE_NRM4, 0, 0}, + {C_OPCODE_CALLNZ, 0, 0}, + {C_OPCODE_IFC, 0, 0}, + {C_OPCODE_BREAKC, 0, 0}, + {C_OPCODE_KIL, 0, 0}, + {C_OPCODE_END, 0, 0}, + {118, 0, 0}, + {C_OPCODE_F2I, 0, 0}, + {C_OPCODE_IDIV, 0, 0}, + {C_OPCODE_IMAX, 0, 0}, + {C_OPCODE_IMIN, 0, 0}, + {C_OPCODE_INEG, 0, 0}, + {C_OPCODE_ISGE, 0, 0}, + {C_OPCODE_ISHR, 0, 0}, + {C_OPCODE_ISLT, 0, 0}, + {C_OPCODE_F2U, 0, 0}, + {C_OPCODE_U2F, 0, 0}, + {C_OPCODE_UADD, 0, 0}, + {C_OPCODE_UDIV, 0, 0}, + {C_OPCODE_UMAD, 0, 0}, + {C_OPCODE_UMAX, 0, 0}, + {C_OPCODE_UMIN, 0, 0}, + {C_OPCODE_UMOD, 0, 0}, + {C_OPCODE_UMUL, 0, 0}, + {C_OPCODE_USEQ, 0, 0}, + {C_OPCODE_USGE, 0, 0}, + {C_OPCODE_USHR, 0, 0}, + {C_OPCODE_USLT, 0, 0}, + {C_OPCODE_USNE, 0, 0}, + {C_OPCODE_SWITCH, 0, 0}, + {C_OPCODE_CASE, 0, 0}, + {C_OPCODE_DEFAULT, 0, 0}, + {C_OPCODE_ENDSWITCH, 0, 0}, + {C_OPCODE_VFETCH, 0, 0}, + {C_OPCODE_ENTRY, 0, 0}, +}; diff --git a/src/gallium/drivers/r600/r600_compiler_r700.c b/src/gallium/drivers/r600/r600_compiler_r700.c new file mode 100644 index 00000000000..2cc2951f944 --- /dev/null +++ b/src/gallium/drivers/r600/r600_compiler_r700.c @@ -0,0 +1,213 @@ +/* + * Copyright 2010 Jerome Glisse + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + */ +#include +#include +#include +#include +#include +#include "r600_context.h" +#include "r700_sq.h" + +static int r700_shader_cf_node_bytecode(struct r600_shader *rshader, + struct r600_shader_node *rnode, + unsigned *cid) +{ + unsigned id = *cid; + + if (rnode->nfetch) { + rshader->bcode[id++] = S_SQ_CF_WORD0_ADDR(rnode->cf_addr >> 1); + rshader->bcode[id++] = S_SQ_CF_WORD1_CF_INST(V_SQ_CF_WORD1_SQ_CF_INST_VTX) | + S_SQ_CF_WORD1_COUNT(rnode->nfetch - 1); + } else { + rshader->bcode[id++] = S_SQ_CF_ALU_WORD0_ADDR(rnode->cf_addr >> 1); + rshader->bcode[id++] = S_SQ_CF_ALU_WORD1_CF_INST(V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU) | + S_SQ_CF_ALU_WORD1_BARRIER(1) | + S_SQ_CF_ALU_WORD1_COUNT(rnode->nslot - 1); + } + *cid = id; + return 0; +} + +static int r700_shader_cf_output_bytecode(struct r600_shader *rshader, + struct c_vector *v, + unsigned *cid, + unsigned end) +{ + unsigned gpr, chan; + unsigned id = *cid; + int r; + + r = r600_shader_find_gpr(rshader, v, 0, &gpr, &chan); + if (r) + return r; + rshader->bcode[id + 0] = S_SQ_CF_ALLOC_EXPORT_WORD0_RW_GPR(gpr) | + S_SQ_CF_ALLOC_EXPORT_WORD0_ELEM_SIZE(3); + rshader->bcode[id + 1] = S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_X(0) | + S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Y(1) | + S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Z(2) | + S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_W(3) | + S_SQ_CF_ALLOC_EXPORT_WORD1_BARRIER(1) | + S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT_DONE) | + S_SQ_CF_ALLOC_EXPORT_WORD1_END_OF_PROGRAM(end); + switch (v->name) { + case C_SEMANTIC_POSITION: + rshader->bcode[id + 0] |= S_SQ_CF_ALLOC_EXPORT_WORD0_ARRAY_BASE(60) | + S_SQ_CF_ALLOC_EXPORT_WORD0_TYPE(V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_POS); + break; + case C_SEMANTIC_COLOR: + if (rshader->cshader.type == C_PROGRAM_TYPE_VS) { + rshader->output[rshader->noutput].gpr = gpr; + rshader->output[rshader->noutput].sid = v->sid; + rshader->output[rshader->noutput].name = v->name; + rshader->bcode[id + 0] |= S_SQ_CF_ALLOC_EXPORT_WORD0_ARRAY_BASE(rshader->noutput++) | + S_SQ_CF_ALLOC_EXPORT_WORD0_TYPE(V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PARAM); + } else { + rshader->bcode[id + 0] |= S_SQ_CF_ALLOC_EXPORT_WORD0_ARRAY_BASE(0) | + S_SQ_CF_ALLOC_EXPORT_WORD0_TYPE(V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PIXEL); + } + break; + case C_SEMANTIC_GENERIC: + rshader->output[rshader->noutput].gpr = gpr; + rshader->output[rshader->noutput].sid = v->sid; + rshader->output[rshader->noutput].name = v->name; + rshader->bcode[id + 0] |= S_SQ_CF_ALLOC_EXPORT_WORD0_ARRAY_BASE(rshader->noutput++) | + S_SQ_CF_ALLOC_EXPORT_WORD0_TYPE(V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PARAM); + break; + default: + fprintf(stderr, "%s:%d unsupported\n", __func__, __LINE__); + return -EINVAL; + } + *cid = id + 2; + return 0; +} + +static int r700_shader_alu_bytecode(struct r600_shader *rshader, + struct r600_shader_node *rnode, + struct r600_shader_inst *alu, + unsigned *cid) +{ + unsigned id = *cid; + + /* don't replace gpr by pv or ps for destination register */ + if (alu->is_op3) { + rshader->bcode[id++] = S_SQ_ALU_WORD0_SRC0_SEL(alu->src[0].sel) | + S_SQ_ALU_WORD0_SRC0_CHAN(alu->src[0].chan) | + S_SQ_ALU_WORD0_SRC1_SEL(alu->src[1].sel) | + S_SQ_ALU_WORD0_SRC1_CHAN(alu->src[1].chan) | + S_SQ_ALU_WORD0_LAST(alu->last); + rshader->bcode[id++] = S_SQ_ALU_WORD1_DST_GPR(alu->dst.sel) | + S_SQ_ALU_WORD1_DST_CHAN(alu->dst.chan) | + S_SQ_ALU_WORD1_OP3_SRC2_SEL(alu->src[2].sel) | + S_SQ_ALU_WORD1_OP3_SRC2_CHAN(alu->src[2].chan) | + S_SQ_ALU_WORD1_OP3_SRC2_NEG(alu->src[2].neg) | + S_SQ_ALU_WORD1_OP3_ALU_INST(alu->inst) | + S_SQ_ALU_WORD1_BANK_SWIZZLE(0); + } else { + rshader->bcode[id++] = S_SQ_ALU_WORD0_SRC0_SEL(alu->src[0].sel) | + S_SQ_ALU_WORD0_SRC0_CHAN(alu->src[0].chan) | + S_SQ_ALU_WORD0_SRC0_NEG(alu->src[0].neg) | + S_SQ_ALU_WORD0_SRC1_SEL(alu->src[1].sel) | + S_SQ_ALU_WORD0_SRC1_CHAN(alu->src[1].chan) | + S_SQ_ALU_WORD0_SRC1_NEG(alu->src[1].neg) | + S_SQ_ALU_WORD0_LAST(alu->last); + rshader->bcode[id++] = S_SQ_ALU_WORD1_DST_GPR(alu->dst.sel) | + S_SQ_ALU_WORD1_DST_CHAN(alu->dst.chan) | + S_SQ_ALU_WORD1_OP2_SRC0_ABS(alu->src[0].abs) | + S_SQ_ALU_WORD1_OP2_SRC1_ABS(alu->src[1].abs) | + S_SQ_ALU_WORD1_OP2_WRITE_MASK(1) | + S_SQ_ALU_WORD1_OP2_ALU_INST(alu->inst) | + S_SQ_ALU_WORD1_BANK_SWIZZLE(0); + } + *cid = id; + return 0; +} + +int r700_shader_translate(struct r600_shader *rshader) +{ + struct c_shader *shader = &rshader->cshader; + struct r600_shader_node *rnode; + struct r600_shader_vfetch *vfetch; + struct r600_shader_alu *alu; + struct c_vector *v; + unsigned id, i, end; + int r; + + r = r600_shader_register(rshader); + if (r) { + fprintf(stderr, "%s %d register allocation failed\n", __FILE__, __LINE__); + return r; + } + r = r600_shader_translate_rec(rshader, &shader->entry); + if (r) { + fprintf(stderr, "%s %d translation failed\n", __FILE__, __LINE__); + return r; + } + r = r600_shader_legalize(rshader); + if (r) { + fprintf(stderr, "%s %d legalize failed\n", __FILE__, __LINE__); + return r; + } + r600_shader_node_place(rshader); + rshader->bcode = malloc(rshader->ndw * 4); + if (rshader->bcode == NULL) + return -ENOMEM; + c_list_for_each(rnode, &rshader->nodes) { + id = rnode->cf_addr; + c_list_for_each(vfetch, &rnode->vfetch) { + r = r600_shader_vfetch_bytecode(rshader, rnode, vfetch, &id); + if (r) + return r; + } + c_list_for_each(alu, &rnode->alu) { + for (i = 0; i < alu->nalu; i++) { + r = r700_shader_alu_bytecode(rshader, rnode, &alu->alu[i], &id); + if (r) + return r; + } + for (i = 0; i < alu->nliteral; i++) { + rshader->bcode[id++] = alu->literal[i]; + } + } + } + id = 0; + c_list_for_each(rnode, &rshader->nodes) { + r = r700_shader_cf_node_bytecode(rshader, rnode, &id); + if (r) + return r; + } + c_list_for_each(v, &rshader->cshader.files[C_FILE_OUTPUT].vectors) { + end = 0; + if (v->next == &rshader->cshader.files[C_FILE_OUTPUT].vectors) + end = 1; + r = r700_shader_cf_output_bytecode(rshader, v, &id, end); + if (r) + return r; + } + c_list_for_each(v, &rshader->cshader.files[C_FILE_INPUT].vectors) { + rshader->input[rshader->ninput].gpr = rshader->ninput; + rshader->input[rshader->ninput].sid = v->sid; + rshader->input[rshader->ninput].name = v->name; + rshader->ninput++; + } + return 0; +} diff --git a/src/gallium/drivers/r600/r600_compiler_tgsi.c b/src/gallium/drivers/r600/r600_compiler_tgsi.c new file mode 100644 index 00000000000..745f92272f8 --- /dev/null +++ b/src/gallium/drivers/r600/r600_compiler_tgsi.c @@ -0,0 +1,717 @@ +/* + * Copyright 2010 Jerome Glisse + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + */ +#include +#include +#include +#include +#include +#include +#include +#include "r600_shader.h" +#include "r600_context.h" + +struct tgsi_shader { + struct c_vector **v[TGSI_FILE_COUNT]; + struct tgsi_shader_info info; + struct tgsi_parse_context parser; + const struct tgsi_token *tokens; + struct c_shader *shader; + struct c_node *node; +}; + +static unsigned tgsi_file_to_c_file(unsigned file); +static unsigned tgsi_sname_to_c_sname(unsigned sname); +static int tgsi_opcode_to_c_opcode(unsigned opcode, unsigned *copcode); + +static int tgsi_shader_init(struct tgsi_shader *ts, + const struct tgsi_token *tokens, + struct c_shader *shader) +{ + int i; + + ts->shader = shader; + ts->tokens = tokens; + tgsi_scan_shader(ts->tokens, &ts->info); + tgsi_parse_init(&ts->parser, ts->tokens); + /* initialize to NULL in case of error */ + for (i = 0; i < C_FILE_COUNT; i++) { + ts->v[i] = NULL; + } + for (i = 0; i < TGSI_FILE_COUNT; i++) { + if (ts->info.file_count[i] > 0) { + ts->v[i] = calloc(ts->info.file_count[i], sizeof(void*)); + if (ts->v[i] == NULL) { + fprintf(stderr, "%s:%d unsupported %d %d\n", __func__, __LINE__, i, ts->info.file_count[i]); + return -ENOMEM; + } + } + } + return 0; +} + +static void tgsi_shader_destroy(struct tgsi_shader *ts) +{ + int i; + + for (i = 0; i < TGSI_FILE_COUNT; i++) { + free(ts->v[i]); + } + tgsi_parse_free(&ts->parser); +} + +static int ntransform_declaration(struct tgsi_shader *ts) +{ + struct tgsi_full_declaration *fd = &ts->parser.FullToken.FullDeclaration; + struct c_vector *v; + unsigned file; + unsigned name; + int sid; + int i; + + if (fd->Declaration.Dimension) { + fprintf(stderr, "%s:%d unsupported\n", __func__, __LINE__); + return -EINVAL; + } + for (i = fd->Range.First ; i <= fd->Range.Last; i++) { + sid = i; + name = C_SEMANTIC_GENERIC; + file = tgsi_file_to_c_file(fd->Declaration.File); + if (file == TGSI_FILE_NULL) { + fprintf(stderr, "%s:%d unsupported\n", __func__, __LINE__); + return -EINVAL; + } + if (fd->Declaration.Semantic) { + name = tgsi_sname_to_c_sname(fd->Semantic.Name); + sid = fd->Semantic.Index; + } + v = c_shader_vector_new(ts->shader, file, name, sid); + if (v == NULL) { + fprintf(stderr, "%s:%d unsupported\n", __func__, __LINE__); + return -ENOMEM; + } + ts->v[fd->Declaration.File][i] = v; + } + return 0; +} + +static int ntransform_immediate(struct tgsi_shader *ts) +{ + struct tgsi_full_immediate *fd = &ts->parser.FullToken.FullImmediate; + struct c_vector *v; + unsigned file; + unsigned name; + + if (fd->Immediate.DataType != TGSI_IMM_FLOAT32) { + fprintf(stderr, "%s:%d unsupported\n", __func__, __LINE__); + return -EINVAL; + } + name = C_SEMANTIC_GENERIC; + file = C_FILE_IMMEDIATE; + v = c_shader_vector_new(ts->shader, file, name, 0); + if (v == NULL) { + fprintf(stderr, "%s:%d unsupported\n", __func__, __LINE__); + return -ENOMEM; + } + v->channel[0]->value = fd->u[0].Uint; + v->channel[1]->value = fd->u[1].Uint; + v->channel[2]->value = fd->u[2].Uint; + v->channel[3]->value = fd->u[3].Uint; + ts->v[TGSI_FILE_IMMEDIATE][0] = v; + return 0; +} + +static int ntransform_instruction(struct tgsi_shader *ts) +{ + struct tgsi_full_instruction *fi = &ts->parser.FullToken.FullInstruction; + struct c_shader *shader = ts->shader; + struct c_instruction instruction; + unsigned opcode; + int i, r; + + if (fi->Instruction.NumDstRegs > 1) { + fprintf(stderr, "%s %d unsupported\n", __func__, __LINE__); + return -EINVAL; + } + if (fi->Instruction.Saturate) { + fprintf(stderr, "%s %d unsupported\n", __func__, __LINE__); + return -EINVAL; + } + if (fi->Instruction.Predicate) { + fprintf(stderr, "%s %d unsupported\n", __func__, __LINE__); + return -EINVAL; + } + if (fi->Instruction.Label) { + fprintf(stderr, "%s %d unsupported\n", __func__, __LINE__); + return -EINVAL; + } + if (fi->Instruction.Texture) { + fprintf(stderr, "%s %d unsupported\n", __func__, __LINE__); + return -EINVAL; + } + for (i = 0; i < fi->Instruction.NumSrcRegs; i++) { + if (fi->Src[i].Register.Indirect || + fi->Src[i].Register.Dimension || + fi->Src[i].Register.Absolute) { + fprintf(stderr, "%s %d unsupported\n", __func__, __LINE__); + return -EINVAL; + } + } + for (i = 0; i < fi->Instruction.NumDstRegs; i++) { + if (fi->Dst[i].Register.Indirect || fi->Dst[i].Register.Dimension) { + fprintf(stderr, "%s %d unsupported\n", __func__, __LINE__); + return -EINVAL; + } + } + r = tgsi_opcode_to_c_opcode(fi->Instruction.Opcode, &opcode); + if (r) { + fprintf(stderr, "%s:%d unsupported\n", __func__, __LINE__); + return r; + } + if (opcode == C_OPCODE_END) { + return c_node_cfg_link(ts->node, &shader->end); + } + /* FIXME add flow instruction handling */ + memset(&instruction, 0, sizeof(struct c_instruction)); + instruction.opcode = opcode; + instruction.ninput = fi->Instruction.NumSrcRegs; + instruction.write_mask = fi->Dst[0].Register.WriteMask; + for (i = 0; i < fi->Instruction.NumSrcRegs; i++) { + instruction.input[i].vector = ts->v[fi->Src[i].Register.File][fi->Src[i].Register.Index]; + instruction.input[i].swizzle[0] = fi->Src[i].Register.SwizzleX; + instruction.input[i].swizzle[1] = fi->Src[i].Register.SwizzleY; + instruction.input[i].swizzle[2] = fi->Src[i].Register.SwizzleZ; + instruction.input[i].swizzle[3] = fi->Src[i].Register.SwizzleW; + } + instruction.output.vector = ts->v[fi->Dst[0].Register.File][fi->Dst[0].Register.Index]; + instruction.output.swizzle[0] = (fi->Dst[0].Register.WriteMask & 0x1) ? C_SWIZZLE_X : C_SWIZZLE_D; + instruction.output.swizzle[1] = (fi->Dst[0].Register.WriteMask & 0x2) ? C_SWIZZLE_Y : C_SWIZZLE_D; + instruction.output.swizzle[2] = (fi->Dst[0].Register.WriteMask & 0x4) ? C_SWIZZLE_Z : C_SWIZZLE_D; + instruction.output.swizzle[3] = (fi->Dst[0].Register.WriteMask & 0x8) ? C_SWIZZLE_W : C_SWIZZLE_D; + return c_node_add_new_instruction(ts->node, &instruction); +} + +int c_shader_from_tgsi(struct c_shader *shader, unsigned type, + const struct tgsi_token *tokens) +{ + struct tgsi_shader ts; + int r = 0; + + c_shader_init(shader, type); + r = tgsi_shader_init(&ts, tokens, shader); + if (r) + goto out_err; + ts.shader = shader; + ts.node = &shader->entry; + while (!tgsi_parse_end_of_tokens(&ts.parser)) { + tgsi_parse_token(&ts.parser); + switch (ts.parser.FullToken.Token.Type) { + case TGSI_TOKEN_TYPE_IMMEDIATE: + r = ntransform_immediate(&ts); + if (r) + goto out_err; + break; + case TGSI_TOKEN_TYPE_DECLARATION: + r = ntransform_declaration(&ts); + if (r) + goto out_err; + break; + case TGSI_TOKEN_TYPE_INSTRUCTION: + r = ntransform_instruction(&ts); + if (r) + goto out_err; + break; + default: + r = -EINVAL; + goto out_err; + } + } + tgsi_shader_destroy(&ts); + return 0; +out_err: + c_shader_destroy(shader); + tgsi_shader_destroy(&ts); + return r; +} + +static unsigned tgsi_file_to_c_file(unsigned file) +{ + switch (file) { + case TGSI_FILE_CONSTANT: + return C_FILE_CONSTANT; + case TGSI_FILE_INPUT: + return C_FILE_INPUT; + case TGSI_FILE_OUTPUT: + return C_FILE_OUTPUT; + case TGSI_FILE_TEMPORARY: + return C_FILE_TEMPORARY; + case TGSI_FILE_SAMPLER: + return C_FILE_SAMPLER; + case TGSI_FILE_ADDRESS: + return C_FILE_ADDRESS; + case TGSI_FILE_IMMEDIATE: + return C_FILE_IMMEDIATE; + case TGSI_FILE_LOOP: + return C_FILE_LOOP; + case TGSI_FILE_PREDICATE: + return C_FILE_PREDICATE; + case TGSI_FILE_SYSTEM_VALUE: + return C_FILE_SYSTEM_VALUE; + case TGSI_FILE_NULL: + return C_FILE_NULL; + default: + fprintf(stderr, "%s:%d unsupported file %d\n", __func__, __LINE__, file); + return C_FILE_NULL; + } +} + +static unsigned tgsi_sname_to_c_sname(unsigned sname) +{ + switch (sname) { + case TGSI_SEMANTIC_POSITION: + return C_SEMANTIC_POSITION; + case TGSI_SEMANTIC_COLOR: + return C_SEMANTIC_COLOR; + case TGSI_SEMANTIC_BCOLOR: + return C_SEMANTIC_BCOLOR; + case TGSI_SEMANTIC_FOG: + return C_SEMANTIC_FOG; + case TGSI_SEMANTIC_PSIZE: + return C_SEMANTIC_PSIZE; + case TGSI_SEMANTIC_GENERIC: + return C_SEMANTIC_GENERIC; + case TGSI_SEMANTIC_NORMAL: + return C_SEMANTIC_NORMAL; + case TGSI_SEMANTIC_FACE: + return C_SEMANTIC_FACE; + case TGSI_SEMANTIC_EDGEFLAG: + return C_SEMANTIC_EDGEFLAG; + case TGSI_SEMANTIC_PRIMID: + return C_SEMANTIC_PRIMID; + case TGSI_SEMANTIC_INSTANCEID: + return C_SEMANTIC_INSTANCEID; + default: + return C_SEMANTIC_GENERIC; + } +} + +static int tgsi_opcode_to_c_opcode(unsigned opcode, unsigned *copcode) +{ + switch (opcode) { + case TGSI_OPCODE_MOV: + *copcode = C_OPCODE_MOV; + return 0; + case TGSI_OPCODE_MUL: + *copcode = C_OPCODE_MUL; + return 0; + case TGSI_OPCODE_MAD: + *copcode = C_OPCODE_MAD; + return 0; + case TGSI_OPCODE_END: + *copcode = C_OPCODE_END; + return 0; + case TGSI_OPCODE_ARL: + *copcode = C_OPCODE_ARL; + return 0; + case TGSI_OPCODE_LIT: + *copcode = C_OPCODE_LIT; + return 0; + case TGSI_OPCODE_RCP: + *copcode = C_OPCODE_RCP; + return 0; + case TGSI_OPCODE_RSQ: + *copcode = C_OPCODE_RSQ; + return 0; + case TGSI_OPCODE_EXP: + *copcode = C_OPCODE_EXP; + return 0; + case TGSI_OPCODE_LOG: + *copcode = C_OPCODE_LOG; + return 0; + case TGSI_OPCODE_ADD: + *copcode = C_OPCODE_ADD; + return 0; + case TGSI_OPCODE_DP3: + *copcode = C_OPCODE_DP3; + return 0; + case TGSI_OPCODE_DP4: + *copcode = C_OPCODE_DP4; + return 0; + case TGSI_OPCODE_DST: + *copcode = C_OPCODE_DST; + return 0; + case TGSI_OPCODE_MIN: + *copcode = C_OPCODE_MIN; + return 0; + case TGSI_OPCODE_MAX: + *copcode = C_OPCODE_MAX; + return 0; + case TGSI_OPCODE_SLT: + *copcode = C_OPCODE_SLT; + return 0; + case TGSI_OPCODE_SGE: + *copcode = C_OPCODE_SGE; + return 0; + case TGSI_OPCODE_SUB: + *copcode = C_OPCODE_SUB; + return 0; + case TGSI_OPCODE_LRP: + *copcode = C_OPCODE_LRP; + return 0; + case TGSI_OPCODE_CND: + *copcode = C_OPCODE_CND; + return 0; + case TGSI_OPCODE_DP2A: + *copcode = C_OPCODE_DP2A; + return 0; + case TGSI_OPCODE_FRC: + *copcode = C_OPCODE_FRC; + return 0; + case TGSI_OPCODE_CLAMP: + *copcode = C_OPCODE_CLAMP; + return 0; + case TGSI_OPCODE_FLR: + *copcode = C_OPCODE_FLR; + return 0; + case TGSI_OPCODE_ROUND: + *copcode = C_OPCODE_ROUND; + return 0; + case TGSI_OPCODE_EX2: + *copcode = C_OPCODE_EX2; + return 0; + case TGSI_OPCODE_LG2: + *copcode = C_OPCODE_LG2; + return 0; + case TGSI_OPCODE_POW: + *copcode = C_OPCODE_POW; + return 0; + case TGSI_OPCODE_XPD: + *copcode = C_OPCODE_XPD; + return 0; + case TGSI_OPCODE_ABS: + *copcode = C_OPCODE_ABS; + return 0; + case TGSI_OPCODE_RCC: + *copcode = C_OPCODE_RCC; + return 0; + case TGSI_OPCODE_DPH: + *copcode = C_OPCODE_DPH; + return 0; + case TGSI_OPCODE_COS: + *copcode = C_OPCODE_COS; + return 0; + case TGSI_OPCODE_DDX: + *copcode = C_OPCODE_DDX; + return 0; + case TGSI_OPCODE_DDY: + *copcode = C_OPCODE_DDY; + return 0; + case TGSI_OPCODE_KILP: + *copcode = C_OPCODE_KILP; + return 0; + case TGSI_OPCODE_PK2H: + *copcode = C_OPCODE_PK2H; + return 0; + case TGSI_OPCODE_PK2US: + *copcode = C_OPCODE_PK2US; + return 0; + case TGSI_OPCODE_PK4B: + *copcode = C_OPCODE_PK4B; + return 0; + case TGSI_OPCODE_PK4UB: + *copcode = C_OPCODE_PK4UB; + return 0; + case TGSI_OPCODE_RFL: + *copcode = C_OPCODE_RFL; + return 0; + case TGSI_OPCODE_SEQ: + *copcode = C_OPCODE_SEQ; + return 0; + case TGSI_OPCODE_SFL: + *copcode = C_OPCODE_SFL; + return 0; + case TGSI_OPCODE_SGT: + *copcode = C_OPCODE_SGT; + return 0; + case TGSI_OPCODE_SIN: + *copcode = C_OPCODE_SIN; + return 0; + case TGSI_OPCODE_SLE: + *copcode = C_OPCODE_SLE; + return 0; + case TGSI_OPCODE_SNE: + *copcode = C_OPCODE_SNE; + return 0; + case TGSI_OPCODE_STR: + *copcode = C_OPCODE_STR; + return 0; + case TGSI_OPCODE_TEX: + *copcode = C_OPCODE_TEX; + return 0; + case TGSI_OPCODE_TXD: + *copcode = C_OPCODE_TXD; + return 0; + case TGSI_OPCODE_TXP: + *copcode = C_OPCODE_TXP; + return 0; + case TGSI_OPCODE_UP2H: + *copcode = C_OPCODE_UP2H; + return 0; + case TGSI_OPCODE_UP2US: + *copcode = C_OPCODE_UP2US; + return 0; + case TGSI_OPCODE_UP4B: + *copcode = C_OPCODE_UP4B; + return 0; + case TGSI_OPCODE_UP4UB: + *copcode = C_OPCODE_UP4UB; + return 0; + case TGSI_OPCODE_X2D: + *copcode = C_OPCODE_X2D; + return 0; + case TGSI_OPCODE_ARA: + *copcode = C_OPCODE_ARA; + return 0; + case TGSI_OPCODE_ARR: + *copcode = C_OPCODE_ARR; + return 0; + case TGSI_OPCODE_BRA: + *copcode = C_OPCODE_BRA; + return 0; + case TGSI_OPCODE_CAL: + *copcode = C_OPCODE_CAL; + return 0; + case TGSI_OPCODE_RET: + *copcode = C_OPCODE_RET; + return 0; + case TGSI_OPCODE_SSG: + *copcode = C_OPCODE_SSG; + return 0; + case TGSI_OPCODE_CMP: + *copcode = C_OPCODE_CMP; + return 0; + case TGSI_OPCODE_SCS: + *copcode = C_OPCODE_SCS; + return 0; + case TGSI_OPCODE_TXB: + *copcode = C_OPCODE_TXB; + return 0; + case TGSI_OPCODE_NRM: + *copcode = C_OPCODE_NRM; + return 0; + case TGSI_OPCODE_DIV: + *copcode = C_OPCODE_DIV; + return 0; + case TGSI_OPCODE_DP2: + *copcode = C_OPCODE_DP2; + return 0; + case TGSI_OPCODE_TXL: + *copcode = C_OPCODE_TXL; + return 0; + case TGSI_OPCODE_BRK: + *copcode = C_OPCODE_BRK; + return 0; + case TGSI_OPCODE_IF: + *copcode = C_OPCODE_IF; + return 0; + case TGSI_OPCODE_BGNFOR: + *copcode = C_OPCODE_BGNFOR; + return 0; + case TGSI_OPCODE_REP: + *copcode = C_OPCODE_REP; + return 0; + case TGSI_OPCODE_ELSE: + *copcode = C_OPCODE_ELSE; + return 0; + case TGSI_OPCODE_ENDIF: + *copcode = C_OPCODE_ENDIF; + return 0; + case TGSI_OPCODE_ENDFOR: + *copcode = C_OPCODE_ENDFOR; + return 0; + case TGSI_OPCODE_ENDREP: + *copcode = C_OPCODE_ENDREP; + return 0; + case TGSI_OPCODE_PUSHA: + *copcode = C_OPCODE_PUSHA; + return 0; + case TGSI_OPCODE_POPA: + *copcode = C_OPCODE_POPA; + return 0; + case TGSI_OPCODE_CEIL: + *copcode = C_OPCODE_CEIL; + return 0; + case TGSI_OPCODE_I2F: + *copcode = C_OPCODE_I2F; + return 0; + case TGSI_OPCODE_NOT: + *copcode = C_OPCODE_NOT; + return 0; + case TGSI_OPCODE_TRUNC: + *copcode = C_OPCODE_TRUNC; + return 0; + case TGSI_OPCODE_SHL: + *copcode = C_OPCODE_SHL; + return 0; + case TGSI_OPCODE_AND: + *copcode = C_OPCODE_AND; + return 0; + case TGSI_OPCODE_OR: + *copcode = C_OPCODE_OR; + return 0; + case TGSI_OPCODE_MOD: + *copcode = C_OPCODE_MOD; + return 0; + case TGSI_OPCODE_XOR: + *copcode = C_OPCODE_XOR; + return 0; + case TGSI_OPCODE_SAD: + *copcode = C_OPCODE_SAD; + return 0; + case TGSI_OPCODE_TXF: + *copcode = C_OPCODE_TXF; + return 0; + case TGSI_OPCODE_TXQ: + *copcode = C_OPCODE_TXQ; + return 0; + case TGSI_OPCODE_CONT: + *copcode = C_OPCODE_CONT; + return 0; + case TGSI_OPCODE_EMIT: + *copcode = C_OPCODE_EMIT; + return 0; + case TGSI_OPCODE_ENDPRIM: + *copcode = C_OPCODE_ENDPRIM; + return 0; + case TGSI_OPCODE_BGNLOOP: + *copcode = C_OPCODE_BGNLOOP; + return 0; + case TGSI_OPCODE_BGNSUB: + *copcode = C_OPCODE_BGNSUB; + return 0; + case TGSI_OPCODE_ENDLOOP: + *copcode = C_OPCODE_ENDLOOP; + return 0; + case TGSI_OPCODE_ENDSUB: + *copcode = C_OPCODE_ENDSUB; + return 0; + case TGSI_OPCODE_NOP: + *copcode = C_OPCODE_NOP; + return 0; + case TGSI_OPCODE_NRM4: + *copcode = C_OPCODE_NRM4; + return 0; + case TGSI_OPCODE_CALLNZ: + *copcode = C_OPCODE_CALLNZ; + return 0; + case TGSI_OPCODE_IFC: + *copcode = C_OPCODE_IFC; + return 0; + case TGSI_OPCODE_BREAKC: + *copcode = C_OPCODE_BREAKC; + return 0; + case TGSI_OPCODE_KIL: + *copcode = C_OPCODE_KIL; + return 0; + case TGSI_OPCODE_F2I: + *copcode = C_OPCODE_F2I; + return 0; + case TGSI_OPCODE_IDIV: + *copcode = C_OPCODE_IDIV; + return 0; + case TGSI_OPCODE_IMAX: + *copcode = C_OPCODE_IMAX; + return 0; + case TGSI_OPCODE_IMIN: + *copcode = C_OPCODE_IMIN; + return 0; + case TGSI_OPCODE_INEG: + *copcode = C_OPCODE_INEG; + return 0; + case TGSI_OPCODE_ISGE: + *copcode = C_OPCODE_ISGE; + return 0; + case TGSI_OPCODE_ISHR: + *copcode = C_OPCODE_ISHR; + return 0; + case TGSI_OPCODE_ISLT: + *copcode = C_OPCODE_ISLT; + return 0; + case TGSI_OPCODE_F2U: + *copcode = C_OPCODE_F2U; + return 0; + case TGSI_OPCODE_U2F: + *copcode = C_OPCODE_U2F; + return 0; + case TGSI_OPCODE_UADD: + *copcode = C_OPCODE_UADD; + return 0; + case TGSI_OPCODE_UDIV: + *copcode = C_OPCODE_UDIV; + return 0; + case TGSI_OPCODE_UMAD: + *copcode = C_OPCODE_UMAD; + return 0; + case TGSI_OPCODE_UMAX: + *copcode = C_OPCODE_UMAX; + return 0; + case TGSI_OPCODE_UMIN: + *copcode = C_OPCODE_UMIN; + return 0; + case TGSI_OPCODE_UMOD: + *copcode = C_OPCODE_UMOD; + return 0; + case TGSI_OPCODE_UMUL: + *copcode = C_OPCODE_UMUL; + return 0; + case TGSI_OPCODE_USEQ: + *copcode = C_OPCODE_USEQ; + return 0; + case TGSI_OPCODE_USGE: + *copcode = C_OPCODE_USGE; + return 0; + case TGSI_OPCODE_USHR: + *copcode = C_OPCODE_USHR; + return 0; + case TGSI_OPCODE_USLT: + *copcode = C_OPCODE_USLT; + return 0; + case TGSI_OPCODE_USNE: + *copcode = C_OPCODE_USNE; + return 0; + case TGSI_OPCODE_SWITCH: + *copcode = C_OPCODE_SWITCH; + return 0; + case TGSI_OPCODE_CASE: + *copcode = C_OPCODE_CASE; + return 0; + case TGSI_OPCODE_DEFAULT: + *copcode = C_OPCODE_DEFAULT; + return 0; + case TGSI_OPCODE_ENDSWITCH: + *copcode = C_OPCODE_ENDSWITCH; + return 0; + default: + fprintf(stderr, "%s:%d unsupported opcode %d\n", __func__, __LINE__, opcode); + return -EINVAL; + } +} diff --git a/src/gallium/drivers/r600/r600_context.c b/src/gallium/drivers/r600/r600_context.c new file mode 100644 index 00000000000..faefdb4378e --- /dev/null +++ b/src/gallium/drivers/r600/r600_context.c @@ -0,0 +1,167 @@ +/* + * Copyright 2010 Jerome Glisse + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Jerome Glisse + * Corbin Simpson + */ +#include +#include +#include +#include +#include +#include "r600_screen.h" +#include "r600_texture.h" +#include "r600_context.h" + +static void r600_destroy_context(struct pipe_context *context) +{ + struct r600_context *rctx = (struct r600_context*)context; + + FREE(rctx); +} + +static unsigned int r600_is_texture_referenced(struct pipe_context *context, + struct pipe_texture *texture, + unsigned face, unsigned level) +{ + struct pipe_buffer *buffer = NULL; + + r600_get_texture_buffer(context->screen, texture, &buffer, NULL); + return context->is_buffer_referenced(context, buffer); +} + +static unsigned int r600_is_buffer_referenced(struct pipe_context *context, struct pipe_buffer *buffer) +{ + return 0; +} + +static void r600_flush(struct pipe_context *ctx, unsigned flags, + struct pipe_fence_handle **fence) +{ + struct r600_context *rctx = (struct r600_context*)ctx; + struct r600_screen *rscreen = (struct r600_screen*)ctx->screen; +static int dc = 0; + + if (radeon_ctx_pm4(rctx->ctx)) + return; + if (dc) + return; + radeon_ctx_dump_bof(rctx->ctx, "gallium.bof"); + radeon_ctx_submit(rctx->ctx); + rctx->ctx = radeon_ctx_decref(rctx->ctx); + rctx->ctx = radeon_ctx(rscreen->rw); + dc++; +} + +struct pipe_context *r600_create_context(struct pipe_screen *screen, void *priv) +{ + struct r600_context *rctx = CALLOC_STRUCT(r600_context); + struct r600_screen* rscreen = r600_screen(screen); + + if (rctx == NULL) + return NULL; + rctx->context.winsys = rscreen->screen.winsys; + rctx->context.screen = screen; + rctx->context.priv = priv; + rctx->context.destroy = r600_destroy_context; + rctx->context.clear = r600_clear; + rctx->context.surface_copy = r600_surface_copy; + rctx->context.surface_fill = r600_surface_fill; + rctx->context.draw_arrays = r600_draw_arrays; + rctx->context.draw_elements = r600_draw_elements; + rctx->context.draw_range_elements = r600_draw_range_elements; + rctx->context.is_texture_referenced = r600_is_texture_referenced; + rctx->context.is_buffer_referenced = r600_is_buffer_referenced; + rctx->context.flush = r600_flush; + r600_init_query_functions(rctx); + r600_init_state_functions(rctx); +#if 0 + rctx->blitter = util_blitter_create(&rctx->context); + if (rctx->blitter == NULL) { + FREE(rctx); + return NULL; + } +#endif + + rctx->cb_cntl = radeon_state(rscreen->rw, R600_CB_CNTL_TYPE, R600_CB_CNTL); + rctx->cb_cntl->states[R600_CB_CNTL__CB_SHADER_MASK] = 0x0000000F; + rctx->cb_cntl->states[R600_CB_CNTL__CB_TARGET_MASK] = 0x0000000F; + rctx->cb_cntl->states[R600_CB_CNTL__CB_COLOR_CONTROL] = 0x00CC0000; + rctx->cb_cntl->states[R600_CB_CNTL__PA_SC_AA_CONFIG] = 0x00000000; + rctx->cb_cntl->states[R600_CB_CNTL__PA_SC_AA_SAMPLE_LOCS_MCTX] = 0x00000000; + rctx->cb_cntl->states[R600_CB_CNTL__PA_SC_AA_SAMPLE_LOCS_8S_WD1_MCTX] = 0x00000000; + rctx->cb_cntl->states[R600_CB_CNTL__CB_CLRCMP_CONTROL] = 0x01000000; + rctx->cb_cntl->states[R600_CB_CNTL__CB_CLRCMP_SRC] = 0x00000000; + rctx->cb_cntl->states[R600_CB_CNTL__CB_CLRCMP_DST] = 0x000000FF; + rctx->cb_cntl->states[R600_CB_CNTL__CB_CLRCMP_MSK] = 0xFFFFFFFF; + rctx->cb_cntl->states[R600_CB_CNTL__PA_SC_AA_MASK] = 0xFFFFFFFF; + radeon_state_pm4(rctx->cb_cntl); + + rctx->config = radeon_state(rscreen->rw, R600_CONFIG_TYPE, R600_CONFIG); + rctx->config->states[R600_CONFIG__SQ_CONFIG] = 0xE400000C; + rctx->config->states[R600_CONFIG__SQ_GPR_RESOURCE_MGMT_1] = 0x403800C0; + rctx->config->states[R600_CONFIG__SQ_GPR_RESOURCE_MGMT_2] = 0x00000000; + rctx->config->states[R600_CONFIG__SQ_THREAD_RESOURCE_MGMT] = 0x00003090; + rctx->config->states[R600_CONFIG__SQ_STACK_RESOURCE_MGMT_1] = 0x00800080; + rctx->config->states[R600_CONFIG__SQ_STACK_RESOURCE_MGMT_2] = 0x00000000; + rctx->config->states[R600_CONFIG__SQ_DYN_GPR_CNTL_PS_FLUSH_REQ] = 0x00004000; + rctx->config->states[R600_CONFIG__TA_CNTL_AUX] = 0x07000002; + rctx->config->states[R600_CONFIG__VC_ENHANCE] = 0x00000000; + rctx->config->states[R600_CONFIG__DB_DEBUG] = 0x00000000; + rctx->config->states[R600_CONFIG__DB_WATERMARKS] = 0x00420204; + rctx->config->states[R600_CONFIG__SX_MISC] = 0x00000000; + rctx->config->states[R600_CONFIG__SPI_THREAD_GROUPING] = 0x00000001; + rctx->config->states[R600_CONFIG__CB_SHADER_CONTROL] = 0x00000003; + rctx->config->states[R600_CONFIG__SQ_ESGS_RING_ITEMSIZE] = 0x00000000; + rctx->config->states[R600_CONFIG__SQ_GSVS_RING_ITEMSIZE] = 0x00000000; + rctx->config->states[R600_CONFIG__SQ_ESTMP_RING_ITEMSIZE] = 0x00000000; + rctx->config->states[R600_CONFIG__SQ_GSTMP_RING_ITEMSIZE] = 0x00000000; + rctx->config->states[R600_CONFIG__SQ_VSTMP_RING_ITEMSIZE] = 0x00000000; + rctx->config->states[R600_CONFIG__SQ_PSTMP_RING_ITEMSIZE] = 0x00000000; + rctx->config->states[R600_CONFIG__SQ_FBUF_RING_ITEMSIZE] = 0x00000000; + rctx->config->states[R600_CONFIG__SQ_REDUC_RING_ITEMSIZE] = 0x00000000; + rctx->config->states[R600_CONFIG__SQ_GS_VERT_ITEMSIZE] = 0x00000000; + rctx->config->states[R600_CONFIG__VGT_OUTPUT_PATH_CNTL] = 0x00000000; + rctx->config->states[R600_CONFIG__VGT_HOS_CNTL] = 0x00000000; + rctx->config->states[R600_CONFIG__VGT_HOS_MAX_TESS_LEVEL] = 0x00000000; + rctx->config->states[R600_CONFIG__VGT_HOS_MIN_TESS_LEVEL] = 0x00000000; + rctx->config->states[R600_CONFIG__VGT_HOS_REUSE_DEPTH] = 0x00000000; + rctx->config->states[R600_CONFIG__VGT_GROUP_PRIM_TYPE] = 0x00000000; + rctx->config->states[R600_CONFIG__VGT_GROUP_FIRST_DECR] = 0x00000000; + rctx->config->states[R600_CONFIG__VGT_GROUP_DECR] = 0x00000000; + rctx->config->states[R600_CONFIG__VGT_GROUP_VECT_0_CNTL] = 0x00000000; + rctx->config->states[R600_CONFIG__VGT_GROUP_VECT_1_CNTL] = 0x00000000; + rctx->config->states[R600_CONFIG__VGT_GROUP_VECT_0_FMT_CNTL] = 0x00000000; + rctx->config->states[R600_CONFIG__VGT_GROUP_VECT_1_FMT_CNTL] = 0x00000000; + rctx->config->states[R600_CONFIG__VGT_GS_MODE] = 0x00000000; + rctx->config->states[R600_CONFIG__PA_SC_MODE_CNTL] = 0x00514000; + rctx->config->states[R600_CONFIG__VGT_STRMOUT_EN] = 0x00000000; + rctx->config->states[R600_CONFIG__VGT_REUSE_OFF] = 0x00000001; + rctx->config->states[R600_CONFIG__VGT_VTX_CNT_EN] = 0x00000000; + rctx->config->states[R600_CONFIG__VGT_STRMOUT_BUFFER_EN] = 0x00000000; + radeon_state_pm4(rctx->config); + + rctx->ctx = radeon_ctx(rscreen->rw); + rctx->draw = radeon_draw(rscreen->rw); + return &rctx->context; +} diff --git a/src/gallium/drivers/r600/r600_context.h b/src/gallium/drivers/r600/r600_context.h new file mode 100644 index 00000000000..4646df3b56f --- /dev/null +++ b/src/gallium/drivers/r600/r600_context.h @@ -0,0 +1,101 @@ +/* + * Copyright 2010 Jerome Glisse + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + */ +#ifndef R600_CONTEXT_H +#define R600_CONTEXT_H + +#include +#include +#include +#include +#include +#include +#include "radeon.h" +#include "r600_shader.h" + +struct r600_state; +typedef void (*r600_state_destroy_t)(struct r600_state *rstate); + +struct r600_state { + unsigned type; + struct r600_atom *atom; + void *state; + unsigned nbuffers; + struct pipe_buffer *buffer[256]; + unsigned nsurfaces; + struct pipe_surface *surface[256]; + r600_state_destroy_t destroy; +}; + +struct r600_pipe_shader { + unsigned type; + struct r600_shader shader; + struct radeon_bo *bo; + struct radeon_state *state; +}; + +struct r600_context { + struct pipe_context context; + struct radeon_ctx *ctx; + struct radeon_state *cb_cntl; + struct radeon_state *db; + struct radeon_state *config; + struct r600_pipe_shader *ps_shader; + struct r600_pipe_shader *vs_shader; + unsigned flat_shade; + unsigned nvertex_buffer; + unsigned nvertex_element; + struct pipe_vertex_buffer vertex_buffer[PIPE_MAX_ATTRIBS]; + struct pipe_vertex_element vertex_element[PIPE_MAX_ATTRIBS]; + struct blitter_context *blitter; + struct pipe_stencil_ref stencil_ref; + struct pipe_framebuffer_state fb_state; + struct radeon_draw *draw; +}; + +void r600_draw_arrays(struct pipe_context *ctx, unsigned mode, + unsigned start, unsigned count); +void r600_draw_elements(struct pipe_context *ctx, + struct pipe_buffer *index_buffer, + unsigned index_size, unsigned mode, + unsigned start, unsigned count); +void r600_draw_range_elements(struct pipe_context *ctx, + struct pipe_buffer *index_buffer, + unsigned indexSize, unsigned minIndex, + unsigned maxIndex, unsigned mode, + unsigned start, unsigned count); + +void r600_state_destroy_common(struct r600_state *state); +struct r600_state *r600_state_new(r600_state_destroy_t destroy); +struct r600_state *r600_state_destroy(struct r600_state *state); + +void r600_init_state_functions(struct r600_context *rctx); +void r600_init_query_functions(struct r600_context* rctx); +struct pipe_context *r600_create_context(struct pipe_screen *screen, void *priv); + +void r600_pipe_shader_destroy(struct pipe_context *ctx, struct r600_pipe_shader *rpshader); +struct r600_pipe_shader *r600_pipe_shader_create(struct pipe_context *ctx, + unsigned type, + const struct tgsi_token *tokens); +int r600_pipe_shader_update(struct pipe_context *ctx, struct r600_pipe_shader *rpshader); + +#endif diff --git a/src/gallium/drivers/r600/r600_draw.c b/src/gallium/drivers/r600/r600_draw.c new file mode 100644 index 00000000000..b9037963117 --- /dev/null +++ b/src/gallium/drivers/r600/r600_draw.c @@ -0,0 +1,215 @@ +/* + * Copyright 2010 Jerome Glisse + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Jerome Glisse + * Corbin Simpson + */ +#include +#include +#include +#include +#include +#include +#include +#include "r600_screen.h" +#include "r600_context.h" +#include "r600d.h" + +struct r600_draw { + struct pipe_context *ctx; + struct radeon_state *draw; + struct radeon_state *vgt; + unsigned mode; + unsigned start; + unsigned count; + unsigned index_size; + struct pipe_buffer *index_buffer; +}; + +static int r600_draw_common(struct r600_draw *draw) +{ + struct r600_context *rctx = (struct r600_context*)draw->ctx; + struct r600_screen *rscreen = (struct r600_screen*)draw->ctx->screen; + struct radeon_state *vs_resource; + struct r600_pipe_buffer *rbuffer; + unsigned i, j, offset, format, prim; + u32 vgt_dma_index_type, vgt_draw_initiator; + int r; + + switch (draw->index_size) { + case 2: + vgt_draw_initiator = 0; + vgt_dma_index_type = 0; + break; + case 4: + vgt_draw_initiator = 0; + vgt_dma_index_type = 1; + break; + case 0: + vgt_draw_initiator = 2; + vgt_dma_index_type = 0; + break; + default: + fprintf(stderr, "%s %d unsupported index size %d\n", __func__, __LINE__, draw->index_size); + return -EINVAL; + } + r = r600_conv_pipe_prim(draw->mode, &prim); + if (r) + return r; + /* rebuild vertex shader if input format changed */ + r = r600_pipe_shader_update(draw->ctx, rctx->vs_shader); + if (r) + return r; + r = r600_pipe_shader_update(draw->ctx, rctx->ps_shader); + if (r) + return r; + r = radeon_draw_set(rctx->draw, rctx->vs_shader->state); + if (r) + return r; + r = radeon_draw_set(rctx->draw, rctx->ps_shader->state); + if (r) + return r; + r = radeon_draw_set(rctx->draw, rctx->cb_cntl); + if (r) + return r; + r = radeon_draw_set(rctx->draw, rctx->db); + if (r) + return r; + r = radeon_draw_set(rctx->draw, rctx->config); + if (r) + return r; + + for (i = 0 ; i < rctx->nvertex_element; i++) { + j = rctx->vertex_element[i].vertex_buffer_index; + rbuffer = (struct r600_pipe_buffer*)rctx->vertex_buffer[j].buffer; + offset = rctx->vertex_element[i].src_offset + rctx->vertex_buffer[j].buffer_offset; + r = r600_conv_pipe_format(rctx->vertex_element[i].src_format, &format); + if (r) + return r; + vs_resource = radeon_state(rscreen->rw, R600_VS_RESOURCE_TYPE, R600_VS_RESOURCE + i); + if (vs_resource == NULL) + return -ENOMEM; + vs_resource->bo[0] = radeon_bo_incref(rscreen->rw, rbuffer->bo); + vs_resource->nbo = 1; + vs_resource->states[R600_PS_RESOURCE__RESOURCE0_WORD0] = offset; + vs_resource->states[R600_PS_RESOURCE__RESOURCE0_WORD1] = rbuffer->bo->size - offset; + vs_resource->states[R600_PS_RESOURCE__RESOURCE0_WORD2] = S_038008_STRIDE(rctx->vertex_buffer[j].stride) | + S_038008_DATA_FORMAT(format); + vs_resource->states[R600_PS_RESOURCE__RESOURCE0_WORD3] = 0x00000000; + vs_resource->states[R600_PS_RESOURCE__RESOURCE0_WORD4] = 0x00000000; + vs_resource->states[R600_PS_RESOURCE__RESOURCE0_WORD5] = 0x00000000; + vs_resource->states[R600_PS_RESOURCE__RESOURCE0_WORD6] = 0xC0000000; + vs_resource->placement[0] = RADEON_GEM_DOMAIN_GTT; + vs_resource->placement[1] = RADEON_GEM_DOMAIN_GTT; + r = radeon_draw_set_new(rctx->draw, vs_resource); + if (r) + return r; + } + /* FIXME start need to change winsys */ + draw->draw = radeon_state(rscreen->rw, R600_DRAW_TYPE, R600_DRAW); + if (draw->draw == NULL) + return -ENOMEM; + draw->draw->states[R600_DRAW__VGT_NUM_INDICES] = draw->count; + draw->draw->states[R600_DRAW__VGT_DRAW_INITIATOR] = vgt_draw_initiator; + if (draw->index_buffer) { + rbuffer = (struct r600_pipe_buffer*)draw->index_buffer; + draw->draw->bo[0] = radeon_bo_incref(rscreen->rw, rbuffer->bo); + draw->draw->placement[0] = RADEON_GEM_DOMAIN_GTT; + draw->draw->placement[1] = RADEON_GEM_DOMAIN_GTT; + draw->draw->nbo = 1; + } + r = radeon_draw_set_new(rctx->draw, draw->draw); + if (r) + return r; + draw->vgt = radeon_state(rscreen->rw, R600_VGT_TYPE, R600_VGT); + if (draw->vgt == NULL) + return -ENOMEM; + draw->vgt->states[R600_VGT__VGT_PRIMITIVE_TYPE] = prim; + draw->vgt->states[R600_VGT__VGT_MAX_VTX_INDX] = 0x00FFFFFF; + draw->vgt->states[R600_VGT__VGT_MIN_VTX_INDX] = 0x00000000; + draw->vgt->states[R600_VGT__VGT_INDX_OFFSET] = draw->start; + draw->vgt->states[R600_VGT__VGT_MULTI_PRIM_IB_RESET_INDX] = 0x00000000; + draw->vgt->states[R600_VGT__VGT_DMA_INDEX_TYPE] = vgt_dma_index_type; + draw->vgt->states[R600_VGT__VGT_PRIMITIVEID_EN] = 0x00000000; + draw->vgt->states[R600_VGT__VGT_DMA_NUM_INSTANCES] = 0x00000001; + draw->vgt->states[R600_VGT__VGT_MULTI_PRIM_IB_RESET_EN] = 0x00000000; + draw->vgt->states[R600_VGT__VGT_INSTANCE_STEP_RATE_0] = 0x00000000; + draw->vgt->states[R600_VGT__VGT_INSTANCE_STEP_RATE_1] = 0x00000000; + r = radeon_draw_set_new(rctx->draw, draw->vgt); + if (r) + return r; + /* FIXME */ + r = radeon_ctx_set_draw_new(rctx->ctx, rctx->draw); + if (r) + return r; + rctx->draw = radeon_draw_duplicate(rctx->draw); + return 0; +} + +void r600_draw_range_elements(struct pipe_context *ctx, + struct pipe_buffer *index_buffer, + unsigned index_size, unsigned min_index, + unsigned max_index, unsigned mode, + unsigned start, unsigned count) +{ + struct r600_draw draw; + + draw.ctx = ctx; + draw.mode = mode; + draw.start = start; + draw.count = count; + draw.index_size = index_size; + draw.index_buffer = index_buffer; +printf("index_size %d min %d max %d start %d count %d\n", index_size, min_index, max_index, start, count); + r600_draw_common(&draw); +} + +void r600_draw_elements(struct pipe_context *ctx, + struct pipe_buffer *index_buffer, + unsigned index_size, unsigned mode, + unsigned start, unsigned count) +{ + struct r600_draw draw; + + draw.ctx = ctx; + draw.mode = mode; + draw.start = start; + draw.count = count; + draw.index_size = index_size; + draw.index_buffer = index_buffer; + r600_draw_common(&draw); +} + +void r600_draw_arrays(struct pipe_context *ctx, unsigned mode, + unsigned start, unsigned count) +{ + struct r600_draw draw; + + draw.ctx = ctx; + draw.mode = mode; + draw.start = start; + draw.count = count; + draw.index_size = 0; + draw.index_buffer = NULL; + r600_draw_common(&draw); +} diff --git a/src/gallium/drivers/r600/r600_helper.c b/src/gallium/drivers/r600/r600_helper.c new file mode 100644 index 00000000000..7757452104e --- /dev/null +++ b/src/gallium/drivers/r600/r600_helper.c @@ -0,0 +1,176 @@ +/* + * Copyright 2010 Jerome Glisse + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Jerome Glisse + */ +#include +#include +#include +#include +#include +#include "r600_screen.h" +#include "r600d.h" + +int r600_conv_pipe_format(unsigned pformat, unsigned *format) +{ + switch (pformat) { + case PIPE_FORMAT_R32G32B32_FLOAT: + *format = 0x30; + return 0; + case PIPE_FORMAT_R32G32B32A32_FLOAT: + *format = V_0280A0_COLOR_32_32_32_32_FLOAT; + return 0; + case PIPE_FORMAT_A8R8G8B8_UNORM: + case PIPE_FORMAT_X8R8G8B8_UNORM: + case PIPE_FORMAT_B8G8R8A8_UNORM: + case PIPE_FORMAT_B8G8R8X8_UNORM: + case PIPE_FORMAT_R8G8B8A8_UNORM: + case PIPE_FORMAT_R8G8B8X8_UNORM: + case PIPE_FORMAT_R8G8B8A8_USCALED: + case PIPE_FORMAT_R8G8B8X8_USCALED: + case PIPE_FORMAT_R8G8B8A8_SNORM: + case PIPE_FORMAT_R8G8B8X8_SNORM: + case PIPE_FORMAT_A8B8G8R8_SNORM: + case PIPE_FORMAT_X8B8G8R8_SNORM: + case PIPE_FORMAT_R8G8B8A8_SSCALED: + case PIPE_FORMAT_R8G8B8X8_SSCALED: + *format = V_0280A0_COLOR_8_8_8_8; + return 0; + case PIPE_FORMAT_A1R5G5B5_UNORM: + case PIPE_FORMAT_A4R4G4B4_UNORM: + case PIPE_FORMAT_R5G6B5_UNORM: + case PIPE_FORMAT_A2B10G10R10_UNORM: + case PIPE_FORMAT_L8_UNORM: + case PIPE_FORMAT_A8_UNORM: + case PIPE_FORMAT_I8_UNORM: + case PIPE_FORMAT_A8L8_UNORM: + case PIPE_FORMAT_L16_UNORM: + case PIPE_FORMAT_YCBCR: + case PIPE_FORMAT_YCBCR_REV: + case PIPE_FORMAT_Z16_UNORM: + case PIPE_FORMAT_Z32_UNORM: + case PIPE_FORMAT_Z32_FLOAT: + case PIPE_FORMAT_S8Z24_UNORM: + case PIPE_FORMAT_Z24S8_UNORM: + case PIPE_FORMAT_X8Z24_UNORM: + case PIPE_FORMAT_Z24X8_UNORM: + case PIPE_FORMAT_S8_UNORM: + case PIPE_FORMAT_R64_FLOAT: + case PIPE_FORMAT_R64G64_FLOAT: + case PIPE_FORMAT_R64G64B64_FLOAT: + case PIPE_FORMAT_R64G64B64A64_FLOAT: + case PIPE_FORMAT_R32_FLOAT: + case PIPE_FORMAT_R32G32_FLOAT: + case PIPE_FORMAT_R32_UNORM: + case PIPE_FORMAT_R32G32_UNORM: + case PIPE_FORMAT_R32G32B32_UNORM: + case PIPE_FORMAT_R32G32B32A32_UNORM: + case PIPE_FORMAT_R32_USCALED: + case PIPE_FORMAT_R32G32_USCALED: + case PIPE_FORMAT_R32G32B32_USCALED: + case PIPE_FORMAT_R32G32B32A32_USCALED: + case PIPE_FORMAT_R32_SNORM: + case PIPE_FORMAT_R32G32_SNORM: + case PIPE_FORMAT_R32G32B32_SNORM: + case PIPE_FORMAT_R32G32B32A32_SNORM: + case PIPE_FORMAT_R32_SSCALED: + case PIPE_FORMAT_R32G32_SSCALED: + case PIPE_FORMAT_R32G32B32_SSCALED: + case PIPE_FORMAT_R32G32B32A32_SSCALED: + case PIPE_FORMAT_R16_UNORM: + case PIPE_FORMAT_R16G16_UNORM: + case PIPE_FORMAT_R16G16B16_UNORM: + case PIPE_FORMAT_R16G16B16A16_UNORM: + case PIPE_FORMAT_R16_USCALED: + case PIPE_FORMAT_R16G16_USCALED: + case PIPE_FORMAT_R16G16B16_USCALED: + case PIPE_FORMAT_R16G16B16A16_USCALED: + case PIPE_FORMAT_R16_SNORM: + case PIPE_FORMAT_R16G16_SNORM: + case PIPE_FORMAT_R16G16B16_SNORM: + case PIPE_FORMAT_R16G16B16A16_SNORM: + case PIPE_FORMAT_R16_SSCALED: + case PIPE_FORMAT_R16G16_SSCALED: + case PIPE_FORMAT_R16G16B16_SSCALED: + case PIPE_FORMAT_R16G16B16A16_SSCALED: + case PIPE_FORMAT_R8_UNORM: + case PIPE_FORMAT_R8G8_UNORM: + case PIPE_FORMAT_R8G8B8_UNORM: + case PIPE_FORMAT_R8_USCALED: + case PIPE_FORMAT_R8G8_USCALED: + case PIPE_FORMAT_R8G8B8_USCALED: + case PIPE_FORMAT_R8_SNORM: + case PIPE_FORMAT_R8G8_SNORM: + case PIPE_FORMAT_R8G8B8_SNORM: + case PIPE_FORMAT_B6G5R5_SNORM: + case PIPE_FORMAT_R8_SSCALED: + case PIPE_FORMAT_R8G8_SSCALED: + case PIPE_FORMAT_R8G8B8_SSCALED: + case PIPE_FORMAT_R32_FIXED: + case PIPE_FORMAT_R32G32_FIXED: + case PIPE_FORMAT_R32G32B32_FIXED: + case PIPE_FORMAT_R32G32B32A32_FIXED: + default: + fprintf(stderr, "%s:%d unsupported %d\n", __func__, __LINE__, pformat); + return -EINVAL; + } +} + +int r600_conv_pipe_prim(unsigned pprim, unsigned *prim) +{ + switch (pprim) { + case PIPE_PRIM_POINTS: + *prim = V_008958_DI_PT_POINTLIST; + return 0; + case PIPE_PRIM_LINES: + *prim = V_008958_DI_PT_LINELIST; + return 0; + case PIPE_PRIM_LINE_STRIP: + *prim = V_008958_DI_PT_LINESTRIP; + return 0; + case PIPE_PRIM_LINE_LOOP: + *prim = V_008958_DI_PT_LINELOOP; + return 0; + case PIPE_PRIM_TRIANGLES: + *prim = V_008958_DI_PT_TRILIST; + return 0; + case PIPE_PRIM_TRIANGLE_STRIP: + *prim = V_008958_DI_PT_TRISTRIP; + return 0; + case PIPE_PRIM_TRIANGLE_FAN: + *prim = V_008958_DI_PT_TRIFAN; + return 0; + case PIPE_PRIM_POLYGON: + *prim = V_008958_DI_PT_POLYGON; + return 0; + case PIPE_PRIM_QUADS: + *prim = V_008958_DI_PT_QUADLIST; + return 0; + case PIPE_PRIM_QUAD_STRIP: + *prim = V_008958_DI_PT_QUADSTRIP; + return 0; + default: + fprintf(stderr, "%s:%d unsupported %d\n", __func__, __LINE__, pprim); + return -EINVAL; + } +} diff --git a/src/gallium/drivers/r600/r600_query.c b/src/gallium/drivers/r600/r600_query.c new file mode 100644 index 00000000000..3101141278d --- /dev/null +++ b/src/gallium/drivers/r600/r600_query.c @@ -0,0 +1,66 @@ +/* + * Copyright 2010 Jerome Glisse + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Jerome Glisse + * Corbin Simpson + */ +#include +#include +#include +#include "r600_screen.h" +#include "r600_texture.h" +#include "r600_context.h" + +static struct pipe_query *r600_create_query(struct pipe_context *pipe, unsigned query_type) +{ + return NULL; +} + +static void r600_destroy_query(struct pipe_context *pipe, struct pipe_query *query) +{ + FREE(query); +} + +static void r600_begin_query(struct pipe_context *pipe, struct pipe_query *query) +{ +} + +static void r600_end_query(struct pipe_context *pipe, struct pipe_query *query) +{ +} + +static boolean r600_get_query_result(struct pipe_context *pipe, + struct pipe_query *query, + boolean wait, uint64_t *result) +{ + return TRUE; +} + +void r600_init_query_functions(struct r600_context* rctx) +{ + rctx->context.create_query = r600_create_query; + rctx->context.destroy_query = r600_destroy_query; + rctx->context.begin_query = r600_begin_query; + rctx->context.end_query = r600_end_query; + rctx->context.get_query_result = r600_get_query_result; +} diff --git a/src/gallium/drivers/r600/r600_screen.c b/src/gallium/drivers/r600/r600_screen.c new file mode 100644 index 00000000000..db17b88e9ac --- /dev/null +++ b/src/gallium/drivers/r600/r600_screen.c @@ -0,0 +1,241 @@ +/* + * Copyright 2010 Jerome Glisse + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Jerome Glisse + * Corbin Simpson + */ +#include +#include +#include +#include "r600_screen.h" +#include "r600_texture.h" +#include "r600_context.h" + +static const char* r600_get_vendor(struct pipe_screen* pscreen) +{ + return "X.Org"; +} + +static const char* r600_get_name(struct pipe_screen* pscreen) +{ + return "R600"; +} + +static int r600_get_param(struct pipe_screen* pscreen, int param) +{ + switch (param) { + case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS: + case PIPE_CAP_MAX_COMBINED_SAMPLERS: + return 16; + case PIPE_CAP_NPOT_TEXTURES: + return 1; + case PIPE_CAP_TWO_SIDED_STENCIL: + return 1; + case PIPE_CAP_GLSL: + return 1; + case PIPE_CAP_DUAL_SOURCE_BLEND: + return 1; + case PIPE_CAP_ANISOTROPIC_FILTER: + return 1; + case PIPE_CAP_POINT_SPRITE: + return 1; + case PIPE_CAP_MAX_RENDER_TARGETS: + /* FIXME some r6xx are buggy and can only do 4 */ + return 8; + case PIPE_CAP_OCCLUSION_QUERY: + return 1; + case PIPE_CAP_TEXTURE_SHADOW_MAP: + return 1; + case PIPE_CAP_MAX_TEXTURE_2D_LEVELS: + case PIPE_CAP_MAX_TEXTURE_3D_LEVELS: + case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS: + /* FIXME not sure here */ + return 13; + case PIPE_CAP_TEXTURE_MIRROR_CLAMP: + return 1; + case PIPE_CAP_TEXTURE_MIRROR_REPEAT: + return 1; + case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS: + /* FIXME allow this once infrastructure is there */ + return 0; + case PIPE_CAP_TGSI_CONT_SUPPORTED: + return 0; + case PIPE_CAP_BLEND_EQUATION_SEPARATE: + return 1; + case PIPE_CAP_SM3: + return 1; + case PIPE_CAP_INDEP_BLEND_ENABLE: + return 1; + case PIPE_CAP_INDEP_BLEND_FUNC: + /* FIXME allow this */ + return 0; + case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT: + case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER: + return 1; + case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT: + case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER: + return 0; + default: + debug_printf("r600: unknown param %d\n", param); + return 0; + } +} + +static float r600_get_paramf(struct pipe_screen* pscreen, int param) +{ + switch (param) { + case PIPE_CAP_MAX_LINE_WIDTH: + case PIPE_CAP_MAX_LINE_WIDTH_AA: + case PIPE_CAP_MAX_POINT_WIDTH: + case PIPE_CAP_MAX_POINT_WIDTH_AA: + return 8192.0f; + case PIPE_CAP_MAX_TEXTURE_ANISOTROPY: + return 16.0f; + case PIPE_CAP_MAX_TEXTURE_LOD_BIAS: + return 16.0f; + default: + debug_printf("r600: unsupported paramf %d\n", param); + return 0.0f; + } +} + +static boolean r600_is_format_supported(struct pipe_screen* screen, + enum pipe_format format, + enum pipe_texture_target target, + unsigned usage, + unsigned geom_flags) +{ + if (target >= PIPE_MAX_TEXTURE_TYPES) { + debug_printf("r600: unsupported texture type %d\n", target); + return FALSE; + } + switch (format) { + case PIPE_FORMAT_A4R4G4B4_UNORM: + case PIPE_FORMAT_R5G6B5_UNORM: + case PIPE_FORMAT_A1R5G5B5_UNORM: + case PIPE_FORMAT_A8_UNORM: + case PIPE_FORMAT_L8_UNORM: + case PIPE_FORMAT_A8R8G8B8_SRGB: + case PIPE_FORMAT_R8G8B8A8_SRGB: + case PIPE_FORMAT_DXT1_RGB: + case PIPE_FORMAT_DXT1_RGBA: + case PIPE_FORMAT_DXT3_RGBA: + case PIPE_FORMAT_DXT5_RGBA: + case PIPE_FORMAT_YCBCR: + case PIPE_FORMAT_L8_SRGB: + case PIPE_FORMAT_A8L8_SRGB: + case PIPE_FORMAT_A8L8_UNORM: + case PIPE_FORMAT_A8R8G8B8_UNORM: + case PIPE_FORMAT_X8R8G8B8_UNORM: + case PIPE_FORMAT_R8G8B8A8_UNORM: + case PIPE_FORMAT_R8G8B8X8_UNORM: + case PIPE_FORMAT_I8_UNORM: + case PIPE_FORMAT_Z16_UNORM: + case PIPE_FORMAT_Z24X8_UNORM: + case PIPE_FORMAT_Z24S8_UNORM: + case PIPE_FORMAT_Z32_UNORM: + case PIPE_FORMAT_S8Z24_UNORM: + case PIPE_FORMAT_X8Z24_UNORM: + return TRUE; + default: + /* Unknown format... */ + break; + } + return FALSE; +} + +static struct pipe_transfer* r600_get_tex_transfer(struct pipe_screen *screen, + struct pipe_texture *texture, + unsigned face, unsigned level, + unsigned zslice, + enum pipe_transfer_usage usage, + unsigned x, unsigned y, + unsigned w, unsigned h) +{ + struct r600_texture *rtex = (struct r600_texture*)texture; + struct r600_transfer *trans; + + trans = CALLOC_STRUCT(r600_transfer); + if (trans == NULL) + return NULL; + pipe_texture_reference(&trans->transfer.texture, texture); + trans->transfer.x = x; + trans->transfer.y = y; + trans->transfer.width = w; + trans->transfer.height = h; + trans->transfer.stride = rtex->stride[level]; + trans->transfer.usage = usage; + trans->transfer.zslice = zslice; + trans->transfer.face = face; + trans->offset = r600_texture_get_offset(rtex, level, zslice, face); + return &trans->transfer; +} + +static void r600_tex_transfer_destroy(struct pipe_transfer *trans) +{ +} + +static void* r600_transfer_map(struct pipe_screen* screen, struct pipe_transfer* transfer) +{ + /* FIXME implement */ + return NULL; +} + +static void r600_transfer_unmap(struct pipe_screen* screen, struct pipe_transfer* transfer) +{ +} + +static void r600_destroy_screen(struct pipe_screen* pscreen) +{ + struct r600_screen* rscreen = r600_screen(pscreen); + + if (rscreen == NULL) + return; + FREE(rscreen); +} + +struct pipe_screen *radeon_create_screen(struct radeon *rw) +{ + struct r600_screen* rscreen; + + rscreen = CALLOC_STRUCT(r600_screen); + if (rscreen == NULL) { + return NULL; + } + rscreen->rw = rw; + rscreen->screen.winsys = (struct pipe_winsys*)rw; + rscreen->screen.destroy = r600_destroy_screen; + rscreen->screen.get_name = r600_get_name; + rscreen->screen.get_vendor = r600_get_vendor; + rscreen->screen.get_param = r600_get_param; + rscreen->screen.get_paramf = r600_get_paramf; + rscreen->screen.is_format_supported = r600_is_format_supported; + rscreen->screen.context_create = r600_create_context; + rscreen->screen.get_tex_transfer = r600_get_tex_transfer; + rscreen->screen.tex_transfer_destroy = r600_tex_transfer_destroy; + rscreen->screen.transfer_map = r600_transfer_map; + rscreen->screen.transfer_unmap = r600_transfer_unmap; + r600_screen_init_buffer_functions(&rscreen->screen); + r600_init_screen_texture_functions(&rscreen->screen); + return &rscreen->screen; +} diff --git a/src/gallium/drivers/r600/r600_screen.h b/src/gallium/drivers/r600/r600_screen.h new file mode 100644 index 00000000000..97d57c027ed --- /dev/null +++ b/src/gallium/drivers/r600/r600_screen.h @@ -0,0 +1,88 @@ +/* + * Copyright 2010 Jerome Glisse + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + */ +#ifndef R600_SCREEN_H +#define R600_SCREEN_H + +#include +#include +#include +#include +#include +#include "radeon.h" + +#define r600_screen(s) ((struct r600_screen*)s) + +struct r600_transfer { + struct pipe_transfer transfer; + unsigned offset; +}; + +struct r600_pipe_buffer { + struct pipe_buffer base; + struct radeon_bo *bo; + u32 domain; + u32 flink; + struct pb_buffer *pb; +}; + +struct r600_screen { + struct pipe_screen screen; + struct radeon *rw; +}; + +void r600_screen_init_buffer_functions(struct pipe_screen *screen); +void r600_clear(struct pipe_context *ctx, + unsigned buffers, + const float *rgba, + double depth, + unsigned stencil); +void r600_surface_copy(struct pipe_context *ctx, + struct pipe_surface *dst, + unsigned dstx, unsigned dsty, + struct pipe_surface *src, + unsigned srcx, unsigned srcy, + unsigned width, unsigned height); +void r600_surface_fill(struct pipe_context *ctx, + struct pipe_surface *dst, + unsigned dstx, unsigned dsty, + unsigned width, unsigned height, + unsigned value); + +/* helpers */ +int r600_conv_pipe_format(unsigned pformat, unsigned *format); +int r600_conv_pipe_prim(unsigned pprim, unsigned *prim); + +union r600_float_to_u32_u { + u32 u; + float f; +}; + +static inline u32 r600_float_to_u32(float f) +{ + union r600_float_to_u32_u c; + + c.f = f; + return c.u; +} + +#endif diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c new file mode 100644 index 00000000000..f8a18658a98 --- /dev/null +++ b/src/gallium/drivers/r600/r600_shader.c @@ -0,0 +1,218 @@ +/* + * Copyright 2010 Jerome Glisse + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Jerome Glisse + */ +#include +#include +#include +#include +#include +#include +#include "r600_screen.h" +#include "r600_texture.h" +#include "r600_context.h" +#include "r600d.h" + +static int r600_pipe_shader_vs(struct pipe_context *ctx, struct r600_pipe_shader *rpshader) +{ + struct r600_screen *rscreen = (struct r600_screen*)ctx->screen; + struct r600_shader *rshader = &rpshader->shader; + struct radeon_state *state; + unsigned i, tmp; + + rpshader->state = radeon_state_decref(rpshader->state); + state = radeon_state(rscreen->rw, R600_VS_SHADER_TYPE, R600_VS_SHADER); + if (state == NULL) + return -ENOMEM; + for (i = 0; i < rshader->noutput; i += 4) { + tmp = rshader->output[i].sid; + tmp |= rshader->output[i + 1].sid << 8; + tmp |= rshader->output[i + 2].sid << 16; + tmp |= rshader->output[i + 3].sid << 24; + state->states[R600_VS_SHADER__SPI_VS_OUT_ID_0 + i / 4] = tmp; + } + state->states[R600_VS_SHADER__SPI_VS_OUT_CONFIG] = S_0286C4_VS_EXPORT_COUNT(rshader->noutput - 1); + state->states[R600_VS_SHADER__SQ_PGM_RESOURCES_VS] = S_028868_NUM_GPRS(rshader->ngpr); + rpshader->state = state; + rpshader->state->bo[0] = radeon_bo_incref(rscreen->rw, rpshader->bo); + rpshader->state->bo[1] = radeon_bo_incref(rscreen->rw, rpshader->bo); + rpshader->state->nbo = 2; + rpshader->state->placement[0] = RADEON_GEM_DOMAIN_GTT; + return radeon_state_pm4(state); +} + +static int r600_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader *rpshader) +{ + struct r600_screen *rscreen = (struct r600_screen*)ctx->screen; + struct r600_shader *rshader = &rpshader->shader; + struct radeon_state *state; + unsigned i, tmp; + + rpshader->state = radeon_state_decref(rpshader->state); + state = radeon_state(rscreen->rw, R600_PS_SHADER_TYPE, R600_PS_SHADER); + if (state == NULL) + return -ENOMEM; + for (i = 0; i < rshader->ninput; i++) { + tmp = S_028644_SEMANTIC(rshader->input[i].sid); + tmp |= S_028644_SEL_CENTROID(1); + tmp |= S_028644_FLAT_SHADE(rshader->flat_shade); + state->states[R600_PS_SHADER__SPI_PS_INPUT_CNTL_0 + i] = tmp; + } + state->states[R600_PS_SHADER__SPI_PS_IN_CONTROL_0] = S_0286CC_NUM_INTERP(rshader->ninput) | + S_0286CC_PERSP_GRADIENT_ENA(1); + state->states[R600_PS_SHADER__SPI_PS_IN_CONTROL_1] = 0x00000000; + state->states[R600_PS_SHADER__SQ_PGM_RESOURCES_PS] = S_028868_NUM_GPRS(rshader->ngpr); + state->states[R600_PS_SHADER__SQ_PGM_EXPORTS_PS] = 0x00000002; + rpshader->state = state; + rpshader->state->bo[0] = radeon_bo_incref(rscreen->rw, rpshader->bo); + rpshader->state->nbo = 1; + rpshader->state->placement[0] = RADEON_GEM_DOMAIN_GTT; + return radeon_state_pm4(state); +} + +static int r600_pipe_shader(struct pipe_context *ctx, struct r600_pipe_shader *rpshader) +{ + struct r600_screen *rscreen = (struct r600_screen*)ctx->screen; + struct r600_context *rctx = (struct r600_context*)ctx; + struct r600_shader *rshader = &rpshader->shader; + int r; + + /* copy new shader */ + radeon_bo_decref(rscreen->rw, rpshader->bo); + rpshader->bo = NULL; + rpshader->bo = radeon_bo(rscreen->rw, 0, rshader->ndw * 4, + 4096, NULL); + if (rpshader->bo == NULL) { + return -ENOMEM; + } + radeon_bo_map(rscreen->rw, rpshader->bo); + memcpy(rpshader->bo->data, rshader->bcode, rshader->ndw * 4); + radeon_bo_unmap(rscreen->rw, rpshader->bo); + /* build state */ + rshader->flat_shade = rctx->flat_shade; + switch (rpshader->type) { + case C_PROGRAM_TYPE_VS: + r = r600_pipe_shader_vs(ctx, rpshader); + break; + case C_PROGRAM_TYPE_FS: + r = r600_pipe_shader_ps(ctx, rpshader); + break; + default: + r = -EINVAL; + break; + } + return r; +} + +struct r600_pipe_shader *r600_pipe_shader_create(struct pipe_context *ctx, unsigned type, const struct tgsi_token *tokens) +{ + struct r600_pipe_shader *rpshader = CALLOC_STRUCT(r600_pipe_shader); + struct r600_shader *rshader = &rpshader->shader; + int r; + + if (rpshader == NULL) + return NULL; + rpshader->type = type; + c_list_init(&rshader->nodes); + fprintf(stderr, "<<\n"); + tgsi_dump(tokens, 0); + fprintf(stderr, "--------------------------------------------------------------\n"); + r = c_shader_from_tgsi(&rshader->cshader, type, tokens); + if (r) { + r600_pipe_shader_destroy(ctx, rpshader); + fprintf(stderr, "ERROR(%s %d)>>\n\n", __func__, __LINE__); + return NULL; + } + r = r600_shader_insert_fetch(&rshader->cshader); + if (r) { + r600_pipe_shader_destroy(ctx, rpshader); + fprintf(stderr, "ERROR(%s %d)>>\n\n", __func__, __LINE__); + return NULL; + } + r = c_shader_build_dominator_tree(&rshader->cshader); + if (r) { + r600_pipe_shader_destroy(ctx, rpshader); + fprintf(stderr, "ERROR(%s %d)>>\n\n", __func__, __LINE__); + return NULL; + } + c_shader_dump(&rshader->cshader); + r = r700_shader_translate(rshader); + if (r) { + r600_pipe_shader_destroy(ctx, rpshader); + fprintf(stderr, "ERROR(%s %d)>>\n\n", __func__, __LINE__); + return NULL; + } +#if 1 +#if 0 + fprintf(stderr, "--------------------------------------------------------------\n"); + for (int i = 0; i < rshader->ndw; i++) { + fprintf(stderr, "0x%08X\n", rshader->bcode[i]); + } +#endif + fprintf(stderr, ">>\n\n"); +#endif + return rpshader; +} + +void r600_pipe_shader_destroy(struct pipe_context *ctx, struct r600_pipe_shader *rpshader) +{ + struct r600_screen *rscreen = (struct r600_screen*)ctx->screen; + + if (rpshader == NULL) + return; + radeon_bo_decref(rscreen->rw, rpshader->bo); + rpshader->bo = NULL; + r600_shader_cleanup(&rpshader->shader); + FREE(rpshader); +} + +int r600_pipe_shader_update(struct pipe_context *ctx, struct r600_pipe_shader *rpshader) +{ + struct r600_context *rctx = (struct r600_context*)ctx; + struct r600_shader *rshader; + enum pipe_format resource_format[160]; + unsigned i, nresources = 0; + int r; + + if (rpshader == NULL) + return -EINVAL; + rshader = &rpshader->shader; + switch (rpshader->type) { + case C_PROGRAM_TYPE_VS: + for (i = 0; i < rctx->nvertex_element; i++) { + resource_format[nresources++] = rctx->vertex_element[i].src_format; + } + break; + default: + break; + } + /* there should be enough input */ + if (nresources < rshader->nresource) + return -EINVAL; + /* FIXME compare resources */ + r = r600_shader_update(rshader, resource_format); + if (r) + return r; + return r600_pipe_shader(ctx, rpshader); +} diff --git a/src/gallium/drivers/r600/r600_shader.h b/src/gallium/drivers/r600/r600_shader.h new file mode 100644 index 00000000000..45ab88b58f5 --- /dev/null +++ b/src/gallium/drivers/r600/r600_shader.h @@ -0,0 +1,130 @@ +/* + * Copyright 2010 Jerome Glisse + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + */ +#ifndef R600_SHADER_H +#define R600_SHADER_H + +#include "r600_compiler.h" +#include "radeon.h" + +struct r600_state; + +struct r600_shader_vfetch { + struct r600_shader_vfetch *next; + struct r600_shader_vfetch *prev; + unsigned cf_addr; + unsigned sel[4]; + unsigned chan[4]; + unsigned dsel[4]; +}; + +struct r600_shader_operand { + struct c_vector *vector; + unsigned sel; + unsigned chan; + unsigned neg; + unsigned abs; +}; + +struct r600_shader_inst { + unsigned is_op3; + unsigned opcode; + unsigned inst; + struct r600_shader_operand src[3]; + struct r600_shader_operand dst; + unsigned last; +}; + +struct r600_shader_alu { + struct r600_shader_alu *next; + struct r600_shader_alu *prev; + unsigned nalu; + unsigned nliteral; + struct r600_shader_inst alu[5]; + u32 literal[4]; +}; + +struct r600_shader_node { + struct r600_shader_node *next; + struct r600_shader_node *prev; + unsigned cf_id; /**< cf index (in dw) in byte code */ + unsigned cf_addr; /**< instructions index (in dw) in byte code */ + unsigned nslot; /**< number of slot (2 dw) needed by this node */ + unsigned nfetch; + struct c_node *node; /**< compiler node from which this node originate */ + struct r600_shader_vfetch vfetch; /**< list of vfetch instructions */ + struct r600_shader_alu alu; /**< list of alu instructions */ +}; + +struct r600_shader_io { + unsigned name; + unsigned gpr; + int sid; +}; + +struct r600_shader { + unsigned stack_size; /**< stack size needed by this shader */ + unsigned ngpr; /**< number of GPR needed by this shader */ + unsigned nconstant; /**< number of constants used by this shader */ + unsigned nresource; /**< number of resources used by this shader */ + unsigned noutput; + unsigned ninput; + unsigned nvector; + unsigned ncf; /**< total number of cf clauses */ + unsigned nslot; /**< total number of slots (2 dw) */ + unsigned flat_shade; /**< are we flat shading */ + struct r600_shader_node nodes; /**< list of node */ + struct r600_shader_node *cur_node; /**< current node (used during nodes list creation) */ + struct r600_shader_io input[32]; + struct r600_shader_io output[32]; + /* TODO replace GPR by some better register allocator */ + struct c_vector **gpr; + unsigned ndw; /**< bytes code size in dw */ + u32 *bcode; /**< bytes code */ + enum pipe_format resource_format[160]; /**< format of resource */ + struct c_shader cshader; +}; + +void r600_shader_cleanup(struct r600_shader *rshader); +int r600_shader_register(struct r600_shader *rshader); +int r600_shader_node(struct r600_shader *shader); +void r600_shader_node_place(struct r600_shader *rshader); +int r600_shader_find_gpr(struct r600_shader *rshader, struct c_vector *v, + unsigned swizzle, unsigned *sel, unsigned *chan); +int r600_shader_vfetch_bytecode(struct r600_shader *rshader, + struct r600_shader_node *rnode, + struct r600_shader_vfetch *vfetch, + unsigned *cid); +int r600_shader_update(struct r600_shader *rshader, + enum pipe_format *resource_format); +int r600_shader_legalize(struct r600_shader *rshader); + +int r700_shader_translate(struct r600_shader *rshader); + +int c_shader_from_tgsi(struct c_shader *shader, unsigned type, + const struct tgsi_token *tokens); +int r600_shader_register(struct r600_shader *rshader); +int r600_shader_translate_rec(struct r600_shader *rshader, struct c_node *node); +int r700_shader_translate(struct r600_shader *rshader); +int r600_shader_insert_fetch(struct c_shader *shader); + +#endif diff --git a/src/gallium/drivers/r600/r600_sq.h b/src/gallium/drivers/r600/r600_sq.h new file mode 100644 index 00000000000..71aa09719e0 --- /dev/null +++ b/src/gallium/drivers/r600/r600_sq.h @@ -0,0 +1,606 @@ +/* + * Copyright 2010 Jerome Glisse + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Jerome Glisse + */ +#ifndef R600_SQ_H +#define R600_SQ_H + +#define P_SQ_CF_WORD0 +#define S_SQ_CF_WORD0_ADDR(x) (((x) & 0xFFFFFFFF) << 0) +#define G_SQ_CF_WORD0_ADDR(x) (((x) >> 0) & 0xFFFFFFFF) +#define C_SQ_CF_WORD0_ADDR 0x00000000 +#define P_SQ_CF_WORD1 +#define S_SQ_CF_WORD1_POP_COUNT(x) (((x) & 0x7) << 0) +#define G_SQ_CF_WORD1_POP_COUNT(x) (((x) >> 0) & 0x7) +#define C_SQ_CF_WORD1_POP_COUNT 0xFFFFFFF8 +#define S_SQ_CF_WORD1_CF_CONST(x) (((x) & 0x1F) << 3) +#define G_SQ_CF_WORD1_CF_CONST(x) (((x) >> 3) & 0x1F) +#define C_SQ_CF_WORD1_CF_CONST 0xFFFFFF07 +#define S_SQ_CF_WORD1_COND(x) (((x) & 0x3) << 8) +#define G_SQ_CF_WORD1_COND(x) (((x) >> 8) & 0x3) +#define C_SQ_CF_WORD1_COND 0xFFFFFCFF +#define S_SQ_CF_WORD1_COUNT(x) (((x) & 0x7) << 10) +#define G_SQ_CF_WORD1_COUNT(x) (((x) >> 10) & 0x7) +#define C_SQ_CF_WORD1_COUNT 0xFFFFE3FF +#define S_SQ_CF_WORD1_CALL_COUNT(x) (((x) & 0x3F) << 13) +#define G_SQ_CF_WORD1_CALL_COUNT(x) (((x) >> 13) & 0x3F) +#define C_SQ_CF_WORD1_CALL_COUNT 0xFFF81FFF +#define S_SQ_CF_WORD1_END_OF_PROGRAM(x) (((x) & 0x1) << 21) +#define G_SQ_CF_WORD1_END_OF_PROGRAM(x) (((x) >> 21) & 0x1) +#define C_SQ_CF_WORD1_END_OF_PROGRAM 0xFFDFFFFF +#define S_SQ_CF_WORD1_VALID_PIXEL_MODE(x) (((x) & 0x1) << 22) +#define G_SQ_CF_WORD1_VALID_PIXEL_MODE(x) (((x) >> 22) & 0x1) +#define C_SQ_CF_WORD1_VALID_PIXEL_MODE 0xFFBFFFFF +#define S_SQ_CF_WORD1_CF_INST(x) (((x) & 0x7F) << 23) +#define G_SQ_CF_WORD1_CF_INST(x) (((x) >> 23) & 0x7F) +#define C_SQ_CF_WORD1_CF_INST 0xC07FFFFF +#define V_SQ_CF_WORD1_SQ_CF_INST_NOP 0x00000000 +#define V_SQ_CF_WORD1_SQ_CF_INST_TEX 0x00000001 +#define V_SQ_CF_WORD1_SQ_CF_INST_VTX 0x00000002 +#define V_SQ_CF_WORD1_SQ_CF_INST_VTX_TC 0x00000003 +#define V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START 0x00000004 +#define V_SQ_CF_WORD1_SQ_CF_INST_LOOP_END 0x00000005 +#define V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_DX10 0x00000006 +#define V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_NO_AL 0x00000007 +#define V_SQ_CF_WORD1_SQ_CF_INST_LOOP_CONTINUE 0x00000008 +#define V_SQ_CF_WORD1_SQ_CF_INST_LOOP_BREAK 0x00000009 +#define V_SQ_CF_WORD1_SQ_CF_INST_JUMP 0x0000000A +#define V_SQ_CF_WORD1_SQ_CF_INST_PUSH 0x0000000B +#define V_SQ_CF_WORD1_SQ_CF_INST_PUSH_ELSE 0x0000000C +#define V_SQ_CF_WORD1_SQ_CF_INST_ELSE 0x0000000D +#define V_SQ_CF_WORD1_SQ_CF_INST_POP 0x0000000E +#define V_SQ_CF_WORD1_SQ_CF_INST_POP_JUMP 0x0000000F +#define V_SQ_CF_WORD1_SQ_CF_INST_POP_PUSH 0x00000010 +#define V_SQ_CF_WORD1_SQ_CF_INST_POP_PUSH_ELSE 0x00000011 +#define V_SQ_CF_WORD1_SQ_CF_INST_CALL 0x00000012 +#define V_SQ_CF_WORD1_SQ_CF_INST_CALL_FS 0x00000013 +#define V_SQ_CF_WORD1_SQ_CF_INST_RETURN 0x00000014 +#define V_SQ_CF_WORD1_SQ_CF_INST_EMIT_VERTEX 0x00000015 +#define V_SQ_CF_WORD1_SQ_CF_INST_EMIT_CUT_VERTEX 0x00000016 +#define V_SQ_CF_WORD1_SQ_CF_INST_CUT_VERTEX 0x00000017 +#define V_SQ_CF_WORD1_SQ_CF_INST_KILL 0x00000018 +#define S_SQ_CF_WORD1_WHOLE_QUAD_MODE(x) (((x) & 0x1) << 30) +#define G_SQ_CF_WORD1_WHOLE_QUAD_MODE(x) (((x) >> 30) & 0x1) +#define C_SQ_CF_WORD1_WHOLE_QUAD_MODE 0xBFFFFFFF +#define S_SQ_CF_WORD1_BARRIER(x) (((x) & 0x1) << 31) +#define G_SQ_CF_WORD1_BARRIER(x) (((x) >> 31) & 0x1) +#define C_SQ_CF_WORD1_BARRIER 0x7FFFFFFF +#define P_SQ_CF_ALU_WORD0 +#define S_SQ_CF_ALU_WORD0_ALU_ADDR(x) (((x) & 0x3FFFFF) << 0) +#define G_SQ_CF_ALU_WORD0_ALU_ADDR(x) (((x) >> 0) & 0x3FFFFF) +#define C_SQ_CF_ALU_WORD0_ALU_ADDR 0xFFC00000 +#define S_SQ_CF_ALU_WORD0_KCACHE_BANK0(x) (((x) & 0xF) << 22) +#define G_SQ_CF_ALU_WORD0_KCACHE_BANK0(x) (((x) >> 22) & 0xF) +#define C_SQ_CF_ALU_WORD0_KCACHE_BANK0 0xFC3FFFFF +#define S_SQ_CF_ALU_WORD0_KCACHE_BANK1(x) (((x) & 0xF) << 26) +#define G_SQ_CF_ALU_WORD0_KCACHE_BANK1(x) (((x) >> 26) & 0xF) +#define C_SQ_CF_ALU_WORD0_KCACHE_BANK1 0xC3FFFFFF +#define S_SQ_CF_ALU_WORD0_KCACHE_MODE0(x) (((x) & 0x3) << 30) +#define G_SQ_CF_ALU_WORD0_KCACHE_MODE0(x) (((x) >> 30) & 0x3) +#define C_SQ_CF_ALU_WORD0_KCACHE_MODE0 0x3FFFFFFF +#define P_SQ_CF_ALU_WORD1 +#define S_SQ_CF_ALU_WORD1_KCACHE_MODE1(x) (((x) & 0x3) << 0) +#define G_SQ_CF_ALU_WORD1_KCACHE_MODE1(x) (((x) >> 0) & 0x3) +#define C_SQ_CF_ALU_WORD1_KCACHE_MODE1 0xFFFFFFFC +#define S_SQ_CF_ALU_WORD1_KCACHE_ADDR0(x) (((x) & 0xFF) << 2) +#define G_SQ_CF_ALU_WORD1_KCACHE_ADDR0(x) (((x) >> 2) & 0xFF) +#define C_SQ_CF_ALU_WORD1_KCACHE_ADDR0 0xFFFFFC03 +#define S_SQ_CF_ALU_WORD1_KCACHE_ADDR1(x) (((x) & 0xFF) << 10) +#define G_SQ_CF_ALU_WORD1_KCACHE_ADDR1(x) (((x) >> 10) & 0xFF) +#define C_SQ_CF_ALU_WORD1_KCACHE_ADDR1 0xFFFC03FF +#define S_SQ_CF_ALU_WORD1_ALU_COUNT(x) (((x) & 0x7F) << 18) +#define G_SQ_CF_ALU_WORD1_ALU_COUNT(x) (((x) >> 18) & 0x7F) +#define C_SQ_CF_ALU_WORD1_ALU_COUNT 0xFE03FFFF +#define S_SQ_CF_ALU_WORD1_USES_WATERFALL(x) (((x) & 0x1) << 25) +#define G_SQ_CF_ALU_WORD1_USES_WATERFALL(x) (((x) >> 25) & 0x1) +#define C_SQ_CF_ALU_WORD1_USES_WATERFALL 0xFDFFFFFF +#define S_SQ_CF_ALU_WORD1_CF_ALU_INST(x) (((x) & 0xF) << 26) +#define G_SQ_CF_ALU_WORD1_CF_ALU_INST(x) (((x) >> 26) & 0xF) +#define C_SQ_CF_ALU_WORD1_CF_ALU_INST 0xC3FFFFFF +#define V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU 0x00000008 +#define V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE 0x00000009 +#define V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP_AFTER 0x0000000A +#define V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP2_AFTER 0x0000000B +#define V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_CONTINUE 0x0000000D +#define V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_BREAK 0x0000000E +#define V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_ELSE_AFTER 0x0000000F +#define S_SQ_CF_ALU_WORD1_WHOLE_QUAD_MODE(x) (((x) & 0x1) << 30) +#define G_SQ_CF_ALU_WORD1_WHOLE_QUAD_MODE(x) (((x) >> 30) & 0x1) +#define C_SQ_CF_ALU_WORD1_WHOLE_QUAD_MODE 0xBFFFFFFF +#define S_SQ_CF_ALU_WORD1_BARRIER(x) (((x) & 0x1) << 31) +#define G_SQ_CF_ALU_WORD1_BARRIER(x) (((x) >> 31) & 0x1) +#define C_SQ_CF_ALU_WORD1_BARRIER 0x7FFFFFFF +#define P_SQ_CF_ALLOC_EXPORT_WORD0 +#define S_SQ_CF_ALLOC_EXPORT_WORD0_ARRAY_BASE(x) (((x) & 0x1FFF) << 0) +#define G_SQ_CF_ALLOC_EXPORT_WORD0_ARRAY_BASE(x) (((x) >> 0) & 0x1FFF) +#define C_SQ_CF_ALLOC_EXPORT_WORD0_ARRAY_BASE 0xFFFFE000 +#define S_SQ_CF_ALLOC_EXPORT_WORD0_TYPE(x) (((x) & 0x3) << 13) +#define G_SQ_CF_ALLOC_EXPORT_WORD0_TYPE(x) (((x) >> 13) & 0x3) +#define C_SQ_CF_ALLOC_EXPORT_WORD0_TYPE 0xFFFF9FFF +#define V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PIXEL 0x00000000 +#define V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_POS 0x00000001 +#define V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PARAM 0x00000002 +#define V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_SX 0x00000003 +#define S_SQ_CF_ALLOC_EXPORT_WORD0_RW_GPR(x) (((x) & 0x7F) << 15) +#define G_SQ_CF_ALLOC_EXPORT_WORD0_RW_GPR(x) (((x) >> 15) & 0x7F) +#define C_SQ_CF_ALLOC_EXPORT_WORD0_RW_GPR 0xFFC07FFF +#define S_SQ_CF_ALLOC_EXPORT_WORD0_RW_REL(x) (((x) & 0x1) << 22) +#define G_SQ_CF_ALLOC_EXPORT_WORD0_RW_REL(x) (((x) >> 22) & 0x1) +#define C_SQ_CF_ALLOC_EXPORT_WORD0_RW_REL 0xFFBFFFFF +#define S_SQ_CF_ALLOC_EXPORT_WORD0_INDEX_GPR(x) (((x) & 0x7F) << 23) +#define G_SQ_CF_ALLOC_EXPORT_WORD0_INDEX_GPR(x) (((x) >> 23) & 0x7F) +#define C_SQ_CF_ALLOC_EXPORT_WORD0_INDEX_GPR 0xC07FFFFF +#define S_SQ_CF_ALLOC_EXPORT_WORD0_ELEM_SIZE(x) (((x) & 0x3) << 30) +#define G_SQ_CF_ALLOC_EXPORT_WORD0_ELEM_SIZE(x) (((x) >> 30) & 0x3) +#define C_SQ_CF_ALLOC_EXPORT_WORD0_ELEM_SIZE 0x3FFFFFFF +#define P_SQ_CF_ALLOC_EXPORT_WORD1 +#define S_SQ_CF_ALLOC_EXPORT_WORD1_BURST_COUNT(x) (((x) & 0xF) << 17) +#define G_SQ_CF_ALLOC_EXPORT_WORD1_BURST_COUNT(x) (((x) >> 17) & 0xF) +#define C_SQ_CF_ALLOC_EXPORT_WORD1_BURST_COUNT 0xFFE1FFFF +#define S_SQ_CF_ALLOC_EXPORT_WORD1_END_OF_PROGRAM(x) (((x) & 0x1) << 21) +#define G_SQ_CF_ALLOC_EXPORT_WORD1_END_OF_PROGRAM(x) (((x) >> 21) & 0x1) +#define C_SQ_CF_ALLOC_EXPORT_WORD1_END_OF_PROGRAM 0xFFDFFFFF +#define S_SQ_CF_ALLOC_EXPORT_WORD1_VALID_PIXEL_MODE(x) (((x) & 0x1) << 22) +#define G_SQ_CF_ALLOC_EXPORT_WORD1_VALID_PIXEL_MODE(x) (((x) >> 22) & 0x1) +#define C_SQ_CF_ALLOC_EXPORT_WORD1_VALID_PIXEL_MODE 0xFFBFFFFF +#define S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(x) (((x) & 0x7F) << 23) +#define G_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(x) (((x) >> 23) & 0x7F) +#define C_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST 0xC07FFFFF +#define V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM0 0x00000020 +#define V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM1 0x00000021 +#define V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM2 0x00000022 +#define V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM3 0x00000023 +#define V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_SCRATCH 0x00000024 +#define V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_REDUCTION 0x00000025 +#define V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_RING 0x00000026 +#define V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT 0x00000027 +#define V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT_DONE 0x00000028 +#define S_SQ_CF_ALLOC_EXPORT_WORD1_WHOLE_QUAD_MODE(x) (((x) & 0x1) << 30) +#define G_SQ_CF_ALLOC_EXPORT_WORD1_WHOLE_QUAD_MODE(x) (((x) >> 30) & 0x1) +#define C_SQ_CF_ALLOC_EXPORT_WORD1_WHOLE_QUAD_MODE 0xBFFFFFFF +#define S_SQ_CF_ALLOC_EXPORT_WORD1_BARRIER(x) (((x) & 0x1) << 31) +#define G_SQ_CF_ALLOC_EXPORT_WORD1_BARRIER(x) (((x) >> 31) & 0x1) +#define C_SQ_CF_ALLOC_EXPORT_WORD1_BARRIER 0x7FFFFFFF +#define P_SQ_CF_ALLOC_EXPORT_WORD1_BUF +#define S_SQ_CF_ALLOC_EXPORT_WORD1_BUF_ARRAY_SIZE(x) (((x) & 0xFFF) << 0) +#define G_SQ_CF_ALLOC_EXPORT_WORD1_BUF_ARRAY_SIZE(x) (((x) >> 0) & 0xFFF) +#define C_SQ_CF_ALLOC_EXPORT_WORD1_BUF_ARRAY_SIZE 0xFFFFF000 +#define S_SQ_CF_ALLOC_EXPORT_WORD1_BUF_COMP_MASK(x) (((x) & 0xF) << 12) +#define G_SQ_CF_ALLOC_EXPORT_WORD1_BUF_COMP_MASK(x) (((x) >> 12) & 0xF) +#define C_SQ_CF_ALLOC_EXPORT_WORD1_BUF_COMP_MASK 0xFFFF0FFF +#define P_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ +#define S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_X(x) (((x) & 0x7) << 0) +#define G_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_X(x) (((x) >> 0) & 0x7) +#define C_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_X 0xFFFFFFF8 +#define S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Y(x) (((x) & 0x7) << 3) +#define G_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Y(x) (((x) >> 3) & 0x7) +#define C_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Y 0xFFFFFFC7 +#define S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Z(x) (((x) & 0x7) << 6) +#define G_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Z(x) (((x) >> 6) & 0x7) +#define C_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Z 0xFFFFFE3F +#define S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_W(x) (((x) & 0x7) << 9) +#define G_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_W(x) (((x) >> 9) & 0x7) +#define C_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_W 0xFFFFF1FF +#define P_SQ_ALU_WORD0 +#define S_SQ_ALU_WORD0_SRC0_SEL(x) (((x) & 0x1FF) << 0) +#define G_SQ_ALU_WORD0_SRC0_SEL(x) (((x) >> 0) & 0x1FF) +#define C_SQ_ALU_WORD0_SRC0_SEL 0xFFFFFE00 +#define S_SQ_ALU_WORD0_SRC0_REL(x) (((x) & 0x1) << 9) +#define G_SQ_ALU_WORD0_SRC0_REL(x) (((x) >> 9) & 0x1) +#define C_SQ_ALU_WORD0_SRC0_REL 0xFFFFFDFF +#define S_SQ_ALU_WORD0_SRC0_CHAN(x) (((x) & 0x3) << 10) +#define G_SQ_ALU_WORD0_SRC0_CHAN(x) (((x) >> 10) & 0x3) +#define C_SQ_ALU_WORD0_SRC0_CHAN 0xFFFFF3FF +#define S_SQ_ALU_WORD0_SRC0_NEG(x) (((x) & 0x1) << 12) +#define G_SQ_ALU_WORD0_SRC0_NEG(x) (((x) >> 12) & 0x1) +#define C_SQ_ALU_WORD0_SRC0_NEG 0xFFFFEFFF +#define S_SQ_ALU_WORD0_SRC1_SEL(x) (((x) & 0x1FF) << 13) +#define G_SQ_ALU_WORD0_SRC1_SEL(x) (((x) >> 13) & 0x1FF) +#define C_SQ_ALU_WORD0_SRC1_SEL 0xFFC01FFF +#define S_SQ_ALU_WORD0_SRC1_REL(x) (((x) & 0x1) << 22) +#define G_SQ_ALU_WORD0_SRC1_REL(x) (((x) >> 22) & 0x1) +#define C_SQ_ALU_WORD0_SRC1_REL 0xFFBFFFFF +#define S_SQ_ALU_WORD0_SRC1_CHAN(x) (((x) & 0x3) << 23) +#define G_SQ_ALU_WORD0_SRC1_CHAN(x) (((x) >> 23) & 0x3) +#define C_SQ_ALU_WORD0_SRC1_CHAN 0xFE7FFFFF +#define S_SQ_ALU_WORD0_SRC1_NEG(x) (((x) & 0x1) << 25) +#define G_SQ_ALU_WORD0_SRC1_NEG(x) (((x) >> 25) & 0x1) +#define C_SQ_ALU_WORD0_SRC1_NEG 0xFDFFFFFF +#define S_SQ_ALU_WORD0_INDEX_MODE(x) (((x) & 0x7) << 26) +#define G_SQ_ALU_WORD0_INDEX_MODE(x) (((x) >> 26) & 0x7) +#define C_SQ_ALU_WORD0_INDEX_MODE 0xE3FFFFFF +#define S_SQ_ALU_WORD0_PRED_SEL(x) (((x) & 0x3) << 29) +#define G_SQ_ALU_WORD0_PRED_SEL(x) (((x) >> 29) & 0x3) +#define C_SQ_ALU_WORD0_PRED_SEL 0x9FFFFFFF +#define S_SQ_ALU_WORD0_LAST(x) (((x) & 0x1) << 31) +#define G_SQ_ALU_WORD0_LAST(x) (((x) >> 31) & 0x1) +#define C_SQ_ALU_WORD0_LAST 0x7FFFFFFF +#define P_SQ_ALU_WORD1 +#define S_SQ_ALU_WORD1_ENCODING(x) (((x) & 0x7) << 15) +#define G_SQ_ALU_WORD1_ENCODING(x) (((x) >> 15) & 0x7) +#define C_SQ_ALU_WORD1_ENCODING 0xFFFC7FFF +#define S_SQ_ALU_WORD1_BANK_SWIZZLE(x) (((x) & 0x7) << 18) +#define G_SQ_ALU_WORD1_BANK_SWIZZLE(x) (((x) >> 18) & 0x7) +#define C_SQ_ALU_WORD1_BANK_SWIZZLE 0xFFE3FFFF +#define S_SQ_ALU_WORD1_DST_GPR(x) (((x) & 0x7F) << 21) +#define G_SQ_ALU_WORD1_DST_GPR(x) (((x) >> 21) & 0x7F) +#define C_SQ_ALU_WORD1_DST_GPR 0xF01FFFFF +#define S_SQ_ALU_WORD1_DST_REL(x) (((x) & 0x1) << 28) +#define G_SQ_ALU_WORD1_DST_REL(x) (((x) >> 28) & 0x1) +#define C_SQ_ALU_WORD1_DST_REL 0xEFFFFFFF +#define S_SQ_ALU_WORD1_DST_CHAN(x) (((x) & 0x3) << 29) +#define G_SQ_ALU_WORD1_DST_CHAN(x) (((x) >> 29) & 0x3) +#define C_SQ_ALU_WORD1_DST_CHAN 0x9FFFFFFF +#define S_SQ_ALU_WORD1_CLAMP(x) (((x) & 0x1) << 31) +#define G_SQ_ALU_WORD1_CLAMP(x) (((x) >> 31) & 0x1) +#define C_SQ_ALU_WORD1_CLAMP 0x7FFFFFFF +#define P_SQ_ALU_WORD1_OP2 +#define S_SQ_ALU_WORD1_OP2_SRC0_ABS(x) (((x) & 0x1) << 0) +#define G_SQ_ALU_WORD1_OP2_SRC0_ABS(x) (((x) >> 0) & 0x1) +#define C_SQ_ALU_WORD1_OP2_SRC0_ABS 0xFFFFFFFE +#define S_SQ_ALU_WORD1_OP2_SRC1_ABS(x) (((x) & 0x1) << 1) +#define G_SQ_ALU_WORD1_OP2_SRC1_ABS(x) (((x) >> 1) & 0x1) +#define C_SQ_ALU_WORD1_OP2_SRC1_ABS 0xFFFFFFFD +#define S_SQ_ALU_WORD1_OP2_UPDATE_EXECUTE_MASK(x) (((x) & 0x1) << 2) +#define G_SQ_ALU_WORD1_OP2_UPDATE_EXECUTE_MASK(x) (((x) >> 2) & 0x1) +#define C_SQ_ALU_WORD1_OP2_UPDATE_EXECUTE_MASK 0xFFFFFFFB +#define S_SQ_ALU_WORD1_OP2_UPDATE_PRED(x) (((x) & 0x1) << 3) +#define G_SQ_ALU_WORD1_OP2_UPDATE_PRED(x) (((x) >> 3) & 0x1) +#define C_SQ_ALU_WORD1_OP2_UPDATE_PRED 0xFFFFFFF7 +#define S_SQ_ALU_WORD1_OP2_WRITE_MASK(x) (((x) & 0x1) << 4) +#define G_SQ_ALU_WORD1_OP2_WRITE_MASK(x) (((x) >> 4) & 0x1) +#define C_SQ_ALU_WORD1_OP2_WRITE_MASK 0xFFFFFFEF +#define S_SQ_ALU_WORD1_OP2_FOG_MERGE(x) (((x) & 0x1) << 5) +#define G_SQ_ALU_WORD1_OP2_FOG_MERGE(x) (((x) >> 5) & 0x1) +#define C_SQ_ALU_WORD1_OP2_FOG_MERGE 0xFFFFFFDF +#define S_SQ_ALU_WORD1_OP2_OMOD(x) (((x) & 0x3) << 6) +#define G_SQ_ALU_WORD1_OP2_OMOD(x) (((x) >> 6) & 0x3) +#define C_SQ_ALU_WORD1_OP2_OMOD 0xFFFFFF3F +#define S_SQ_ALU_WORD1_OP2_ALU_INST(x) (((x) & 0x3FF) << 8) +#define G_SQ_ALU_WORD1_OP2_ALU_INST(x) (((x) >> 8) & 0x3FF) +#define C_SQ_ALU_WORD1_OP2_ALU_INST 0xFFFC00FF +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD 0x00000000 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL 0x00000001 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL_IEEE 0x00000002 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX 0x00000003 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN 0x00000004 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX_DX10 0x00000005 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN_DX10 0x00000006 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETE 0x00000008 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT 0x00000009 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE 0x0000000A +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETNE 0x0000000B +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETE_DX10 0x0000000C +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT_DX10 0x0000000D +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_DX10 0x0000000E +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETNE_DX10 0x0000000F +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FRACT 0x00000010 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_TRUNC 0x00000011 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CEIL 0x00000012 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RNDNE 0x00000013 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLOOR 0x00000014 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA 0x00000015 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_FLOOR 0x00000016 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT 0x00000018 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV 0x00000019 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP 0x0000001A +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_UINT 0x0000001E +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_UINT 0x0000001F +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE 0x00000020 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT 0x00000021 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE 0x00000022 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE 0x00000023 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SET_INV 0x00000024 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SET_POP 0x00000025 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SET_CLR 0x00000026 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SET_RESTORE 0x00000027 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_PUSH 0x00000028 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_PUSH 0x00000029 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_PUSH 0x0000002A +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_PUSH 0x0000002B +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLE 0x0000002C +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT 0x0000002D +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE 0x0000002E +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLNE 0x0000002F +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_AND_INT 0x00000030 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_OR_INT 0x00000031 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_XOR_INT 0x00000032 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOT_INT 0x00000033 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD_INT 0x00000034 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SUB_INT 0x00000035 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX_INT 0x00000036 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN_INT 0x00000037 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX_UINT 0x00000038 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN_UINT 0x00000039 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETE_INT 0x0000003A +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT_INT 0x0000003B +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_INT 0x0000003C +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETNE_INT 0x0000003D +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT_UINT 0x0000003E +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_UINT 0x0000003F +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT_UINT 0x00000040 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE_UINT 0x00000041 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_INT 0x00000042 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_INT 0x00000043 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_INT 0x00000044 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_INT 0x00000045 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLE_INT 0x00000046 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT_INT 0x00000047 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE_INT 0x00000048 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLNE_INT 0x00000049 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_PUSH_INT 0x0000004A +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_PUSH_INT 0x0000004B +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_PUSH_INT 0x0000004C +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_PUSH_INT 0x0000004D +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETLT_PUSH_INT 0x0000004E +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETLE_PUSH_INT 0x0000004F +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4 0x00000050 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4_IEEE 0x00000051 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CUBE 0x00000052 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX4 0x00000053 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_GPR_INT 0x00000060 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE 0x00000061 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_CLAMPED 0x00000062 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE 0x00000063 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_CLAMPED 0x00000064 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_FF 0x00000065 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_IEEE 0x00000066 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_CLAMPED 0x00000067 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_FF 0x00000068 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_IEEE 0x00000069 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SQRT_IEEE 0x0000006A +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT 0x0000006B +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INT_TO_FLT 0x0000006C +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_UINT_TO_FLT 0x0000006D +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SIN 0x0000006E +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_COS 0x0000006F +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ASHR_INT 0x00000070 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LSHR_INT 0x00000071 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LSHL_INT 0x00000072 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_INT 0x00000073 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_INT 0x00000074 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_UINT 0x00000075 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_UINT 0x00000076 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_INT 0x00000077 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_UINT 0x00000078 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_UINT 0x00000079 +#define P_SQ_ALU_WORD1_OP3 +#define S_SQ_ALU_WORD1_OP3_SRC2_SEL(x) (((x) & 0x1FF) << 0) +#define G_SQ_ALU_WORD1_OP3_SRC2_SEL(x) (((x) >> 0) & 0x1FF) +#define C_SQ_ALU_WORD1_OP3_SRC2_SEL 0xFFFFFE00 +#define S_SQ_ALU_WORD1_OP3_SRC2_REL(x) (((x) & 0x1) << 9) +#define G_SQ_ALU_WORD1_OP3_SRC2_REL(x) (((x) >> 9) & 0x1) +#define C_SQ_ALU_WORD1_OP3_SRC2_REL 0xFFFFFDFF +#define S_SQ_ALU_WORD1_OP3_SRC2_CHAN(x) (((x) & 0x3) << 10) +#define G_SQ_ALU_WORD1_OP3_SRC2_CHAN(x) (((x) >> 10) & 0x3) +#define C_SQ_ALU_WORD1_OP3_SRC2_CHAN 0xFFFFF3FF +#define S_SQ_ALU_WORD1_OP3_SRC2_NEG(x) (((x) & 0x1) << 12) +#define G_SQ_ALU_WORD1_OP3_SRC2_NEG(x) (((x) >> 12) & 0x1) +#define C_SQ_ALU_WORD1_OP3_SRC2_NEG 0xFFFFEFFF +#define S_SQ_ALU_WORD1_OP3_ALU_INST(x) (((x) & 0x1F) << 13) +#define G_SQ_ALU_WORD1_OP3_ALU_INST(x) (((x) >> 13) & 0x1F) +#define C_SQ_ALU_WORD1_OP3_ALU_INST 0xFFFC1FFF +#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MUL_LIT 0x0000000C +#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MUL_LIT_M2 0x0000000D +#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MUL_LIT_M4 0x0000000E +#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MUL_LIT_D2 0x0000000F +#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD 0x00000010 +#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD_M2 0x00000011 +#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD_M4 0x00000012 +#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD_D2 0x00000013 +#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD_IEEE 0x00000014 +#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD_IEEE_M2 0x00000015 +#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD_IEEE_M4 0x00000016 +#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD_IEEE_D2 0x00000017 +#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDE 0x00000018 +#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGT 0x00000019 +#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGE 0x0000001A +#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDE_INT 0x0000001C +#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGT_INT 0x0000001D +#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGE_INT 0x0000001E +#define P_SQ_VTX_WORD0 +#define S_SQ_VTX_WORD0_VTX_INST(x) (((x) & 0x1F) << 0) +#define G_SQ_VTX_WORD0_VTX_INST(x) (((x) >> 0) & 0x1F) +#define C_SQ_VTX_WORD0_VTX_INST 0xFFFFFFE0 +#define S_SQ_VTX_WORD0_FETCH_TYPE(x) (((x) & 0x3) << 5) +#define G_SQ_VTX_WORD0_FETCH_TYPE(x) (((x) >> 5) & 0x3) +#define C_SQ_VTX_WORD0_FETCH_TYPE 0xFFFFFF9F +#define S_SQ_VTX_WORD0_FETCH_WHOLE_QUAD(x) (((x) & 0x1) << 7) +#define G_SQ_VTX_WORD0_FETCH_WHOLE_QUAD(x) (((x) >> 7) & 0x1) +#define C_SQ_VTX_WORD0_FETCH_WHOLE_QUAD 0xFFFFFF7F +#define S_SQ_VTX_WORD0_BUFFER_ID(x) (((x) & 0xFF) << 8) +#define G_SQ_VTX_WORD0_BUFFER_ID(x) (((x) >> 8) & 0xFF) +#define C_SQ_VTX_WORD0_BUFFER_ID 0xFFFF00FF +#define S_SQ_VTX_WORD0_SRC_GPR(x) (((x) & 0x7F) << 16) +#define G_SQ_VTX_WORD0_SRC_GPR(x) (((x) >> 16) & 0x7F) +#define C_SQ_VTX_WORD0_SRC_GPR 0xFF80FFFF +#define S_SQ_VTX_WORD0_SRC_REL(x) (((x) & 0x1) << 23) +#define G_SQ_VTX_WORD0_SRC_REL(x) (((x) >> 23) & 0x1) +#define C_SQ_VTX_WORD0_SRC_REL 0xFF7FFFFF +#define S_SQ_VTX_WORD0_SRC_SEL_X(x) (((x) & 0x3) << 24) +#define G_SQ_VTX_WORD0_SRC_SEL_X(x) (((x) >> 24) & 0x3) +#define C_SQ_VTX_WORD0_SRC_SEL_X 0xFCFFFFFF +#define S_SQ_VTX_WORD0_MEGA_FETCH_COUNT(x) (((x) & 0x3F) << 26) +#define G_SQ_VTX_WORD0_MEGA_FETCH_COUNT(x) (((x) >> 26) & 0x3F) +#define C_SQ_VTX_WORD0_MEGA_FETCH_COUNT 0x03FFFFFF +#define P_SQ_VTX_WORD1 +#define S_SQ_VTX_WORD1_DST_SEL_X(x) (((x) & 0x7) << 9) +#define G_SQ_VTX_WORD1_DST_SEL_X(x) (((x) >> 9) & 0x7) +#define C_SQ_VTX_WORD1_DST_SEL_X 0xFFFFF1FF +#define S_SQ_VTX_WORD1_DST_SEL_Y(x) (((x) & 0x7) << 12) +#define G_SQ_VTX_WORD1_DST_SEL_Y(x) (((x) >> 12) & 0x7) +#define C_SQ_VTX_WORD1_DST_SEL_Y 0xFFFF8FFF +#define S_SQ_VTX_WORD1_DST_SEL_Z(x) (((x) & 0x7) << 15) +#define G_SQ_VTX_WORD1_DST_SEL_Z(x) (((x) >> 15) & 0x7) +#define C_SQ_VTX_WORD1_DST_SEL_Z 0xFFFC7FFF +#define S_SQ_VTX_WORD1_DST_SEL_W(x) (((x) & 0x7) << 18) +#define G_SQ_VTX_WORD1_DST_SEL_W(x) (((x) >> 18) & 0x7) +#define C_SQ_VTX_WORD1_DST_SEL_W 0xFFE3FFFF +#define S_SQ_VTX_WORD1_USE_CONST_FIELDS(x) (((x) & 0x1) << 21) +#define G_SQ_VTX_WORD1_USE_CONST_FIELDS(x) (((x) >> 21) & 0x1) +#define C_SQ_VTX_WORD1_USE_CONST_FIELDS 0xFFDFFFFF +#define S_SQ_VTX_WORD1_DATA_FORMAT(x) (((x) & 0x3F) << 22) +#define G_SQ_VTX_WORD1_DATA_FORMAT(x) (((x) >> 22) & 0x3F) +#define C_SQ_VTX_WORD1_DATA_FORMAT 0xF03FFFFF +#define S_SQ_VTX_WORD1_NUM_FORMAT_ALL(x) (((x) & 0x3) << 28) +#define G_SQ_VTX_WORD1_NUM_FORMAT_ALL(x) (((x) >> 28) & 0x3) +#define C_SQ_VTX_WORD1_NUM_FORMAT_ALL 0xCFFFFFFF +#define S_SQ_VTX_WORD1_FORMAT_COMP_ALL(x) (((x) & 0x1) << 30) +#define G_SQ_VTX_WORD1_FORMAT_COMP_ALL(x) (((x) >> 30) & 0x1) +#define C_SQ_VTX_WORD1_FORMAT_COMP_ALL 0xBFFFFFFF +#define S_SQ_VTX_WORD1_SRF_MODE_ALL(x) (((x) & 0x1) << 31) +#define G_SQ_VTX_WORD1_SRF_MODE_ALL(x) (((x) >> 31) & 0x1) +#define C_SQ_VTX_WORD1_SRF_MODE_ALL 0x7FFFFFFF +#define P_SQ_VTX_WORD1_GPR +#define S_SQ_VTX_WORD1_GPR_DST_GPR(x) (((x) & 0x7F) << 0) +#define G_SQ_VTX_WORD1_GPR_DST_GPR(x) (((x) >> 0) & 0x7F) +#define C_SQ_VTX_WORD1_GPR_DST_GPR 0xFFFFFF80 +#define S_SQ_VTX_WORD1_GPR_DST_REL(x) (((x) & 0x1) << 7) +#define G_SQ_VTX_WORD1_GPR_DST_REL(x) (((x) >> 7) & 0x1) +#define C_SQ_VTX_WORD1_GPR_DST_REL 0xFFFFFF7F +#define P_SQ_VTX_WORD1_SEM +#define S_SQ_VTX_WORD1_SEM_SEMANTIC_ID(x) (((x) & 0xFF) << 0) +#define G_SQ_VTX_WORD1_SEM_SEMANTIC_ID(x) (((x) >> 0) & 0xFF) +#define C_SQ_VTX_WORD1_SEM_SEMANTIC_ID 0xFFFFFF00 +#define P_SQ_VTX_WORD2 +#define S_SQ_VTX_WORD2_OFFSET(x) (((x) & 0xFFFF) << 0) +#define G_SQ_VTX_WORD2_OFFSET(x) (((x) >> 0) & 0xFFFF) +#define C_SQ_VTX_WORD2_OFFSET 0xFFFF0000 +#define S_SQ_VTX_WORD2_ENDIAN_SWAP(x) (((x) & 0x3) << 16) +#define G_SQ_VTX_WORD2_ENDIAN_SWAP(x) (((x) >> 16) & 0x3) +#define C_SQ_VTX_WORD2_ENDIAN_SWAP 0xFFFCFFFF +#define S_SQ_VTX_WORD2_CONST_BUF_NO_STRIDE(x) (((x) & 0x1) << 18) +#define G_SQ_VTX_WORD2_CONST_BUF_NO_STRIDE(x) (((x) >> 18) & 0x1) +#define C_SQ_VTX_WORD2_CONST_BUF_NO_STRIDE 0xFFFBFFFF +#define S_SQ_VTX_WORD2_MEGA_FETCH(x) (((x) & 0x1) << 19) +#define G_SQ_VTX_WORD2_MEGA_FETCH(x) (((x) >> 19) & 0x1) +#define C_SQ_VTX_WORD2_MEGA_FETCH 0xFFF7FFFF +#define S_SQ_VTX_WORD2_ALT_CONST(x) (((x) & 0x1) << 20) +#define G_SQ_VTX_WORD2_ALT_CONST(x) (((x) >> 20) & 0x1) +#define C_SQ_VTX_WORD2_ALT_CONST 0xFFEFFFFF +#define P_SQ_TEX_WORD0 +#define S_SQ_TEX_WORD0_TEX_INST(x) (((x) & 0x1F) << 0) +#define G_SQ_TEX_WORD0_TEX_INST(x) (((x) >> 0) & 0x1F) +#define C_SQ_TEX_WORD0_TEX_INST 0xFFFFFFE0 +#define S_SQ_TEX_WORD0_BC_FRAC_MODE(x) (((x) & 0x1) << 5) +#define G_SQ_TEX_WORD0_BC_FRAC_MODE(x) (((x) >> 5) & 0x1) +#define C_SQ_TEX_WORD0_BC_FRAC_MODE 0xFFFFFFDF +#define S_SQ_TEX_WORD0_FETCH_WHOLE_QUAD(x) (((x) & 0x1) << 7) +#define G_SQ_TEX_WORD0_FETCH_WHOLE_QUAD(x) (((x) >> 7) & 0x1) +#define C_SQ_TEX_WORD0_FETCH_WHOLE_QUAD 0xFFFFFF7F +#define S_SQ_TEX_WORD0_RESOURCE_ID(x) (((x) & 0xFF) << 8) +#define G_SQ_TEX_WORD0_RESOURCE_ID(x) (((x) >> 8) & 0xFF) +#define C_SQ_TEX_WORD0_RESOURCE_ID 0xFFFF00FF +#define S_SQ_TEX_WORD0_SRC_GPR(x) (((x) & 0x7F) << 16) +#define G_SQ_TEX_WORD0_SRC_GPR(x) (((x) >> 16) & 0x7F) +#define C_SQ_TEX_WORD0_SRC_GPR 0xFF80FFFF +#define S_SQ_TEX_WORD0_SRC_REL(x) (((x) & 0x1) << 23) +#define G_SQ_TEX_WORD0_SRC_REL(x) (((x) >> 23) & 0x1) +#define C_SQ_TEX_WORD0_SRC_REL 0xFF7FFFFF +#define S_SQ_TEX_WORD0_ALT_CONST(x) (((x) & 0x1) << 24) +#define G_SQ_TEX_WORD0_ALT_CONST(x) (((x) >> 24) & 0x1) +#define C_SQ_TEX_WORD0_ALT_CONST 0xFEFFFFFF +#define P_SQ_TEX_WORD1 +#define S_SQ_TEX_WORD1_DST_GPR(x) (((x) & 0x7F) << 0) +#define G_SQ_TEX_WORD1_DST_GPR(x) (((x) >> 0) & 0x7F) +#define C_SQ_TEX_WORD1_DST_GPR 0xFFFFFF80 +#define S_SQ_TEX_WORD1_DST_REL(x) (((x) & 0x1) << 7) +#define G_SQ_TEX_WORD1_DST_REL(x) (((x) >> 7) & 0x1) +#define C_SQ_TEX_WORD1_DST_REL 0xFFFFFF7F +#define S_SQ_TEX_WORD1_DST_SEL_X(x) (((x) & 0x7) << 9) +#define G_SQ_TEX_WORD1_DST_SEL_X(x) (((x) >> 9) & 0x7) +#define C_SQ_TEX_WORD1_DST_SEL_X 0xFFFFF1FF +#define S_SQ_TEX_WORD1_DST_SEL_Y(x) (((x) & 0x7) << 12) +#define G_SQ_TEX_WORD1_DST_SEL_Y(x) (((x) >> 12) & 0x7) +#define C_SQ_TEX_WORD1_DST_SEL_Y 0xFFFF8FFF +#define S_SQ_TEX_WORD1_DST_SEL_Z(x) (((x) & 0x7) << 15) +#define G_SQ_TEX_WORD1_DST_SEL_Z(x) (((x) >> 15) & 0x7) +#define C_SQ_TEX_WORD1_DST_SEL_Z 0xFFFC7FFF +#define S_SQ_TEX_WORD1_DST_SEL_W(x) (((x) & 0x7) << 18) +#define G_SQ_TEX_WORD1_DST_SEL_W(x) (((x) >> 18) & 0x7) +#define C_SQ_TEX_WORD1_DST_SEL_W 0xFFE3FFFF +#define S_SQ_TEX_WORD1_LOD_BIAS(x) (((x) & 0x7F) << 21) +#define G_SQ_TEX_WORD1_LOD_BIAS(x) (((x) >> 21) & 0x7F) +#define C_SQ_TEX_WORD1_LOD_BIAS 0xF01FFFFF +#define S_SQ_TEX_WORD1_COORD_TYPE_X(x) (((x) & 0x1) << 28) +#define G_SQ_TEX_WORD1_COORD_TYPE_X(x) (((x) >> 28) & 0x1) +#define C_SQ_TEX_WORD1_COORD_TYPE_X 0xEFFFFFFF +#define S_SQ_TEX_WORD1_COORD_TYPE_Y(x) (((x) & 0x1) << 29) +#define G_SQ_TEX_WORD1_COORD_TYPE_Y(x) (((x) >> 29) & 0x1) +#define C_SQ_TEX_WORD1_COORD_TYPE_Y 0xDFFFFFFF +#define S_SQ_TEX_WORD1_COORD_TYPE_Z(x) (((x) & 0x1) << 30) +#define G_SQ_TEX_WORD1_COORD_TYPE_Z(x) (((x) >> 30) & 0x1) +#define C_SQ_TEX_WORD1_COORD_TYPE_Z 0xBFFFFFFF +#define S_SQ_TEX_WORD1_COORD_TYPE_W(x) (((x) & 0x1) << 31) +#define G_SQ_TEX_WORD1_COORD_TYPE_W(x) (((x) >> 31) & 0x1) +#define C_SQ_TEX_WORD1_COORD_TYPE_W 0x7FFFFFFF +#define P_SQ_TEX_WORD2 +#define S_SQ_TEX_WORD2_OFFSET_X(x) (((x) & 0x1F) << 0) +#define G_SQ_TEX_WORD2_OFFSET_X(x) (((x) >> 0) & 0x1F) +#define C_SQ_TEX_WORD2_OFFSET_X 0xFFFFFFE0 +#define S_SQ_TEX_WORD2_OFFSET_Y(x) (((x) & 0x1F) << 5) +#define G_SQ_TEX_WORD2_OFFSET_Y(x) (((x) >> 5) & 0x1F) +#define C_SQ_TEX_WORD2_OFFSET_Y 0xFFFFFC1F +#define S_SQ_TEX_WORD2_OFFSET_Z(x) (((x) & 0x1F) << 10) +#define G_SQ_TEX_WORD2_OFFSET_Z(x) (((x) >> 10) & 0x1F) +#define C_SQ_TEX_WORD2_OFFSET_Z 0xFFFF83FF +#define S_SQ_TEX_WORD2_SAMPLER_ID(x) (((x) & 0x1F) << 15) +#define G_SQ_TEX_WORD2_SAMPLER_ID(x) (((x) >> 15) & 0x1F) +#define C_SQ_TEX_WORD2_SAMPLER_ID 0xFFF07FFF +#define S_SQ_TEX_WORD2_SRC_SEL_X(x) (((x) & 0x7) << 20) +#define G_SQ_TEX_WORD2_SRC_SEL_X(x) (((x) >> 20) & 0x7) +#define C_SQ_TEX_WORD2_SRC_SEL_X 0xFF8FFFFF +#define S_SQ_TEX_WORD2_SRC_SEL_Y(x) (((x) & 0x7) << 23) +#define G_SQ_TEX_WORD2_SRC_SEL_Y(x) (((x) >> 23) & 0x7) +#define C_SQ_TEX_WORD2_SRC_SEL_Y 0xFC7FFFFF +#define S_SQ_TEX_WORD2_SRC_SEL_Z(x) (((x) & 0x7) << 26) +#define G_SQ_TEX_WORD2_SRC_SEL_Z(x) (((x) >> 26) & 0x7) +#define C_SQ_TEX_WORD2_SRC_SEL_Z 0xE3FFFFFF +#define S_SQ_TEX_WORD2_SRC_SEL_W(x) (((x) & 0x7) << 29) +#define G_SQ_TEX_WORD2_SRC_SEL_W(x) (((x) >> 29) & 0x7) +#define C_SQ_TEX_WORD2_SRC_SEL_W 0x1FFFFFFF +#define P_SQ_ALU_WORD1_OP2_V2 +#define S_SQ_ALU_WORD1_OP2_V2_SRC0_ABS(x) (((x) & 0x1) << 0) +#define G_SQ_ALU_WORD1_OP2_V2_SRC0_ABS(x) (((x) >> 0) & 0x1) +#define C_SQ_ALU_WORD1_OP2_V2_SRC0_ABS 0xFFFFFFFE +#define S_SQ_ALU_WORD1_OP2_V2_SRC1_ABS(x) (((x) & 0x1) << 1) +#define G_SQ_ALU_WORD1_OP2_V2_SRC1_ABS(x) (((x) >> 1) & 0x1) +#define C_SQ_ALU_WORD1_OP2_V2_SRC1_ABS 0xFFFFFFFD +#define S_SQ_ALU_WORD1_OP2_V2_UPDATE_EXECUTE_MASK(x) (((x) & 0x1) << 2) +#define G_SQ_ALU_WORD1_OP2_V2_UPDATE_EXECUTE_MASK(x) (((x) >> 2) & 0x1) +#define C_SQ_ALU_WORD1_OP2_V2_UPDATE_EXECUTE_MASK 0xFFFFFFFB +#define S_SQ_ALU_WORD1_OP2_V2_UPDATE_PRED(x) (((x) & 0x1) << 3) +#define G_SQ_ALU_WORD1_OP2_V2_UPDATE_PRED(x) (((x) >> 3) & 0x1) +#define C_SQ_ALU_WORD1_OP2_V2_UPDATE_PRED 0xFFFFFFF7 +#define S_SQ_ALU_WORD1_OP2_V2_WRITE_MASK(x) (((x) & 0x1) << 4) +#define G_SQ_ALU_WORD1_OP2_V2_WRITE_MASK(x) (((x) >> 4) & 0x1) +#define C_SQ_ALU_WORD1_OP2_V2_WRITE_MASK 0xFFFFFFEF +#define S_SQ_ALU_WORD1_OP2_V2_OMOD(x) (((x) & 0x3) << 5) +#define G_SQ_ALU_WORD1_OP2_V2_OMOD(x) (((x) >> 5) & 0x3) +#define C_SQ_ALU_WORD1_OP2_V2_OMOD 0xFFFFFF9F +#define S_SQ_ALU_WORD1_OP2_V2_ALU_INST(x) (((x) & 0x7FF) << 7) +#define G_SQ_ALU_WORD1_OP2_V2_ALU_INST(x) (((x) >> 7) & 0x7FF) +#define C_SQ_ALU_WORD1_OP2_V2_ALU_INST 0xFFFC007F + +#endif diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c new file mode 100644 index 00000000000..96d45807e09 --- /dev/null +++ b/src/gallium/drivers/r600/r600_state.c @@ -0,0 +1,433 @@ +/* + * Copyright 2010 Jerome Glisse + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Jerome Glisse + */ +#include +#include +#include +#include +#include "r600_screen.h" +#include "r600_texture.h" +#include "r600_context.h" +#include "r600d.h" + + +static void r600_delete_state(struct pipe_context *ctx, void *state) +{ + struct radeon_state *rstate = state; + + radeon_state_decref(rstate); +} + +static void *r600_create_blend_state(struct pipe_context *ctx, + const struct pipe_blend_state *state) +{ + struct r600_screen *rscreen = (struct r600_screen*)ctx->screen; + struct radeon_state *rstate; + + rstate = radeon_state(rscreen->rw, R600_BLEND_TYPE, R600_BLEND); + if (rstate == NULL) + return NULL; + rstate->states[R600_BLEND__CB_BLEND_RED] = 0x00000000; + rstate->states[R600_BLEND__CB_BLEND_GREEN] = 0x00000000; + rstate->states[R600_BLEND__CB_BLEND_BLUE] = 0x00000000; + rstate->states[R600_BLEND__CB_BLEND_ALPHA] = 0x00000000; + rstate->states[R600_BLEND__CB_BLEND0_CONTROL] = 0x00010001; + rstate->states[R600_BLEND__CB_BLEND1_CONTROL] = 0x00000000; + rstate->states[R600_BLEND__CB_BLEND2_CONTROL] = 0x00000000; + rstate->states[R600_BLEND__CB_BLEND3_CONTROL] = 0x00000000; + rstate->states[R600_BLEND__CB_BLEND4_CONTROL] = 0x00000000; + rstate->states[R600_BLEND__CB_BLEND5_CONTROL] = 0x00000000; + rstate->states[R600_BLEND__CB_BLEND6_CONTROL] = 0x00000000; + rstate->states[R600_BLEND__CB_BLEND7_CONTROL] = 0x00000000; + rstate->states[R600_BLEND__CB_BLEND_CONTROL] = 0x00000000; + if (radeon_state_pm4(rstate)) { + radeon_state_decref(rstate); + return NULL; + } + return rstate; +} + +static void r600_bind_blend_state(struct pipe_context *ctx, void *state) +{ + struct r600_context *rctx = (struct r600_context*)ctx; + radeon_draw_set(rctx->draw, state); +} + +static void r600_set_blend_color(struct pipe_context *ctx, + const struct pipe_blend_color *color) +{ +} + +static void r600_set_clip_state(struct pipe_context *ctx, + const struct pipe_clip_state *state) +{ +} + +static void r600_set_framebuffer_state(struct pipe_context *ctx, + const struct pipe_framebuffer_state *state) +{ + struct r600_screen *rscreen = (struct r600_screen*)ctx->screen; + struct r600_context *rctx = (struct r600_context*)ctx; + struct r600_texture *rtex; + struct r600_pipe_buffer *rbuffer; + struct radeon_state *rstate; + unsigned level = state->cbufs[0]->level; + unsigned pitch, slice; + + rstate = radeon_state(rscreen->rw, R600_CB0_TYPE, R600_CB0); + if (rstate == NULL) + return; + rtex = (struct r600_texture*)state->cbufs[0]->texture; + rbuffer = (struct r600_pipe_buffer*)rtex->buffer; + rstate->bo[0] = radeon_bo_incref(rscreen->rw, rbuffer->bo); + rstate->bo[1] = radeon_bo_incref(rscreen->rw, rbuffer->bo); + rstate->bo[2] = radeon_bo_incref(rscreen->rw, rbuffer->bo); + rstate->placement[0] = RADEON_GEM_DOMAIN_GTT; + rstate->placement[2] = RADEON_GEM_DOMAIN_GTT; + rstate->placement[4] = RADEON_GEM_DOMAIN_GTT; + rstate->nbo = 3; + pitch = rtex->pitch[level] / 8 - 1; + slice = rtex->pitch[level] * state->cbufs[0]->height / 64 - 1; + rstate->states[R600_CB0__CB_COLOR0_BASE] = 0x00000000; + rstate->states[R600_CB0__CB_COLOR0_INFO] = 0x08110068; + rstate->states[R600_CB0__CB_COLOR0_SIZE] = S_028060_PITCH_TILE_MAX(pitch) | + S_028060_SLICE_TILE_MAX(slice); + rstate->states[R600_CB0__CB_COLOR0_VIEW] = 0x00000000; + rstate->states[R600_CB0__CB_COLOR0_FRAG] = 0x00000000; + rstate->states[R600_CB0__CB_COLOR0_TILE] = 0x00000000; + rstate->states[R600_CB0__CB_COLOR0_MASK] = 0x00000000; + if (radeon_state_pm4(rstate)) { + radeon_state_decref(rstate); + return; + } + radeon_draw_set_new(rctx->draw, rstate); + rctx->db = radeon_state_decref(rctx->db); + rctx->db = radeon_state(rscreen->rw, R600_DB_TYPE, R600_DB); + rctx->db->bo[0] = radeon_bo_incref(rscreen->rw, rstate->bo[0]); + rctx->db->nbo = 1; + rctx->db->placement[0] = RADEON_GEM_DOMAIN_GTT; +} + +static void *r600_create_fs_state(struct pipe_context *ctx, + const struct pipe_shader_state *shader) +{ + return r600_pipe_shader_create(ctx, C_PROGRAM_TYPE_FS, shader->tokens); +} + +static void r600_bind_fs_state(struct pipe_context *ctx, void *state) +{ + struct r600_context *rctx = (struct r600_context*)ctx; + + rctx->ps_shader = state; +} + +static void *r600_create_vs_state(struct pipe_context *ctx, + const struct pipe_shader_state *shader) +{ + return r600_pipe_shader_create(ctx, C_PROGRAM_TYPE_VS, shader->tokens); +} + +static void r600_bind_vs_state(struct pipe_context *ctx, void *state) +{ + struct r600_context *rctx = (struct r600_context*)ctx; + + rctx->vs_shader = state; +} + +static void r600_set_polygon_stipple(struct pipe_context *ctx, + const struct pipe_poly_stipple *state) +{ +} + +static void *r600_create_rs_state(struct pipe_context *ctx, + const struct pipe_rasterizer_state *state) +{ + struct r600_screen *rscreen = (struct r600_screen*)ctx->screen; + struct r600_context *rctx = (struct r600_context*)ctx; + struct radeon_state *rstate; + + rctx->flat_shade = state->flatshade; + rstate = radeon_state(rscreen->rw, R600_RASTERIZER_TYPE, R600_RASTERIZER); + if (rstate == NULL) + return NULL; + rstate->states[R600_RASTERIZER__SPI_INTERP_CONTROL_0] = 0x00000001; + rstate->states[R600_RASTERIZER__PA_CL_CLIP_CNTL] = 0x00000000; + rstate->states[R600_RASTERIZER__PA_SU_SC_MODE_CNTL] = 0x00080000; + rstate->states[R600_RASTERIZER__PA_CL_VS_OUT_CNTL] = 0x00000000; + rstate->states[R600_RASTERIZER__PA_CL_NANINF_CNTL] = 0x00000000; + rstate->states[R600_RASTERIZER__PA_SU_POINT_SIZE] = 0x00080008; + rstate->states[R600_RASTERIZER__PA_SU_POINT_MINMAX] = 0x00000000; + rstate->states[R600_RASTERIZER__PA_SU_LINE_CNTL] = 0x00000008; + rstate->states[R600_RASTERIZER__PA_SC_LINE_STIPPLE] = 0x00000005; + rstate->states[R600_RASTERIZER__PA_SC_MPASS_PS_CNTL] = 0x00000000; + rstate->states[R600_RASTERIZER__PA_SC_LINE_CNTL] = 0x00000400; + rstate->states[R600_RASTERIZER__PA_CL_GB_VERT_CLIP_ADJ] = 0x3F800000; + rstate->states[R600_RASTERIZER__PA_CL_GB_VERT_DISC_ADJ] = 0x3F800000; + rstate->states[R600_RASTERIZER__PA_CL_GB_HORZ_CLIP_ADJ] = 0x3F800000; + rstate->states[R600_RASTERIZER__PA_CL_GB_HORZ_DISC_ADJ] = 0x3F800000; + rstate->states[R600_RASTERIZER__PA_SU_POLY_OFFSET_DB_FMT_CNTL] = 0x00000000; + rstate->states[R600_RASTERIZER__PA_SU_POLY_OFFSET_CLAMP] = 0x00000000; + rstate->states[R600_RASTERIZER__PA_SU_POLY_OFFSET_FRONT_SCALE] = 0x00000000; + rstate->states[R600_RASTERIZER__PA_SU_POLY_OFFSET_FRONT_OFFSET] = 0x00000000; + rstate->states[R600_RASTERIZER__PA_SU_POLY_OFFSET_BACK_SCALE] = 0x00000000; + rstate->states[R600_RASTERIZER__PA_SU_POLY_OFFSET_BACK_OFFSET] = 0x00000000; + if (radeon_state_pm4(rstate)) { + radeon_state_decref(rstate); + return NULL; + } + return rstate; +} + +static void r600_bind_rs_state(struct pipe_context *ctx, void *state) +{ + struct r600_context *rctx = (struct r600_context*)ctx; + radeon_draw_set(rctx->draw, state); +} + +static void *r600_create_sampler_state(struct pipe_context *ctx, + const struct pipe_sampler_state *state) +{ + return NULL; +} + +static void r600_bind_sampler_states(struct pipe_context *ctx, + unsigned count, void **states) +{ +} + +static void r600_set_sampler_textures(struct pipe_context *ctx, + unsigned count, + struct pipe_texture **texture) +{ +} + +static void r600_set_scissor_state(struct pipe_context *ctx, + const struct pipe_scissor_state *state) +{ + struct r600_screen *rscreen = (struct r600_screen*)ctx->screen; + struct r600_context *rctx = (struct r600_context*)ctx; + struct radeon_state *rstate; + u32 tl, br; + + tl = S_028240_TL_X(state->minx) | S_028240_TL_Y(state->miny) | S_028240_WINDOW_OFFSET_DISABLE(1); + br = S_028244_BR_X(state->maxx) | S_028244_BR_Y(state->maxy); + rstate = radeon_state(rscreen->rw, R600_SCISSOR_TYPE, R600_SCISSOR); + if (rstate == NULL) + return; + rstate->states[R600_SCISSOR__PA_SC_SCREEN_SCISSOR_TL] = tl; + rstate->states[R600_SCISSOR__PA_SC_SCREEN_SCISSOR_BR] = br; + rstate->states[R600_SCISSOR__PA_SC_WINDOW_OFFSET] = 0x00000000; + rstate->states[R600_SCISSOR__PA_SC_WINDOW_SCISSOR_TL] = tl; + rstate->states[R600_SCISSOR__PA_SC_WINDOW_SCISSOR_BR] = br; + rstate->states[R600_SCISSOR__PA_SC_CLIPRECT_RULE] = 0x0000FFFF; + rstate->states[R600_SCISSOR__PA_SC_CLIPRECT_0_TL] = tl; + rstate->states[R600_SCISSOR__PA_SC_CLIPRECT_0_BR] = br; + rstate->states[R600_SCISSOR__PA_SC_CLIPRECT_1_TL] = tl; + rstate->states[R600_SCISSOR__PA_SC_CLIPRECT_1_BR] = br; + rstate->states[R600_SCISSOR__PA_SC_CLIPRECT_2_TL] = tl; + rstate->states[R600_SCISSOR__PA_SC_CLIPRECT_2_BR] = br; + rstate->states[R600_SCISSOR__PA_SC_CLIPRECT_3_TL] = tl; + rstate->states[R600_SCISSOR__PA_SC_CLIPRECT_3_BR] = br; + rstate->states[R600_SCISSOR__PA_SC_EDGERULE] = 0xAAAAAAAA; + rstate->states[R600_SCISSOR__PA_SC_GENERIC_SCISSOR_TL] = tl; + rstate->states[R600_SCISSOR__PA_SC_GENERIC_SCISSOR_BR] = br; + rstate->states[R600_SCISSOR__PA_SC_VPORT_SCISSOR_0_TL] = tl; + rstate->states[R600_SCISSOR__PA_SC_VPORT_SCISSOR_0_BR] = br; + if (radeon_state_pm4(rstate)) { + radeon_state_decref(rstate); + return; + } + radeon_draw_set_new(rctx->draw, rstate); +} + +static void r600_set_viewport_state(struct pipe_context *ctx, + const struct pipe_viewport_state *state) +{ + struct r600_screen *rscreen = (struct r600_screen*)ctx->screen; + struct r600_context *rctx = (struct r600_context*)ctx; + struct radeon_state *rstate; + + rstate = radeon_state(rscreen->rw, R600_VIEWPORT_TYPE, R600_VIEWPORT); + if (rstate == NULL) + return; + rstate->states[R600_VIEWPORT__PA_SC_VPORT_ZMIN_0] = 0x00000000; + rstate->states[R600_VIEWPORT__PA_SC_VPORT_ZMAX_0] = 0x3F800000; + rstate->states[R600_VIEWPORT__PA_CL_VPORT_XSCALE_0] = r600_float_to_u32(state->scale[0]); + rstate->states[R600_VIEWPORT__PA_CL_VPORT_YSCALE_0] = r600_float_to_u32(state->scale[1]); + rstate->states[R600_VIEWPORT__PA_CL_VPORT_ZSCALE_0] = r600_float_to_u32(state->scale[2]); + rstate->states[R600_VIEWPORT__PA_CL_VPORT_XOFFSET_0] = r600_float_to_u32(state->translate[0]); + rstate->states[R600_VIEWPORT__PA_CL_VPORT_YOFFSET_0] = r600_float_to_u32(state->translate[1]); + rstate->states[R600_VIEWPORT__PA_CL_VPORT_ZOFFSET_0] = r600_float_to_u32(state->translate[2]); + rstate->states[R600_VIEWPORT__PA_CL_VTE_CNTL] = 0x0000043F; + if (radeon_state_pm4(rstate)) { + radeon_state_decref(rstate); + return; + } + radeon_draw_set_new(rctx->draw, rstate); +} + +static void r600_set_vertex_buffers(struct pipe_context *ctx, + unsigned count, + const struct pipe_vertex_buffer *buffers) +{ + struct r600_context *rctx = (struct r600_context*)ctx; + + memcpy(rctx->vertex_buffer, buffers, sizeof(struct pipe_vertex_buffer) * count); + rctx->nvertex_buffer = count; +} + +static void r600_set_vertex_elements(struct pipe_context *ctx, + unsigned count, + const struct pipe_vertex_element *elements) +{ + struct r600_context *rctx = (struct r600_context*)ctx; + + memcpy(rctx->vertex_element, elements, sizeof(struct pipe_vertex_element) * count); + rctx->nvertex_element = count; +} + +static void *r600_create_dsa_state(struct pipe_context *ctx, + const struct pipe_depth_stencil_alpha_state *state) +{ + struct r600_screen *rscreen = (struct r600_screen*)ctx->screen; + struct radeon_state *rstate; + + rstate = radeon_state(rscreen->rw, R600_DSA_TYPE, R600_DSA); + if (rstate == NULL) + return NULL; + rstate->states[R600_DSA__DB_STENCIL_CLEAR] = 0x00000000; + rstate->states[R600_DSA__DB_DEPTH_CLEAR] = 0x3F800000; + rstate->states[R600_DSA__SX_ALPHA_TEST_CONTROL] = 0x00000000; + rstate->states[R600_DSA__DB_STENCILREFMASK] = 0xFFFFFF00; + rstate->states[R600_DSA__DB_STENCILREFMASK_BF] = 0xFFFFFF00; + rstate->states[R600_DSA__SX_ALPHA_REF] = 0x00000000; + rstate->states[R600_DSA__SPI_FOG_FUNC_SCALE] = 0x00000000; + rstate->states[R600_DSA__SPI_FOG_FUNC_BIAS] = 0x00000000; + rstate->states[R600_DSA__SPI_FOG_CNTL] = 0x00000000; + rstate->states[R600_DSA__DB_DEPTH_CONTROL] = 0x00700700; + rstate->states[R600_DSA__DB_SHADER_CONTROL] = 0x00000210; + rstate->states[R600_DSA__DB_RENDER_CONTROL] = 0x00000060; + rstate->states[R600_DSA__DB_RENDER_OVERRIDE] = 0x0000002A; + rstate->states[R600_DSA__DB_SRESULTS_COMPARE_STATE1] = 0x00000000; + rstate->states[R600_DSA__DB_PRELOAD_CONTROL] = 0x00000000; + rstate->states[R600_DSA__DB_ALPHA_TO_MASK] = 0x0000AA00; + if (radeon_state_pm4(rstate)) { + radeon_state_decref(rstate); + return NULL; + } + return rstate; +} + +static void r600_bind_dsa_state(struct pipe_context *ctx, void *state) +{ + struct r600_context *rctx = (struct r600_context*)ctx; + radeon_draw_set(rctx->draw, state); +} + +static void r600_set_constant_buffer(struct pipe_context *ctx, + uint shader, uint index, + struct pipe_buffer *buffer) +{ + struct r600_screen *rscreen = (struct r600_screen*)ctx->screen; + struct r600_context *rctx = (struct r600_context*)ctx; + unsigned nconstant = 0, i, type, id; + struct radeon_state *rstate; + u32 *ptr; + + switch (shader) { + case PIPE_SHADER_VERTEX: + id = R600_VS_CONSTANT; + type = R600_VS_CONSTANT_TYPE; + break; + case PIPE_SHADER_FRAGMENT: + id = R600_PS_CONSTANT; + type = R600_PS_CONSTANT_TYPE; + break; + default: + fprintf(stderr, "%s:%d unsupported %d\n", __func__, __LINE__, shader); + return; + } + if (buffer && buffer->size > 0) { + nconstant = buffer->size / 16; + ptr = pipe_buffer_map(ctx->screen, buffer, PIPE_BUFFER_USAGE_CPU_READ); + if (ptr == NULL) + return; + for (i = 0; i < nconstant; i++) { + rstate = radeon_state(rscreen->rw, type, id + i); + if (rstate == NULL) + return; + rstate->states[R600_PS_CONSTANT__SQ_ALU_CONSTANT0_0] = ptr[i * 4 + 0]; + rstate->states[R600_PS_CONSTANT__SQ_ALU_CONSTANT1_0] = ptr[i * 4 + 1]; + rstate->states[R600_PS_CONSTANT__SQ_ALU_CONSTANT2_0] = ptr[i * 4 + 2]; + rstate->states[R600_PS_CONSTANT__SQ_ALU_CONSTANT3_0] = ptr[i * 4 + 3]; + if (radeon_state_pm4(rstate)) + return; + if (radeon_draw_set_new(rctx->draw, rstate)) + return; + } + pipe_buffer_unmap(ctx->screen, buffer); + } +} + +static void r600_set_stencil_ref(struct pipe_context *ctx, + const struct pipe_stencil_ref *sr) +{ + struct r600_context *rctx = (struct r600_context*)ctx; + rctx->stencil_ref = *sr; +} + +void r600_init_state_functions(struct r600_context *rctx) +{ + rctx->context.create_blend_state = r600_create_blend_state; + rctx->context.bind_blend_state = r600_bind_blend_state; + rctx->context.delete_blend_state = r600_delete_state; + rctx->context.set_blend_color = r600_set_blend_color; + rctx->context.set_clip_state = r600_set_clip_state; + rctx->context.set_constant_buffer = r600_set_constant_buffer; + rctx->context.create_depth_stencil_alpha_state = r600_create_dsa_state; + rctx->context.bind_depth_stencil_alpha_state = r600_bind_dsa_state; + rctx->context.delete_depth_stencil_alpha_state = r600_delete_state; + rctx->context.set_framebuffer_state = r600_set_framebuffer_state; + rctx->context.create_fs_state = r600_create_fs_state; + rctx->context.bind_fs_state = r600_bind_fs_state; + rctx->context.delete_fs_state = r600_delete_state; + rctx->context.set_polygon_stipple = r600_set_polygon_stipple; + rctx->context.create_rasterizer_state = r600_create_rs_state; + rctx->context.bind_rasterizer_state = r600_bind_rs_state; + rctx->context.delete_rasterizer_state = r600_delete_state; + rctx->context.create_sampler_state = r600_create_sampler_state; + rctx->context.bind_fragment_sampler_states = r600_bind_sampler_states; + rctx->context.bind_vertex_sampler_states = r600_bind_sampler_states; + rctx->context.delete_sampler_state = r600_delete_state; + rctx->context.set_fragment_sampler_textures = r600_set_sampler_textures; + rctx->context.set_scissor_state = r600_set_scissor_state; + rctx->context.set_viewport_state = r600_set_viewport_state; + rctx->context.set_vertex_buffers = r600_set_vertex_buffers; + rctx->context.set_vertex_elements = r600_set_vertex_elements; + rctx->context.create_vs_state = r600_create_vs_state; + rctx->context.bind_vs_state = r600_bind_vs_state; + rctx->context.delete_vs_state = r600_delete_state; + rctx->context.set_stencil_ref = r600_set_stencil_ref; +} diff --git a/src/gallium/drivers/r600/r600_texture.c b/src/gallium/drivers/r600/r600_texture.c new file mode 100644 index 00000000000..708f9effa32 --- /dev/null +++ b/src/gallium/drivers/r600/r600_texture.c @@ -0,0 +1,198 @@ +/* + * Copyright 2010 Jerome Glisse + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Jerome Glisse + * Corbin Simpson + */ +#include +#include +#include +#include +#include +#include "r600_screen.h" +#include "r600_texture.h" + +unsigned long r600_texture_get_offset(struct r600_texture *rtex, unsigned level, unsigned zslice, unsigned face) +{ + unsigned long offset = rtex->offset[level]; + + switch (rtex->tex.target) { + case PIPE_TEXTURE_3D: + assert(face == 0); + return offset + zslice * rtex->layer_size[level]; + case PIPE_TEXTURE_CUBE: + assert(zslice == 0); + return offset + face * rtex->layer_size[level]; + default: + assert(zslice == 0 && face == 0); + return offset; + } +} + +static void r600_setup_miptree(struct r600_screen *rscreen, struct r600_texture *rtex) +{ + struct pipe_texture *ptex = &rtex->tex; + unsigned long w, h, stride, size, layer_size, i, offset; + + for (i = 0, offset = 0; i <= ptex->last_level; i++) { + w = u_minify(ptex->width0, i); + h = u_minify(ptex->height0, i); + stride = align(util_format_get_stride(ptex->format, w), 32); + layer_size = stride * h; + if (ptex->target == PIPE_TEXTURE_CUBE) + size = layer_size * 6; + else + size = layer_size * u_minify(ptex->depth0, i); + rtex->offset[i] = offset; + rtex->layer_size[i] = layer_size; + rtex->pitch[i] = stride / util_format_get_blocksize(ptex->format); + rtex->stride[i] = stride; + offset += align(size, 32); + } + rtex->size = offset; +} + +static struct pipe_texture *r600_texture_create(struct pipe_screen *screen, const struct pipe_texture *template) +{ + struct r600_texture *rtex = CALLOC_STRUCT(r600_texture); + struct r600_screen *rscreen = r600_screen(screen); + + if (!rtex) { + return NULL; + } + rtex->tex = *template; + pipe_reference_init(&rtex->tex.reference, 1); + rtex->tex.screen = screen; + r600_setup_miptree(rscreen, rtex); + rtex->buffer = screen->buffer_create(screen, 4096, PIPE_BUFFER_USAGE_PIXEL, rtex->size); + if (!rtex->buffer) { + FREE(rtex); + return NULL; + } + return (struct pipe_texture*)&rtex->tex; +} + +static void r600_texture_destroy(struct pipe_texture *ptex) +{ + struct r600_texture *rtex = (struct r600_texture*)ptex; + + pipe_buffer_reference(&rtex->buffer, NULL); + FREE(rtex); +} + +static struct pipe_surface *r600_get_tex_surface(struct pipe_screen *screen, + struct pipe_texture *texture, + unsigned face, unsigned level, + unsigned zslice, unsigned flags) +{ + struct r600_texture *rtex = (struct r600_texture*)texture; + struct pipe_surface *surface = CALLOC_STRUCT(pipe_surface); + unsigned long offset; + + if (surface == NULL) + return NULL; + offset = r600_texture_get_offset(rtex, level, zslice, face); + pipe_reference_init(&surface->reference, 1); + pipe_texture_reference(&surface->texture, texture); + surface->format = texture->format; + surface->width = u_minify(texture->width0, level); + surface->height = u_minify(texture->height0, level); + surface->offset = offset; + surface->usage = flags; + surface->zslice = zslice; + surface->texture = texture; + surface->face = face; + surface->level = level; + return surface; +} + +static void r600_tex_surface_destroy(struct pipe_surface *surface) +{ + pipe_texture_reference(&surface->texture, NULL); + FREE(surface); +} + +static struct pipe_texture *r600_texture_blanket(struct pipe_screen *screen, + const struct pipe_texture *base, + const unsigned *stride, + struct pipe_buffer *buffer) +{ + struct r600_texture *rtex; + + /* Support only 2D textures without mipmaps */ + if (base->target != PIPE_TEXTURE_2D || base->depth0 != 1 || base->last_level != 0) + return NULL; + rtex = CALLOC_STRUCT(r600_texture); + if (rtex == NULL) + return NULL; + rtex->tex = *base; + pipe_reference_init(&rtex->tex.reference, 1); + rtex->tex.screen = screen; + rtex->stride_override = *stride; + rtex->pitch[0] = *stride / util_format_get_blocksize(base->format); + rtex->stride[0] = *stride; + rtex->offset[0] = 0; + rtex->size = align(rtex->stride[0] * base->height0, 32); + pipe_buffer_reference(&rtex->buffer, buffer); + return &rtex->tex; +} + +static struct pipe_video_surface *r600_video_surface_create(struct pipe_screen *screen, + enum pipe_video_chroma_format chroma_format, + unsigned width, unsigned height) +{ + return NULL; +} + +static void r600_video_surface_destroy(struct pipe_video_surface *vsfc) +{ + FREE(vsfc); +} + +void r600_init_screen_texture_functions(struct pipe_screen *screen) +{ + screen->texture_create = r600_texture_create; + screen->texture_destroy = r600_texture_destroy; + screen->get_tex_surface = r600_get_tex_surface; + screen->tex_surface_destroy = r600_tex_surface_destroy; + screen->texture_blanket = r600_texture_blanket; + screen->video_surface_create = r600_video_surface_create; + screen->video_surface_destroy= r600_video_surface_destroy; +} + +boolean r600_get_texture_buffer(struct pipe_screen *screen, + struct pipe_texture *texture, + struct pipe_buffer **buffer, + unsigned *stride) +{ + struct r600_texture *rtex = (struct r600_texture*)texture; + + if (rtex == NULL) { + return FALSE; + } + pipe_buffer_reference(buffer, rtex->buffer); + if (stride) { + *stride = rtex->stride[0]; + } + return TRUE; +} diff --git a/src/gallium/drivers/r600/r600_texture.h b/src/gallium/drivers/r600/r600_texture.h new file mode 100644 index 00000000000..a4424161ebc --- /dev/null +++ b/src/gallium/drivers/r600/r600_texture.h @@ -0,0 +1,46 @@ +/* + * Copyright 2010 Jerome Glisse + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + */ +#ifndef R600_TEXTURE_H +#define R600_TEXTURE_H + +#include + +struct r600_texture { + struct pipe_texture tex; + unsigned long offset[PIPE_MAX_TEXTURE_LEVELS]; + unsigned long pitch[PIPE_MAX_TEXTURE_LEVELS]; + unsigned long stride[PIPE_MAX_TEXTURE_LEVELS]; + unsigned long layer_size[PIPE_MAX_TEXTURE_LEVELS]; + unsigned long stride_override; + unsigned long size; + struct pipe_buffer *buffer; +}; + +unsigned long r600_texture_get_offset(struct r600_texture *rtex, unsigned level, unsigned zslice, unsigned face); +void r600_init_screen_texture_functions(struct pipe_screen *screen); +boolean r600_get_texture_buffer(struct pipe_screen *screen, + struct pipe_texture *texture, + struct pipe_buffer **buffer, + unsigned *stride); + +#endif diff --git a/src/gallium/drivers/r600/r600d.h b/src/gallium/drivers/r600/r600d.h new file mode 100644 index 00000000000..d2c7248ff2b --- /dev/null +++ b/src/gallium/drivers/r600/r600d.h @@ -0,0 +1,677 @@ +/* + * Copyright 2010 Jerome Glisse + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Jerome Glisse + */ +#ifndef R600D_H +#define R600D_H + +#define PKT3_NOP 0x10 +#define PKT3_INDIRECT_BUFFER_END 0x17 +#define PKT3_SET_PREDICATION 0x20 +#define PKT3_REG_RMW 0x21 +#define PKT3_COND_EXEC 0x22 +#define PKT3_PRED_EXEC 0x23 +#define PKT3_START_3D_CMDBUF 0x24 +#define PKT3_DRAW_INDEX_2 0x27 +#define PKT3_CONTEXT_CONTROL 0x28 +#define PKT3_DRAW_INDEX_IMMD_BE 0x29 +#define PKT3_INDEX_TYPE 0x2A +#define PKT3_DRAW_INDEX 0x2B +#define PKT3_DRAW_INDEX_AUTO 0x2D +#define PKT3_DRAW_INDEX_IMMD 0x2E +#define PKT3_NUM_INSTANCES 0x2F +#define PKT3_STRMOUT_BUFFER_UPDATE 0x34 +#define PKT3_INDIRECT_BUFFER_MP 0x38 +#define PKT3_MEM_SEMAPHORE 0x39 +#define PKT3_MPEG_INDEX 0x3A +#define PKT3_WAIT_REG_MEM 0x3C +#define PKT3_MEM_WRITE 0x3D +#define PKT3_INDIRECT_BUFFER 0x32 +#define PKT3_CP_INTERRUPT 0x40 +#define PKT3_SURFACE_SYNC 0x43 +#define PKT3_ME_INITIALIZE 0x44 +#define PKT3_COND_WRITE 0x45 +#define PKT3_EVENT_WRITE 0x46 +#define PKT3_EVENT_WRITE_EOP 0x47 +#define PKT3_ONE_REG_WRITE 0x57 +#define PKT3_SET_CONFIG_REG 0x68 +#define PKT3_SET_CONTEXT_REG 0x69 +#define PKT3_SET_ALU_CONST 0x6A +#define PKT3_SET_BOOL_CONST 0x6B +#define PKT3_SET_LOOP_CONST 0x6C +#define PKT3_SET_RESOURCE 0x6D +#define PKT3_SET_SAMPLER 0x6E +#define PKT3_SET_CTL_CONST 0x6F +#define PKT3_SURFACE_BASE_UPDATE 0x73 + +#define PKT_TYPE_S(x) (((x) & 0x3) << 30) +#define PKT_TYPE_G(x) (((x) >> 30) & 0x3) +#define PKT_TYPE_C 0x3FFFFFFF +#define PKT_COUNT_S(x) (((x) & 0x3FFF) << 16) +#define PKT_COUNT_G(x) (((x) >> 16) & 0x3FFF) +#define PKT_COUNT_C 0xC000FFFF +#define PKT0_BASE_INDEX_S(x) (((x) & 0xFFFF) << 0) +#define PKT0_BASE_INDEX_G(x) (((x) >> 0) & 0xFFFF) +#define PKT0_BASE_INDEX_C 0xFFFF0000 +#define PKT3_IT_OPCODE_S(x) (((x) & 0xFF) << 8) +#define PKT3_IT_OPCODE_G(x) (((x) >> 8) & 0xFF) +#define PKT3_IT_OPCODE_C 0xFFFF00FF +#define PKT0(index, count) (PKT_TYPE_S(0) | PKT0_BASE_INDEX_S(index) | PKT_COUNT_S(count)) +#define PKT3(op, count) (PKT_TYPE_S(3) | PKT3_IT_OPCODE_S(op) | PKT_COUNT_S(count)) + +/* Registers */ +#define R_0280A0_CB_COLOR0_INFO 0x0280A0 +#define S_0280A0_ENDIAN(x) (((x) & 0x3) << 0) +#define G_0280A0_ENDIAN(x) (((x) >> 0) & 0x3) +#define C_0280A0_ENDIAN 0xFFFFFFFC +#define S_0280A0_FORMAT(x) (((x) & 0x3F) << 2) +#define G_0280A0_FORMAT(x) (((x) >> 2) & 0x3F) +#define C_0280A0_FORMAT 0xFFFFFF03 +#define V_0280A0_COLOR_INVALID 0x00000000 +#define V_0280A0_COLOR_8 0x00000001 +#define V_0280A0_COLOR_4_4 0x00000002 +#define V_0280A0_COLOR_3_3_2 0x00000003 +#define V_0280A0_COLOR_16 0x00000005 +#define V_0280A0_COLOR_16_FLOAT 0x00000006 +#define V_0280A0_COLOR_8_8 0x00000007 +#define V_0280A0_COLOR_5_6_5 0x00000008 +#define V_0280A0_COLOR_6_5_5 0x00000009 +#define V_0280A0_COLOR_1_5_5_5 0x0000000A +#define V_0280A0_COLOR_4_4_4_4 0x0000000B +#define V_0280A0_COLOR_5_5_5_1 0x0000000C +#define V_0280A0_COLOR_32 0x0000000D +#define V_0280A0_COLOR_32_FLOAT 0x0000000E +#define V_0280A0_COLOR_16_16 0x0000000F +#define V_0280A0_COLOR_16_16_FLOAT 0x00000010 +#define V_0280A0_COLOR_8_24 0x00000011 +#define V_0280A0_COLOR_8_24_FLOAT 0x00000012 +#define V_0280A0_COLOR_24_8 0x00000013 +#define V_0280A0_COLOR_24_8_FLOAT 0x00000014 +#define V_0280A0_COLOR_10_11_11 0x00000015 +#define V_0280A0_COLOR_10_11_11_FLOAT 0x00000016 +#define V_0280A0_COLOR_11_11_10 0x00000017 +#define V_0280A0_COLOR_11_11_10_FLOAT 0x00000018 +#define V_0280A0_COLOR_2_10_10_10 0x00000019 +#define V_0280A0_COLOR_8_8_8_8 0x0000001A +#define V_0280A0_COLOR_10_10_10_2 0x0000001B +#define V_0280A0_COLOR_X24_8_32_FLOAT 0x0000001C +#define V_0280A0_COLOR_32_32 0x0000001D +#define V_0280A0_COLOR_32_32_FLOAT 0x0000001E +#define V_0280A0_COLOR_16_16_16_16 0x0000001F +#define V_0280A0_COLOR_16_16_16_16_FLOAT 0x00000020 +#define V_0280A0_COLOR_32_32_32_32 0x00000022 +#define V_0280A0_COLOR_32_32_32_32_FLOAT 0x00000023 +#define S_0280A0_ARRAY_MODE(x) (((x) & 0xF) << 8) +#define G_0280A0_ARRAY_MODE(x) (((x) >> 8) & 0xF) +#define C_0280A0_ARRAY_MODE 0xFFFFF0FF +#define V_0280A0_ARRAY_LINEAR_GENERAL 0x00000000 +#define V_0280A0_ARRAY_LINEAR_ALIGNED 0x00000001 +#define V_0280A0_ARRAY_1D_TILED_THIN1 0x00000002 +#define V_0280A0_ARRAY_2D_TILED_THIN1 0x00000004 +#define S_0280A0_NUMBER_TYPE(x) (((x) & 0x7) << 12) +#define G_0280A0_NUMBER_TYPE(x) (((x) >> 12) & 0x7) +#define C_0280A0_NUMBER_TYPE 0xFFFF8FFF +#define S_0280A0_READ_SIZE(x) (((x) & 0x1) << 15) +#define G_0280A0_READ_SIZE(x) (((x) >> 15) & 0x1) +#define C_0280A0_READ_SIZE 0xFFFF7FFF +#define S_0280A0_COMP_SWAP(x) (((x) & 0x3) << 16) +#define G_0280A0_COMP_SWAP(x) (((x) >> 16) & 0x3) +#define C_0280A0_COMP_SWAP 0xFFFCFFFF +#define S_0280A0_TILE_MODE(x) (((x) & 0x3) << 18) +#define G_0280A0_TILE_MODE(x) (((x) >> 18) & 0x3) +#define C_0280A0_TILE_MODE 0xFFF3FFFF +#define S_0280A0_BLEND_CLAMP(x) (((x) & 0x1) << 20) +#define G_0280A0_BLEND_CLAMP(x) (((x) >> 20) & 0x1) +#define C_0280A0_BLEND_CLAMP 0xFFEFFFFF +#define S_0280A0_CLEAR_COLOR(x) (((x) & 0x1) << 21) +#define G_0280A0_CLEAR_COLOR(x) (((x) >> 21) & 0x1) +#define C_0280A0_CLEAR_COLOR 0xFFDFFFFF +#define S_0280A0_BLEND_BYPASS(x) (((x) & 0x1) << 22) +#define G_0280A0_BLEND_BYPASS(x) (((x) >> 22) & 0x1) +#define C_0280A0_BLEND_BYPASS 0xFFBFFFFF +#define S_0280A0_BLEND_FLOAT32(x) (((x) & 0x1) << 23) +#define G_0280A0_BLEND_FLOAT32(x) (((x) >> 23) & 0x1) +#define C_0280A0_BLEND_FLOAT32 0xFF7FFFFF +#define S_0280A0_SIMPLE_FLOAT(x) (((x) & 0x1) << 24) +#define G_0280A0_SIMPLE_FLOAT(x) (((x) >> 24) & 0x1) +#define C_0280A0_SIMPLE_FLOAT 0xFEFFFFFF +#define S_0280A0_ROUND_MODE(x) (((x) & 0x1) << 25) +#define G_0280A0_ROUND_MODE(x) (((x) >> 25) & 0x1) +#define C_0280A0_ROUND_MODE 0xFDFFFFFF +#define S_0280A0_TILE_COMPACT(x) (((x) & 0x1) << 26) +#define G_0280A0_TILE_COMPACT(x) (((x) >> 26) & 0x1) +#define C_0280A0_TILE_COMPACT 0xFBFFFFFF +#define S_0280A0_SOURCE_FORMAT(x) (((x) & 0x1) << 27) +#define G_0280A0_SOURCE_FORMAT(x) (((x) >> 27) & 0x1) +#define C_0280A0_SOURCE_FORMAT 0xF7FFFFFF +#define R_028060_CB_COLOR0_SIZE 0x028060 +#define S_028060_PITCH_TILE_MAX(x) (((x) & 0x3FF) << 0) +#define G_028060_PITCH_TILE_MAX(x) (((x) >> 0) & 0x3FF) +#define C_028060_PITCH_TILE_MAX 0xFFFFFC00 +#define S_028060_SLICE_TILE_MAX(x) (((x) & 0xFFFFF) << 10) +#define G_028060_SLICE_TILE_MAX(x) (((x) >> 10) & 0xFFFFF) +#define C_028060_SLICE_TILE_MAX 0xC00003FF +#define R_028800_DB_DEPTH_CONTROL 0x028800 +#define S_028800_STENCIL_ENABLE(x) (((x) & 0x1) << 0) +#define G_028800_STENCIL_ENABLE(x) (((x) >> 0) & 0x1) +#define C_028800_STENCIL_ENABLE 0xFFFFFFFE +#define S_028800_Z_ENABLE(x) (((x) & 0x1) << 1) +#define G_028800_Z_ENABLE(x) (((x) >> 1) & 0x1) +#define C_028800_Z_ENABLE 0xFFFFFFFD +#define S_028800_Z_WRITE_ENABLE(x) (((x) & 0x1) << 2) +#define G_028800_Z_WRITE_ENABLE(x) (((x) >> 2) & 0x1) +#define C_028800_Z_WRITE_ENABLE 0xFFFFFFFB +#define S_028800_ZFUNC(x) (((x) & 0x7) << 4) +#define G_028800_ZFUNC(x) (((x) >> 4) & 0x7) +#define C_028800_ZFUNC 0xFFFFFF8F +#define S_028800_BACKFACE_ENABLE(x) (((x) & 0x1) << 7) +#define G_028800_BACKFACE_ENABLE(x) (((x) >> 7) & 0x1) +#define C_028800_BACKFACE_ENABLE 0xFFFFFF7F +#define S_028800_STENCILFUNC(x) (((x) & 0x7) << 8) +#define G_028800_STENCILFUNC(x) (((x) >> 8) & 0x7) +#define C_028800_STENCILFUNC 0xFFFFF8FF +#define S_028800_STENCILFAIL(x) (((x) & 0x7) << 11) +#define G_028800_STENCILFAIL(x) (((x) >> 11) & 0x7) +#define C_028800_STENCILFAIL 0xFFFFC7FF +#define S_028800_STENCILZPASS(x) (((x) & 0x7) << 14) +#define G_028800_STENCILZPASS(x) (((x) >> 14) & 0x7) +#define C_028800_STENCILZPASS 0xFFFE3FFF +#define S_028800_STENCILZFAIL(x) (((x) & 0x7) << 17) +#define G_028800_STENCILZFAIL(x) (((x) >> 17) & 0x7) +#define C_028800_STENCILZFAIL 0xFFF1FFFF +#define S_028800_STENCILFUNC_BF(x) (((x) & 0x7) << 20) +#define G_028800_STENCILFUNC_BF(x) (((x) >> 20) & 0x7) +#define C_028800_STENCILFUNC_BF 0xFF8FFFFF +#define S_028800_STENCILFAIL_BF(x) (((x) & 0x7) << 23) +#define G_028800_STENCILFAIL_BF(x) (((x) >> 23) & 0x7) +#define C_028800_STENCILFAIL_BF 0xFC7FFFFF +#define S_028800_STENCILZPASS_BF(x) (((x) & 0x7) << 26) +#define G_028800_STENCILZPASS_BF(x) (((x) >> 26) & 0x7) +#define C_028800_STENCILZPASS_BF 0xE3FFFFFF +#define S_028800_STENCILZFAIL_BF(x) (((x) & 0x7) << 29) +#define G_028800_STENCILZFAIL_BF(x) (((x) >> 29) & 0x7) +#define C_028800_STENCILZFAIL_BF 0x1FFFFFFF +#define R_028010_DB_DEPTH_INFO 0x028010 +#define S_028010_FORMAT(x) (((x) & 0x7) << 0) +#define G_028010_FORMAT(x) (((x) >> 0) & 0x7) +#define C_028010_FORMAT 0xFFFFFFF8 +#define V_028010_DEPTH_INVALID 0x00000000 +#define V_028010_DEPTH_16 0x00000001 +#define V_028010_DEPTH_X8_24 0x00000002 +#define V_028010_DEPTH_8_24 0x00000003 +#define V_028010_DEPTH_X8_24_FLOAT 0x00000004 +#define V_028010_DEPTH_8_24_FLOAT 0x00000005 +#define V_028010_DEPTH_32_FLOAT 0x00000006 +#define V_028010_DEPTH_X24_8_32_FLOAT 0x00000007 +#define S_028010_READ_SIZE(x) (((x) & 0x1) << 3) +#define G_028010_READ_SIZE(x) (((x) >> 3) & 0x1) +#define C_028010_READ_SIZE 0xFFFFFFF7 +#define S_028010_ARRAY_MODE(x) (((x) & 0xF) << 15) +#define G_028010_ARRAY_MODE(x) (((x) >> 15) & 0xF) +#define C_028010_ARRAY_MODE 0xFFF87FFF +#define S_028010_TILE_SURFACE_ENABLE(x) (((x) & 0x1) << 25) +#define G_028010_TILE_SURFACE_ENABLE(x) (((x) >> 25) & 0x1) +#define C_028010_TILE_SURFACE_ENABLE 0xFDFFFFFF +#define S_028010_TILE_COMPACT(x) (((x) & 0x1) << 26) +#define G_028010_TILE_COMPACT(x) (((x) >> 26) & 0x1) +#define C_028010_TILE_COMPACT 0xFBFFFFFF +#define S_028010_ZRANGE_PRECISION(x) (((x) & 0x1) << 31) +#define G_028010_ZRANGE_PRECISION(x) (((x) >> 31) & 0x1) +#define C_028010_ZRANGE_PRECISION 0x7FFFFFFF +#define R_028000_DB_DEPTH_SIZE 0x028000 +#define S_028000_PITCH_TILE_MAX(x) (((x) & 0x3FF) << 0) +#define G_028000_PITCH_TILE_MAX(x) (((x) >> 0) & 0x3FF) +#define C_028000_PITCH_TILE_MAX 0xFFFFFC00 +#define S_028000_SLICE_TILE_MAX(x) (((x) & 0xFFFFF) << 10) +#define G_028000_SLICE_TILE_MAX(x) (((x) >> 10) & 0xFFFFF) +#define C_028000_SLICE_TILE_MAX 0xC00003FF +#define R_028004_DB_DEPTH_VIEW 0x028004 +#define S_028004_SLICE_START(x) (((x) & 0x7FF) << 0) +#define G_028004_SLICE_START(x) (((x) >> 0) & 0x7FF) +#define C_028004_SLICE_START 0xFFFFF800 +#define S_028004_SLICE_MAX(x) (((x) & 0x7FF) << 13) +#define G_028004_SLICE_MAX(x) (((x) >> 13) & 0x7FF) +#define C_028004_SLICE_MAX 0xFF001FFF +#define R_028D24_DB_HTILE_SURFACE 0x028D24 +#define S_028D24_HTILE_WIDTH(x) (((x) & 0x1) << 0) +#define G_028D24_HTILE_WIDTH(x) (((x) >> 0) & 0x1) +#define C_028D24_HTILE_WIDTH 0xFFFFFFFE +#define S_028D24_HTILE_HEIGHT(x) (((x) & 0x1) << 1) +#define G_028D24_HTILE_HEIGHT(x) (((x) >> 1) & 0x1) +#define C_028D24_HTILE_HEIGHT 0xFFFFFFFD +#define S_028D24_LINEAR(x) (((x) & 0x1) << 2) +#define G_028D24_LINEAR(x) (((x) >> 2) & 0x1) +#define C_028D24_LINEAR 0xFFFFFFFB +#define S_028D24_FULL_CACHE(x) (((x) & 0x1) << 3) +#define G_028D24_FULL_CACHE(x) (((x) >> 3) & 0x1) +#define C_028D24_FULL_CACHE 0xFFFFFFF7 +#define S_028D24_HTILE_USES_PRELOAD_WIN(x) (((x) & 0x1) << 4) +#define G_028D24_HTILE_USES_PRELOAD_WIN(x) (((x) >> 4) & 0x1) +#define C_028D24_HTILE_USES_PRELOAD_WIN 0xFFFFFFEF +#define S_028D24_PRELOAD(x) (((x) & 0x1) << 5) +#define G_028D24_PRELOAD(x) (((x) >> 5) & 0x1) +#define C_028D24_PRELOAD 0xFFFFFFDF +#define S_028D24_PREFETCH_WIDTH(x) (((x) & 0x3F) << 6) +#define G_028D24_PREFETCH_WIDTH(x) (((x) >> 6) & 0x3F) +#define C_028D24_PREFETCH_WIDTH 0xFFFFF03F +#define S_028D24_PREFETCH_HEIGHT(x) (((x) & 0x3F) << 12) +#define G_028D24_PREFETCH_HEIGHT(x) (((x) >> 12) & 0x3F) +#define C_028D24_PREFETCH_HEIGHT 0xFFFC0FFF +#define R_028D34_DB_PREFETCH_LIMIT 0x028D34 +#define S_028D34_DEPTH_HEIGHT_TILE_MAX(x) (((x) & 0x3FF) << 0) +#define G_028D34_DEPTH_HEIGHT_TILE_MAX(x) (((x) >> 0) & 0x3FF) +#define C_028D34_DEPTH_HEIGHT_TILE_MAX 0xFFFFFC00 +#define R_028D10_DB_RENDER_OVERRIDE 0x028D10 +#define S_028D10_FORCE_HIZ_ENABLE(x) (((x) & 0x3) << 0) +#define G_028D10_FORCE_HIZ_ENABLE(x) (((x) >> 0) & 0x3) +#define C_028D10_FORCE_HIZ_ENABLE 0xFFFFFFFC +#define S_028D10_FORCE_HIS_ENABLE0(x) (((x) & 0x3) << 2) +#define G_028D10_FORCE_HIS_ENABLE0(x) (((x) >> 2) & 0x3) +#define C_028D10_FORCE_HIS_ENABLE0 0xFFFFFFF3 +#define S_028D10_FORCE_HIS_ENABLE1(x) (((x) & 0x3) << 4) +#define G_028D10_FORCE_HIS_ENABLE1(x) (((x) >> 4) & 0x3) +#define C_028D10_FORCE_HIS_ENABLE1 0xFFFFFFCF +#define S_028D10_FORCE_SHADER_Z_ORDER(x) (((x) & 0x1) << 6) +#define G_028D10_FORCE_SHADER_Z_ORDER(x) (((x) >> 6) & 0x1) +#define C_028D10_FORCE_SHADER_Z_ORDER 0xFFFFFFBF +#define S_028D10_FAST_Z_DISABLE(x) (((x) & 0x1) << 7) +#define G_028D10_FAST_Z_DISABLE(x) (((x) >> 7) & 0x1) +#define C_028D10_FAST_Z_DISABLE 0xFFFFFF7F +#define S_028D10_FAST_STENCIL_DISABLE(x) (((x) & 0x1) << 8) +#define G_028D10_FAST_STENCIL_DISABLE(x) (((x) >> 8) & 0x1) +#define C_028D10_FAST_STENCIL_DISABLE 0xFFFFFEFF +#define S_028D10_NOOP_CULL_DISABLE(x) (((x) & 0x1) << 9) +#define G_028D10_NOOP_CULL_DISABLE(x) (((x) >> 9) & 0x1) +#define C_028D10_NOOP_CULL_DISABLE 0xFFFFFDFF +#define S_028D10_FORCE_COLOR_KILL(x) (((x) & 0x1) << 10) +#define G_028D10_FORCE_COLOR_KILL(x) (((x) >> 10) & 0x1) +#define C_028D10_FORCE_COLOR_KILL 0xFFFFFBFF +#define S_028D10_FORCE_Z_READ(x) (((x) & 0x1) << 11) +#define G_028D10_FORCE_Z_READ(x) (((x) >> 11) & 0x1) +#define C_028D10_FORCE_Z_READ 0xFFFFF7FF +#define S_028D10_FORCE_STENCIL_READ(x) (((x) & 0x1) << 12) +#define G_028D10_FORCE_STENCIL_READ(x) (((x) >> 12) & 0x1) +#define C_028D10_FORCE_STENCIL_READ 0xFFFFEFFF +#define S_028D10_FORCE_FULL_Z_RANGE(x) (((x) & 0x3) << 13) +#define G_028D10_FORCE_FULL_Z_RANGE(x) (((x) >> 13) & 0x3) +#define C_028D10_FORCE_FULL_Z_RANGE 0xFFFF9FFF +#define S_028D10_FORCE_QC_SMASK_CONFLICT(x) (((x) & 0x1) << 15) +#define G_028D10_FORCE_QC_SMASK_CONFLICT(x) (((x) >> 15) & 0x1) +#define C_028D10_FORCE_QC_SMASK_CONFLICT 0xFFFF7FFF +#define S_028D10_DISABLE_VIEWPORT_CLAMP(x) (((x) & 0x1) << 16) +#define G_028D10_DISABLE_VIEWPORT_CLAMP(x) (((x) >> 16) & 0x1) +#define C_028D10_DISABLE_VIEWPORT_CLAMP 0xFFFEFFFF +#define S_028D10_IGNORE_SC_ZRANGE(x) (((x) & 0x1) << 17) +#define G_028D10_IGNORE_SC_ZRANGE(x) (((x) >> 17) & 0x1) +#define C_028D10_IGNORE_SC_ZRANGE 0xFFFDFFFF +#define R_028A40_VGT_GS_MODE 0x028A40 +#define S_028A40_MODE(x) (((x) & 0x3) << 0) +#define G_028A40_MODE(x) (((x) >> 0) & 0x3) +#define C_028A40_MODE 0xFFFFFFFC +#define S_028A40_ES_PASSTHRU(x) (((x) & 0x1) << 2) +#define G_028A40_ES_PASSTHRU(x) (((x) >> 2) & 0x1) +#define C_028A40_ES_PASSTHRU 0xFFFFFFFB +#define S_028A40_CUT_MODE(x) (((x) & 0x3) << 3) +#define G_028A40_CUT_MODE(x) (((x) >> 3) & 0x3) +#define C_028A40_CUT_MODE 0xFFFFFFE7 +#define R_008040_WAIT_UNTIL 0x008040 +#define S_008040_WAIT_CP_DMA_IDLE(x) (((x) & 0x1) << 8) +#define G_008040_WAIT_CP_DMA_IDLE(x) (((x) >> 8) & 0x1) +#define C_008040_WAIT_CP_DMA_IDLE 0xFFFFFEFF +#define S_008040_WAIT_CMDFIFO(x) (((x) & 0x1) << 10) +#define G_008040_WAIT_CMDFIFO(x) (((x) >> 10) & 0x1) +#define C_008040_WAIT_CMDFIFO 0xFFFFFBFF +#define S_008040_WAIT_2D_IDLE(x) (((x) & 0x1) << 14) +#define G_008040_WAIT_2D_IDLE(x) (((x) >> 14) & 0x1) +#define C_008040_WAIT_2D_IDLE 0xFFFFBFFF +#define S_008040_WAIT_3D_IDLE(x) (((x) & 0x1) << 15) +#define G_008040_WAIT_3D_IDLE(x) (((x) >> 15) & 0x1) +#define C_008040_WAIT_3D_IDLE 0xFFFF7FFF +#define S_008040_WAIT_2D_IDLECLEAN(x) (((x) & 0x1) << 16) +#define G_008040_WAIT_2D_IDLECLEAN(x) (((x) >> 16) & 0x1) +#define C_008040_WAIT_2D_IDLECLEAN 0xFFFEFFFF +#define S_008040_WAIT_3D_IDLECLEAN(x) (((x) & 0x1) << 17) +#define G_008040_WAIT_3D_IDLECLEAN(x) (((x) >> 17) & 0x1) +#define C_008040_WAIT_3D_IDLECLEAN 0xFFFDFFFF +#define S_008040_WAIT_EXTERN_SIG(x) (((x) & 0x1) << 19) +#define G_008040_WAIT_EXTERN_SIG(x) (((x) >> 19) & 0x1) +#define C_008040_WAIT_EXTERN_SIG 0xFFF7FFFF +#define S_008040_CMDFIFO_ENTRIES(x) (((x) & 0x1F) << 20) +#define G_008040_CMDFIFO_ENTRIES(x) (((x) >> 20) & 0x1F) +#define C_008040_CMDFIFO_ENTRIES 0xFE0FFFFF +#define R_0286CC_SPI_PS_IN_CONTROL_0 0x0286CC +#define S_0286CC_NUM_INTERP(x) (((x) & 0x3F) << 0) +#define G_0286CC_NUM_INTERP(x) (((x) >> 0) & 0x3F) +#define C_0286CC_NUM_INTERP 0xFFFFFFC0 +#define S_0286CC_POSITION_ENA(x) (((x) & 0x1) << 8) +#define G_0286CC_POSITION_ENA(x) (((x) >> 8) & 0x1) +#define C_0286CC_POSITION_ENA 0xFFFFFEFF +#define S_0286CC_POSITION_CENTROID(x) (((x) & 0x1) << 9) +#define G_0286CC_POSITION_CENTROID(x) (((x) >> 9) & 0x1) +#define C_0286CC_POSITION_CENTROID 0xFFFFFDFF +#define S_0286CC_POSITION_ADDR(x) (((x) & 0x1F) << 10) +#define G_0286CC_POSITION_ADDR(x) (((x) >> 10) & 0x1F) +#define C_0286CC_POSITION_ADDR 0xFFFF83FF +#define S_0286CC_PARAM_GEN(x) (((x) & 0xF) << 15) +#define G_0286CC_PARAM_GEN(x) (((x) >> 15) & 0xF) +#define C_0286CC_PARAM_GEN 0xFFF87FFF +#define S_0286CC_PARAM_GEN_ADDR(x) (((x) & 0x7F) << 19) +#define G_0286CC_PARAM_GEN_ADDR(x) (((x) >> 19) & 0x7F) +#define C_0286CC_PARAM_GEN_ADDR 0xFC07FFFF +#define S_0286CC_BARYC_SAMPLE_CNTL(x) (((x) & 0x3) << 26) +#define G_0286CC_BARYC_SAMPLE_CNTL(x) (((x) >> 26) & 0x3) +#define C_0286CC_BARYC_SAMPLE_CNTL 0xF3FFFFFF +#define S_0286CC_PERSP_GRADIENT_ENA(x) (((x) & 0x1) << 28) +#define G_0286CC_PERSP_GRADIENT_ENA(x) (((x) >> 28) & 0x1) +#define C_0286CC_PERSP_GRADIENT_ENA 0xEFFFFFFF +#define S_0286CC_LINEAR_GRADIENT_ENA(x) (((x) & 0x1) << 29) +#define G_0286CC_LINEAR_GRADIENT_ENA(x) (((x) >> 29) & 0x1) +#define C_0286CC_LINEAR_GRADIENT_ENA 0xDFFFFFFF +#define S_0286CC_POSITION_SAMPLE(x) (((x) & 0x1) << 30) +#define G_0286CC_POSITION_SAMPLE(x) (((x) >> 30) & 0x1) +#define C_0286CC_POSITION_SAMPLE 0xBFFFFFFF +#define S_0286CC_BARYC_AT_SAMPLE_ENA(x) (((x) & 0x1) << 31) +#define G_0286CC_BARYC_AT_SAMPLE_ENA(x) (((x) >> 31) & 0x1) +#define C_0286CC_BARYC_AT_SAMPLE_ENA 0x7FFFFFFF +#define R_0286D0_SPI_PS_IN_CONTROL_1 0x0286D0 +#define S_0286D0_GEN_INDEX_PIX(x) (((x) & 0x1) << 0) +#define G_0286D0_GEN_INDEX_PIX(x) (((x) >> 0) & 0x1) +#define C_0286D0_GEN_INDEX_PIX 0xFFFFFFFE +#define S_0286D0_GEN_INDEX_PIX_ADDR(x) (((x) & 0x7F) << 1) +#define G_0286D0_GEN_INDEX_PIX_ADDR(x) (((x) >> 1) & 0x7F) +#define C_0286D0_GEN_INDEX_PIX_ADDR 0xFFFFFF01 +#define S_0286D0_FRONT_FACE_ENA(x) (((x) & 0x1) << 8) +#define G_0286D0_FRONT_FACE_ENA(x) (((x) >> 8) & 0x1) +#define C_0286D0_FRONT_FACE_ENA 0xFFFFFEFF +#define S_0286D0_FRONT_FACE_CHAN(x) (((x) & 0x3) << 9) +#define G_0286D0_FRONT_FACE_CHAN(x) (((x) >> 9) & 0x3) +#define C_0286D0_FRONT_FACE_CHAN 0xFFFFF9FF +#define S_0286D0_FRONT_FACE_ALL_BITS(x) (((x) & 0x1) << 11) +#define G_0286D0_FRONT_FACE_ALL_BITS(x) (((x) >> 11) & 0x1) +#define C_0286D0_FRONT_FACE_ALL_BITS 0xFFFFF7FF +#define S_0286D0_FRONT_FACE_ADDR(x) (((x) & 0x1F) << 12) +#define G_0286D0_FRONT_FACE_ADDR(x) (((x) >> 12) & 0x1F) +#define C_0286D0_FRONT_FACE_ADDR 0xFFFE0FFF +#define S_0286D0_FOG_ADDR(x) (((x) & 0x7F) << 17) +#define G_0286D0_FOG_ADDR(x) (((x) >> 17) & 0x7F) +#define C_0286D0_FOG_ADDR 0xFF01FFFF +#define S_0286D0_FIXED_PT_POSITION_ENA(x) (((x) & 0x1) << 24) +#define G_0286D0_FIXED_PT_POSITION_ENA(x) (((x) >> 24) & 0x1) +#define C_0286D0_FIXED_PT_POSITION_ENA 0xFEFFFFFF +#define S_0286D0_FIXED_PT_POSITION_ADDR(x) (((x) & 0x1F) << 25) +#define G_0286D0_FIXED_PT_POSITION_ADDR(x) (((x) >> 25) & 0x1F) +#define C_0286D0_FIXED_PT_POSITION_ADDR 0xC1FFFFFF +#define R_0286C4_SPI_VS_OUT_CONFIG 0x0286C4 +#define S_0286C4_VS_PER_COMPONENT(x) (((x) & 0x1) << 0) +#define G_0286C4_VS_PER_COMPONENT(x) (((x) >> 0) & 0x1) +#define C_0286C4_VS_PER_COMPONENT 0xFFFFFFFE +#define S_0286C4_VS_EXPORT_COUNT(x) (((x) & 0x1F) << 1) +#define G_0286C4_VS_EXPORT_COUNT(x) (((x) >> 1) & 0x1F) +#define C_0286C4_VS_EXPORT_COUNT 0xFFFFFFC1 +#define S_0286C4_VS_EXPORTS_FOG(x) (((x) & 0x1) << 8) +#define G_0286C4_VS_EXPORTS_FOG(x) (((x) >> 8) & 0x1) +#define C_0286C4_VS_EXPORTS_FOG 0xFFFFFEFF +#define S_0286C4_VS_OUT_FOG_VEC_ADDR(x) (((x) & 0x1F) << 9) +#define G_0286C4_VS_OUT_FOG_VEC_ADDR(x) (((x) >> 9) & 0x1F) +#define C_0286C4_VS_OUT_FOG_VEC_ADDR 0xFFFFC1FF +#define R_028240_PA_SC_GENERIC_SCISSOR_TL 0x028240 +#define S_028240_TL_X(x) (((x) & 0x3FFF) << 0) +#define G_028240_TL_X(x) (((x) >> 0) & 0x3FFF) +#define C_028240_TL_X 0xFFFFC000 +#define S_028240_TL_Y(x) (((x) & 0x3FFF) << 16) +#define G_028240_TL_Y(x) (((x) >> 16) & 0x3FFF) +#define C_028240_TL_Y 0xC000FFFF +#define S_028240_WINDOW_OFFSET_DISABLE(x) (((x) & 0x1) << 31) +#define G_028240_WINDOW_OFFSET_DISABLE(x) (((x) >> 31) & 0x1) +#define C_028240_WINDOW_OFFSET_DISABLE 0x7FFFFFFF +#define R_028244_PA_SC_GENERIC_SCISSOR_BR 0x028244 +#define S_028244_BR_X(x) (((x) & 0x3FFF) << 0) +#define G_028244_BR_X(x) (((x) >> 0) & 0x3FFF) +#define C_028244_BR_X 0xFFFFC000 +#define S_028244_BR_Y(x) (((x) & 0x3FFF) << 16) +#define G_028244_BR_Y(x) (((x) >> 16) & 0x3FFF) +#define C_028244_BR_Y 0xC000FFFF +#define R_028030_PA_SC_SCREEN_SCISSOR_TL 0x028030 +#define S_028030_TL_X(x) (((x) & 0x7FFF) << 0) +#define G_028030_TL_X(x) (((x) >> 0) & 0x7FFF) +#define C_028030_TL_X 0xFFFF8000 +#define S_028030_TL_Y(x) (((x) & 0x7FFF) << 16) +#define G_028030_TL_Y(x) (((x) >> 16) & 0x7FFF) +#define C_028030_TL_Y 0x8000FFFF +#define R_028034_PA_SC_SCREEN_SCISSOR_BR 0x028034 +#define S_028034_BR_X(x) (((x) & 0x7FFF) << 0) +#define G_028034_BR_X(x) (((x) >> 0) & 0x7FFF) +#define C_028034_BR_X 0xFFFF8000 +#define S_028034_BR_Y(x) (((x) & 0x7FFF) << 16) +#define G_028034_BR_Y(x) (((x) >> 16) & 0x7FFF) +#define C_028034_BR_Y 0x8000FFFF +#define R_028204_PA_SC_WINDOW_SCISSOR_TL 0x028204 +#define S_028204_TL_X(x) (((x) & 0x3FFF) << 0) +#define G_028204_TL_X(x) (((x) >> 0) & 0x3FFF) +#define C_028204_TL_X 0xFFFFC000 +#define S_028204_TL_Y(x) (((x) & 0x3FFF) << 16) +#define G_028204_TL_Y(x) (((x) >> 16) & 0x3FFF) +#define C_028204_TL_Y 0xC000FFFF +#define S_028204_WINDOW_OFFSET_DISABLE(x) (((x) & 0x1) << 31) +#define G_028204_WINDOW_OFFSET_DISABLE(x) (((x) >> 31) & 0x1) +#define C_028204_WINDOW_OFFSET_DISABLE 0x7FFFFFFF +#define R_028208_PA_SC_WINDOW_SCISSOR_BR 0x028208 +#define S_028208_BR_X(x) (((x) & 0x3FFF) << 0) +#define G_028208_BR_X(x) (((x) >> 0) & 0x3FFF) +#define C_028208_BR_X 0xFFFFC000 +#define S_028208_BR_Y(x) (((x) & 0x3FFF) << 16) +#define G_028208_BR_Y(x) (((x) >> 16) & 0x3FFF) +#define C_028208_BR_Y 0xC000FFFF +#define R_0287F0_VGT_DRAW_INITIATOR 0x0287F0 +#define S_0287F0_SOURCE_SELECT(x) (((x) & 0x3) << 0) +#define G_0287F0_SOURCE_SELECT(x) (((x) >> 0) & 0x3) +#define C_0287F0_SOURCE_SELECT 0xFFFFFFFC +#define S_0287F0_MAJOR_MODE(x) (((x) & 0x3) << 2) +#define G_0287F0_MAJOR_MODE(x) (((x) >> 2) & 0x3) +#define C_0287F0_MAJOR_MODE 0xFFFFFFF3 +#define S_0287F0_SPRITE_EN(x) (((x) & 0x1) << 4) +#define G_0287F0_SPRITE_EN(x) (((x) >> 4) & 0x1) +#define C_0287F0_SPRITE_EN 0xFFFFFFEF +#define S_0287F0_NOT_EOP(x) (((x) & 0x1) << 5) +#define G_0287F0_NOT_EOP(x) (((x) >> 5) & 0x1) +#define C_0287F0_NOT_EOP 0xFFFFFFDF +#define S_0287F0_USE_OPAQUE(x) (((x) & 0x1) << 6) +#define G_0287F0_USE_OPAQUE(x) (((x) >> 6) & 0x1) +#define C_0287F0_USE_OPAQUE 0xFFFFFFBF +#define R_038008_SQ_VTX_CONSTANT_WORD2_0 0x038008 +#define S_038008_BASE_ADDRESS_HI(x) (((x) & 0xFF) << 0) +#define G_038008_BASE_ADDRESS_HI(x) (((x) >> 0) & 0xFF) +#define C_038008_BASE_ADDRESS_HI 0xFFFFFF00 +#define S_038008_STRIDE(x) (((x) & 0x7FF) << 8) +#define G_038008_STRIDE(x) (((x) >> 8) & 0x7FF) +#define C_038008_STRIDE 0xFFF800FF +#define S_038008_CLAMP_X(x) (((x) & 0x1) << 19) +#define G_038008_CLAMP_X(x) (((x) >> 19) & 0x1) +#define C_038008_CLAMP_X 0xFFF7FFFF +#define S_038008_DATA_FORMAT(x) (((x) & 0x3F) << 20) +#define G_038008_DATA_FORMAT(x) (((x) >> 20) & 0x3F) +#define C_038008_DATA_FORMAT 0xFC0FFFFF +#define V_038008_COLOR_INVALID 0x00000000 +#define V_038008_COLOR_8 0x00000001 +#define V_038008_COLOR_4_4 0x00000002 +#define V_038008_COLOR_3_3_2 0x00000003 +#define V_038008_COLOR_16 0x00000005 +#define V_038008_COLOR_16_FLOAT 0x00000006 +#define V_038008_COLOR_8_8 0x00000007 +#define V_038008_COLOR_5_6_5 0x00000008 +#define V_038008_COLOR_6_5_5 0x00000009 +#define V_038008_COLOR_1_5_5_5 0x0000000A +#define V_038008_COLOR_4_4_4_4 0x0000000B +#define V_038008_COLOR_5_5_5_1 0x0000000C +#define V_038008_COLOR_32 0x0000000D +#define V_038008_COLOR_32_FLOAT 0x0000000E +#define V_038008_COLOR_16_16 0x0000000F +#define V_038008_COLOR_16_16_FLOAT 0x00000010 +#define V_038008_COLOR_8_24 0x00000011 +#define V_038008_COLOR_8_24_FLOAT 0x00000012 +#define V_038008_COLOR_24_8 0x00000013 +#define V_038008_COLOR_24_8_FLOAT 0x00000014 +#define V_038008_COLOR_10_11_11 0x00000015 +#define V_038008_COLOR_10_11_11_FLOAT 0x00000016 +#define V_038008_COLOR_11_11_10 0x00000017 +#define V_038008_COLOR_11_11_10_FLOAT 0x00000018 +#define V_038008_COLOR_2_10_10_10 0x00000019 +#define V_038008_COLOR_8_8_8_8 0x0000001A +#define V_038008_COLOR_10_10_10_2 0x0000001B +#define V_038008_COLOR_X24_8_32_FLOAT 0x0000001C +#define V_038008_COLOR_32_32 0x0000001D +#define V_038008_COLOR_32_32_FLOAT 0x0000001E +#define V_038008_COLOR_16_16_16_16 0x0000001F +#define V_038008_COLOR_16_16_16_16_FLOAT 0x00000020 +#define V_038008_COLOR_32_32_32_32 0x00000022 +#define V_038008_COLOR_32_32_32_32_FLOAT 0x00000023 +#define S_038008_NUM_FORMAT_ALL(x) (((x) & 0x3) << 26) +#define G_038008_NUM_FORMAT_ALL(x) (((x) >> 26) & 0x3) +#define C_038008_NUM_FORMAT_ALL 0xF3FFFFFF +#define S_038008_FORMAT_COMP_ALL(x) (((x) & 0x1) << 28) +#define G_038008_FORMAT_COMP_ALL(x) (((x) >> 28) & 0x1) +#define C_038008_FORMAT_COMP_ALL 0xEFFFFFFF +#define S_038008_SRF_MODE_ALL(x) (((x) & 0x1) << 29) +#define G_038008_SRF_MODE_ALL(x) (((x) >> 29) & 0x1) +#define C_038008_SRF_MODE_ALL 0xDFFFFFFF +#define S_038008_ENDIAN_SWAP(x) (((x) & 0x3) << 30) +#define G_038008_ENDIAN_SWAP(x) (((x) >> 30) & 0x3) +#define C_038008_ENDIAN_SWAP 0x3FFFFFFF +#define R_008958_VGT_PRIMITIVE_TYPE 0x008958 +#define S_008958_PRIM_TYPE(x) (((x) & 0x3F) << 0) +#define G_008958_PRIM_TYPE(x) (((x) >> 0) & 0x3F) +#define C_008958_PRIM_TYPE 0xFFFFFFC0 +#define V_008958_DI_PT_NONE 0x00000000 +#define V_008958_DI_PT_POINTLIST 0x00000001 +#define V_008958_DI_PT_LINELIST 0x00000002 +#define V_008958_DI_PT_LINESTRIP 0x00000003 +#define V_008958_DI_PT_TRILIST 0x00000004 +#define V_008958_DI_PT_TRIFAN 0x00000005 +#define V_008958_DI_PT_TRISTRIP 0x00000006 +#define V_008958_DI_PT_UNUSED_0 0x00000007 +#define V_008958_DI_PT_UNUSED_1 0x00000008 +#define V_008958_DI_PT_UNUSED_2 0x00000009 +#define V_008958_DI_PT_LINELIST_ADJ 0x0000000A +#define V_008958_DI_PT_LINESTRIP_ADJ 0x0000000B +#define V_008958_DI_PT_TRILIST_ADJ 0x0000000C +#define V_008958_DI_PT_TRISTRIP_ADJ 0x0000000D +#define V_008958_DI_PT_UNUSED_3 0x0000000E +#define V_008958_DI_PT_UNUSED_4 0x0000000F +#define V_008958_DI_PT_TRI_WITH_WFLAGS 0x00000010 +#define V_008958_DI_PT_RECTLIST 0x00000011 +#define V_008958_DI_PT_LINELOOP 0x00000012 +#define V_008958_DI_PT_QUADLIST 0x00000013 +#define V_008958_DI_PT_QUADSTRIP 0x00000014 +#define V_008958_DI_PT_POLYGON 0x00000015 +#define V_008958_DI_PT_2D_COPY_RECT_LIST_V0 0x00000016 +#define V_008958_DI_PT_2D_COPY_RECT_LIST_V1 0x00000017 +#define V_008958_DI_PT_2D_COPY_RECT_LIST_V2 0x00000018 +#define V_008958_DI_PT_2D_COPY_RECT_LIST_V3 0x00000019 +#define V_008958_DI_PT_2D_FILL_RECT_LIST 0x0000001A +#define V_008958_DI_PT_2D_LINE_STRIP 0x0000001B +#define V_008958_DI_PT_2D_TRI_STRIP 0x0000001C +#define R_028868_SQ_PGM_RESOURCES_VS 0x028868 +#define S_028868_NUM_GPRS(x) (((x) & 0xFF) << 0) +#define G_028868_NUM_GPRS(x) (((x) >> 0) & 0xFF) +#define C_028868_NUM_GPRS 0xFFFFFF00 +#define S_028868_STACK_SIZE(x) (((x) & 0xFF) << 8) +#define G_028868_STACK_SIZE(x) (((x) >> 8) & 0xFF) +#define C_028868_STACK_SIZE 0xFFFF00FF +#define S_028868_DX10_CLAMP(x) (((x) & 0x1) << 21) +#define G_028868_DX10_CLAMP(x) (((x) >> 21) & 0x1) +#define C_028868_DX10_CLAMP 0xFFDFFFFF +#define S_028868_FETCH_CACHE_LINES(x) (((x) & 0x7) << 24) +#define G_028868_FETCH_CACHE_LINES(x) (((x) >> 24) & 0x7) +#define C_028868_FETCH_CACHE_LINES 0xF8FFFFFF +#define S_028868_UNCACHED_FIRST_INST(x) (((x) & 0x1) << 28) +#define G_028868_UNCACHED_FIRST_INST(x) (((x) >> 28) & 0x1) +#define C_028868_UNCACHED_FIRST_INST 0xEFFFFFFF +#define R_028850_SQ_PGM_RESOURCES_PS 0x028850 +#define S_028850_NUM_GPRS(x) (((x) & 0xFF) << 0) +#define G_028850_NUM_GPRS(x) (((x) >> 0) & 0xFF) +#define C_028850_NUM_GPRS 0xFFFFFF00 +#define S_028850_STACK_SIZE(x) (((x) & 0xFF) << 8) +#define G_028850_STACK_SIZE(x) (((x) >> 8) & 0xFF) +#define C_028850_STACK_SIZE 0xFFFF00FF +#define S_028850_DX10_CLAMP(x) (((x) & 0x1) << 21) +#define G_028850_DX10_CLAMP(x) (((x) >> 21) & 0x1) +#define C_028850_DX10_CLAMP 0xFFDFFFFF +#define S_028850_FETCH_CACHE_LINES(x) (((x) & 0x7) << 24) +#define G_028850_FETCH_CACHE_LINES(x) (((x) >> 24) & 0x7) +#define C_028850_FETCH_CACHE_LINES 0xF8FFFFFF +#define S_028850_UNCACHED_FIRST_INST(x) (((x) & 0x1) << 28) +#define G_028850_UNCACHED_FIRST_INST(x) (((x) >> 28) & 0x1) +#define C_028850_UNCACHED_FIRST_INST 0xEFFFFFFF +#define S_028850_CLAMP_CONSTS(x) (((x) & 0x1) << 31) +#define G_028850_CLAMP_CONSTS(x) (((x) >> 31) & 0x1) +#define C_028850_CLAMP_CONSTS 0x7FFFFFFF +#define R_028644_SPI_PS_INPUT_CNTL_0 0x028644 +#define S_028644_SEMANTIC(x) (((x) & 0xFF) << 0) +#define G_028644_SEMANTIC(x) (((x) >> 0) & 0xFF) +#define C_028644_SEMANTIC 0xFFFFFF00 +#define S_028644_DEFAULT_VAL(x) (((x) & 0x3) << 8) +#define G_028644_DEFAULT_VAL(x) (((x) >> 8) & 0x3) +#define C_028644_DEFAULT_VAL 0xFFFFFCFF +#define S_028644_FLAT_SHADE(x) (((x) & 0x1) << 10) +#define G_028644_FLAT_SHADE(x) (((x) >> 10) & 0x1) +#define C_028644_FLAT_SHADE 0xFFFFFBFF +#define S_028644_SEL_CENTROID(x) (((x) & 0x1) << 11) +#define G_028644_SEL_CENTROID(x) (((x) >> 11) & 0x1) +#define C_028644_SEL_CENTROID 0xFFFFF7FF +#define S_028644_SEL_LINEAR(x) (((x) & 0x1) << 12) +#define G_028644_SEL_LINEAR(x) (((x) >> 12) & 0x1) +#define C_028644_SEL_LINEAR 0xFFFFEFFF +#define S_028644_CYL_WRAP(x) (((x) & 0xF) << 13) +#define G_028644_CYL_WRAP(x) (((x) >> 13) & 0xF) +#define C_028644_CYL_WRAP 0xFFFE1FFF +#define S_028644_PT_SPRITE_TEX(x) (((x) & 0x1) << 17) +#define G_028644_PT_SPRITE_TEX(x) (((x) >> 17) & 0x1) +#define C_028644_PT_SPRITE_TEX 0xFFFDFFFF +#define S_028644_SEL_SAMPLE(x) (((x) & 0x1) << 18) +#define G_028644_SEL_SAMPLE(x) (((x) >> 18) & 0x1) +#define C_028644_SEL_SAMPLE 0xFFFBFFFF +#define R_0286D4_SPI_INTERP_CONTROL_0 0x0286D4 +#define S_0286D4_FLAT_SHADE_ENA(x) (((x) & 0x1) << 0) +#define G_0286D4_FLAT_SHADE_ENA(x) (((x) >> 0) & 0x1) +#define C_0286D4_FLAT_SHADE_ENA 0xFFFFFFFE +#define S_0286D4_PNT_SPRITE_ENA(x) (((x) & 0x1) << 1) +#define G_0286D4_PNT_SPRITE_ENA(x) (((x) >> 1) & 0x1) +#define C_0286D4_PNT_SPRITE_ENA 0xFFFFFFFD +#define S_0286D4_PNT_SPRITE_OVRD_X(x) (((x) & 0x7) << 2) +#define G_0286D4_PNT_SPRITE_OVRD_X(x) (((x) >> 2) & 0x7) +#define C_0286D4_PNT_SPRITE_OVRD_X 0xFFFFFFE3 +#define S_0286D4_PNT_SPRITE_OVRD_Y(x) (((x) & 0x7) << 5) +#define G_0286D4_PNT_SPRITE_OVRD_Y(x) (((x) >> 5) & 0x7) +#define C_0286D4_PNT_SPRITE_OVRD_Y 0xFFFFFF1F +#define S_0286D4_PNT_SPRITE_OVRD_Z(x) (((x) & 0x7) << 8) +#define G_0286D4_PNT_SPRITE_OVRD_Z(x) (((x) >> 8) & 0x7) +#define C_0286D4_PNT_SPRITE_OVRD_Z 0xFFFFF8FF +#define S_0286D4_PNT_SPRITE_OVRD_W(x) (((x) & 0x7) << 11) +#define G_0286D4_PNT_SPRITE_OVRD_W(x) (((x) >> 11) & 0x7) +#define C_0286D4_PNT_SPRITE_OVRD_W 0xFFFFC7FF +#define S_0286D4_PNT_SPRITE_TOP_1(x) (((x) & 0x1) << 14) +#define G_0286D4_PNT_SPRITE_TOP_1(x) (((x) >> 14) & 0x1) +#define C_0286D4_PNT_SPRITE_TOP_1 0xFFFFBFFF + +#endif diff --git a/src/gallium/drivers/r600/r700_sq.h b/src/gallium/drivers/r600/r700_sq.h new file mode 100644 index 00000000000..8266af6d1fc --- /dev/null +++ b/src/gallium/drivers/r600/r700_sq.h @@ -0,0 +1,609 @@ +/* + * Copyright 2010 Jerome Glisse + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Jerome Glisse + */ +#ifndef R700_SQ_H +#define R700_SQ_H + +#define P_SQ_CF_WORD0 +#define S_SQ_CF_WORD0_ADDR(x) (((x) & 0xFFFFFFFF) << 0) +#define G_SQ_CF_WORD0_ADDR(x) (((x) >> 0) & 0xFFFFFFFF) +#define C_SQ_CF_WORD0_ADDR 0x00000000 +#define P_SQ_CF_WORD1 +#define S_SQ_CF_WORD1_POP_COUNT(x) (((x) & 0x7) << 0) +#define G_SQ_CF_WORD1_POP_COUNT(x) (((x) >> 0) & 0x7) +#define C_SQ_CF_WORD1_POP_COUNT 0xFFFFFFF8 +#define S_SQ_CF_WORD1_CF_CONST(x) (((x) & 0x1F) << 3) +#define G_SQ_CF_WORD1_CF_CONST(x) (((x) >> 3) & 0x1F) +#define C_SQ_CF_WORD1_CF_CONST 0xFFFFFF07 +#define S_SQ_CF_WORD1_COND(x) (((x) & 0x3) << 8) +#define G_SQ_CF_WORD1_COND(x) (((x) >> 8) & 0x3) +#define C_SQ_CF_WORD1_COND 0xFFFFFCFF +#define S_SQ_CF_WORD1_COUNT(x) (((x) & 0x7) << 10) +#define G_SQ_CF_WORD1_COUNT(x) (((x) >> 10) & 0x7) +#define C_SQ_CF_WORD1_COUNT 0xFFFFE3FF +#define S_SQ_CF_WORD1_CALL_COUNT(x) (((x) & 0x3F) << 13) +#define G_SQ_CF_WORD1_CALL_COUNT(x) (((x) >> 13) & 0x3F) +#define C_SQ_CF_WORD1_CALL_COUNT 0xFFF81FFF +#define S_SQ_CF_WORD1_END_OF_PROGRAM(x) (((x) & 0x1) << 21) +#define G_SQ_CF_WORD1_END_OF_PROGRAM(x) (((x) >> 21) & 0x1) +#define C_SQ_CF_WORD1_END_OF_PROGRAM 0xFFDFFFFF +#define S_SQ_CF_WORD1_VALID_PIXEL_MODE(x) (((x) & 0x1) << 22) +#define G_SQ_CF_WORD1_VALID_PIXEL_MODE(x) (((x) >> 22) & 0x1) +#define C_SQ_CF_WORD1_VALID_PIXEL_MODE 0xFFBFFFFF +#define S_SQ_CF_WORD1_CF_INST(x) (((x) & 0x7F) << 23) +#define G_SQ_CF_WORD1_CF_INST(x) (((x) >> 23) & 0x7F) +#define C_SQ_CF_WORD1_CF_INST 0xC07FFFFF +#define V_SQ_CF_WORD1_SQ_CF_INST_NOP 0x00000000 +#define V_SQ_CF_WORD1_SQ_CF_INST_TEX 0x00000001 +#define V_SQ_CF_WORD1_SQ_CF_INST_VTX 0x00000002 +#define V_SQ_CF_WORD1_SQ_CF_INST_VTX_TC 0x00000003 +#define V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START 0x00000004 +#define V_SQ_CF_WORD1_SQ_CF_INST_LOOP_END 0x00000005 +#define V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_DX10 0x00000006 +#define V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_NO_AL 0x00000007 +#define V_SQ_CF_WORD1_SQ_CF_INST_LOOP_CONTINUE 0x00000008 +#define V_SQ_CF_WORD1_SQ_CF_INST_LOOP_BREAK 0x00000009 +#define V_SQ_CF_WORD1_SQ_CF_INST_JUMP 0x0000000A +#define V_SQ_CF_WORD1_SQ_CF_INST_PUSH 0x0000000B +#define V_SQ_CF_WORD1_SQ_CF_INST_PUSH_ELSE 0x0000000C +#define V_SQ_CF_WORD1_SQ_CF_INST_ELSE 0x0000000D +#define V_SQ_CF_WORD1_SQ_CF_INST_POP 0x0000000E +#define V_SQ_CF_WORD1_SQ_CF_INST_POP_JUMP 0x0000000F +#define V_SQ_CF_WORD1_SQ_CF_INST_POP_PUSH 0x00000010 +#define V_SQ_CF_WORD1_SQ_CF_INST_POP_PUSH_ELSE 0x00000011 +#define V_SQ_CF_WORD1_SQ_CF_INST_CALL 0x00000012 +#define V_SQ_CF_WORD1_SQ_CF_INST_CALL_FS 0x00000013 +#define V_SQ_CF_WORD1_SQ_CF_INST_RETURN 0x00000014 +#define V_SQ_CF_WORD1_SQ_CF_INST_EMIT_VERTEX 0x00000015 +#define V_SQ_CF_WORD1_SQ_CF_INST_EMIT_CUT_VERTEX 0x00000016 +#define V_SQ_CF_WORD1_SQ_CF_INST_CUT_VERTEX 0x00000017 +#define V_SQ_CF_WORD1_SQ_CF_INST_KILL 0x00000018 +#define S_SQ_CF_WORD1_WHOLE_QUAD_MODE(x) (((x) & 0x1) << 30) +#define G_SQ_CF_WORD1_WHOLE_QUAD_MODE(x) (((x) >> 30) & 0x1) +#define C_SQ_CF_WORD1_WHOLE_QUAD_MODE 0xBFFFFFFF +#define S_SQ_CF_WORD1_BARRIER(x) (((x) & 0x1) << 31) +#define G_SQ_CF_WORD1_BARRIER(x) (((x) >> 31) & 0x1) +#define C_SQ_CF_WORD1_BARRIER 0x7FFFFFFF +#define S_SQ_CF_WORD1_COUNT_3(x) (((x) & 0x1) << 19) +#define G_SQ_CF_WORD1_COUNT_3(x) (((x) >> 19) & 0x1) +#define C_SQ_CF_WORD1_COUNT_3 0xFFF7FFFF +#define P_SQ_CF_ALU_WORD0 +#define S_SQ_CF_ALU_WORD0_ADDR(x) (((x) & 0x3FFFFF) << 0) +#define G_SQ_CF_ALU_WORD0_ADDR(x) (((x) >> 0) & 0x3FFFFF) +#define C_SQ_CF_ALU_WORD0_ADDR 0xFFC00000 +#define S_SQ_CF_ALU_WORD0_KCACHE_BANK0(x) (((x) & 0xF) << 22) +#define G_SQ_CF_ALU_WORD0_KCACHE_BANK0(x) (((x) >> 22) & 0xF) +#define C_SQ_CF_ALU_WORD0_KCACHE_BANK0 0xFC3FFFFF +#define S_SQ_CF_ALU_WORD0_KCACHE_BANK1(x) (((x) & 0xF) << 26) +#define G_SQ_CF_ALU_WORD0_KCACHE_BANK1(x) (((x) >> 26) & 0xF) +#define C_SQ_CF_ALU_WORD0_KCACHE_BANK1 0xC3FFFFFF +#define S_SQ_CF_ALU_WORD0_KCACHE_MODE0(x) (((x) & 0x3) << 30) +#define G_SQ_CF_ALU_WORD0_KCACHE_MODE0(x) (((x) >> 30) & 0x3) +#define C_SQ_CF_ALU_WORD0_KCACHE_MODE0 0x3FFFFFFF +#define P_SQ_CF_ALU_WORD1 +#define S_SQ_CF_ALU_WORD1_KCACHE_MODE1(x) (((x) & 0x3) << 0) +#define G_SQ_CF_ALU_WORD1_KCACHE_MODE1(x) (((x) >> 0) & 0x3) +#define C_SQ_CF_ALU_WORD1_KCACHE_MODE1 0xFFFFFFFC +#define S_SQ_CF_ALU_WORD1_KCACHE_ADDR0(x) (((x) & 0xFF) << 2) +#define G_SQ_CF_ALU_WORD1_KCACHE_ADDR0(x) (((x) >> 2) & 0xFF) +#define C_SQ_CF_ALU_WORD1_KCACHE_ADDR0 0xFFFFFC03 +#define S_SQ_CF_ALU_WORD1_KCACHE_ADDR1(x) (((x) & 0xFF) << 10) +#define G_SQ_CF_ALU_WORD1_KCACHE_ADDR1(x) (((x) >> 10) & 0xFF) +#define C_SQ_CF_ALU_WORD1_KCACHE_ADDR1 0xFFFC03FF +#define S_SQ_CF_ALU_WORD1_COUNT(x) (((x) & 0x7F) << 18) +#define G_SQ_CF_ALU_WORD1_COUNT(x) (((x) >> 18) & 0x7F) +#define C_SQ_CF_ALU_WORD1_COUNT 0xFE03FFFF +#define S_SQ_CF_ALU_WORD1_USES_WATERFALL(x) (((x) & 0x1) << 25) +#define G_SQ_CF_ALU_WORD1_USES_WATERFALL(x) (((x) >> 25) & 0x1) +#define C_SQ_CF_ALU_WORD1_USES_WATERFALL 0xFDFFFFFF +#define S_SQ_CF_ALU_WORD1_CF_INST(x) (((x) & 0xF) << 26) +#define G_SQ_CF_ALU_WORD1_CF_INST(x) (((x) >> 26) & 0xF) +#define C_SQ_CF_ALU_WORD1_CF_INST 0xC3FFFFFF +#define V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU 0x00000008 +#define V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE 0x00000009 +#define V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP_AFTER 0x0000000A +#define V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP2_AFTER 0x0000000B +#define V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_CONTINUE 0x0000000D +#define V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_BREAK 0x0000000E +#define V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_ELSE_AFTER 0x0000000F +#define S_SQ_CF_ALU_WORD1_WHOLE_QUAD_MODE(x) (((x) & 0x1) << 30) +#define G_SQ_CF_ALU_WORD1_WHOLE_QUAD_MODE(x) (((x) >> 30) & 0x1) +#define C_SQ_CF_ALU_WORD1_WHOLE_QUAD_MODE 0xBFFFFFFF +#define S_SQ_CF_ALU_WORD1_BARRIER(x) (((x) & 0x1) << 31) +#define G_SQ_CF_ALU_WORD1_BARRIER(x) (((x) >> 31) & 0x1) +#define C_SQ_CF_ALU_WORD1_BARRIER 0x7FFFFFFF +#define S_SQ_CF_ALU_WORD1_ALT_CONST(x) (((x) & 0x1) << 25) +#define G_SQ_CF_ALU_WORD1_ALT_CONST(x) (((x) >> 25) & 0x1) +#define C_SQ_CF_ALU_WORD1_ALT_CONST 0xFDFFFFFF +#define P_SQ_CF_ALLOC_EXPORT_WORD0 +#define S_SQ_CF_ALLOC_EXPORT_WORD0_ARRAY_BASE(x) (((x) & 0x1FFF) << 0) +#define G_SQ_CF_ALLOC_EXPORT_WORD0_ARRAY_BASE(x) (((x) >> 0) & 0x1FFF) +#define C_SQ_CF_ALLOC_EXPORT_WORD0_ARRAY_BASE 0xFFFFE000 +#define S_SQ_CF_ALLOC_EXPORT_WORD0_TYPE(x) (((x) & 0x3) << 13) +#define G_SQ_CF_ALLOC_EXPORT_WORD0_TYPE(x) (((x) >> 13) & 0x3) +#define C_SQ_CF_ALLOC_EXPORT_WORD0_TYPE 0xFFFF9FFF +#define V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PIXEL 0x00000000 +#define V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_POS 0x00000001 +#define V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PARAM 0x00000002 +#define V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_SX 0x00000003 +#define S_SQ_CF_ALLOC_EXPORT_WORD0_RW_GPR(x) (((x) & 0x7F) << 15) +#define G_SQ_CF_ALLOC_EXPORT_WORD0_RW_GPR(x) (((x) >> 15) & 0x7F) +#define C_SQ_CF_ALLOC_EXPORT_WORD0_RW_GPR 0xFFC07FFF +#define S_SQ_CF_ALLOC_EXPORT_WORD0_RW_REL(x) (((x) & 0x1) << 22) +#define G_SQ_CF_ALLOC_EXPORT_WORD0_RW_REL(x) (((x) >> 22) & 0x1) +#define C_SQ_CF_ALLOC_EXPORT_WORD0_RW_REL 0xFFBFFFFF +#define S_SQ_CF_ALLOC_EXPORT_WORD0_INDEX_GPR(x) (((x) & 0x7F) << 23) +#define G_SQ_CF_ALLOC_EXPORT_WORD0_INDEX_GPR(x) (((x) >> 23) & 0x7F) +#define C_SQ_CF_ALLOC_EXPORT_WORD0_INDEX_GPR 0xC07FFFFF +#define S_SQ_CF_ALLOC_EXPORT_WORD0_ELEM_SIZE(x) (((x) & 0x3) << 30) +#define G_SQ_CF_ALLOC_EXPORT_WORD0_ELEM_SIZE(x) (((x) >> 30) & 0x3) +#define C_SQ_CF_ALLOC_EXPORT_WORD0_ELEM_SIZE 0x3FFFFFFF +#define P_SQ_CF_ALLOC_EXPORT_WORD1 +#define S_SQ_CF_ALLOC_EXPORT_WORD1_BURST_COUNT(x) (((x) & 0xF) << 17) +#define G_SQ_CF_ALLOC_EXPORT_WORD1_BURST_COUNT(x) (((x) >> 17) & 0xF) +#define C_SQ_CF_ALLOC_EXPORT_WORD1_BURST_COUNT 0xFFE1FFFF +#define S_SQ_CF_ALLOC_EXPORT_WORD1_END_OF_PROGRAM(x) (((x) & 0x1) << 21) +#define G_SQ_CF_ALLOC_EXPORT_WORD1_END_OF_PROGRAM(x) (((x) >> 21) & 0x1) +#define C_SQ_CF_ALLOC_EXPORT_WORD1_END_OF_PROGRAM 0xFFDFFFFF +#define S_SQ_CF_ALLOC_EXPORT_WORD1_VALID_PIXEL_MODE(x) (((x) & 0x1) << 22) +#define G_SQ_CF_ALLOC_EXPORT_WORD1_VALID_PIXEL_MODE(x) (((x) >> 22) & 0x1) +#define C_SQ_CF_ALLOC_EXPORT_WORD1_VALID_PIXEL_MODE 0xFFBFFFFF +#define S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(x) (((x) & 0x7F) << 23) +#define G_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(x) (((x) >> 23) & 0x7F) +#define C_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST 0xC07FFFFF +#define V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM0 0x00000020 +#define V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM1 0x00000021 +#define V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM2 0x00000022 +#define V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM3 0x00000023 +#define V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_SCRATCH 0x00000024 +#define V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_REDUCTION 0x00000025 +#define V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_RING 0x00000026 +#define V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT 0x00000027 +#define V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT_DONE 0x00000028 +#define S_SQ_CF_ALLOC_EXPORT_WORD1_WHOLE_QUAD_MODE(x) (((x) & 0x1) << 30) +#define G_SQ_CF_ALLOC_EXPORT_WORD1_WHOLE_QUAD_MODE(x) (((x) >> 30) & 0x1) +#define C_SQ_CF_ALLOC_EXPORT_WORD1_WHOLE_QUAD_MODE 0xBFFFFFFF +#define S_SQ_CF_ALLOC_EXPORT_WORD1_BARRIER(x) (((x) & 0x1) << 31) +#define G_SQ_CF_ALLOC_EXPORT_WORD1_BARRIER(x) (((x) >> 31) & 0x1) +#define C_SQ_CF_ALLOC_EXPORT_WORD1_BARRIER 0x7FFFFFFF +#define P_SQ_CF_ALLOC_EXPORT_WORD1_BUF +#define S_SQ_CF_ALLOC_EXPORT_WORD1_BUF_ARRAY_SIZE(x) (((x) & 0xFFF) << 0) +#define G_SQ_CF_ALLOC_EXPORT_WORD1_BUF_ARRAY_SIZE(x) (((x) >> 0) & 0xFFF) +#define C_SQ_CF_ALLOC_EXPORT_WORD1_BUF_ARRAY_SIZE 0xFFFFF000 +#define S_SQ_CF_ALLOC_EXPORT_WORD1_BUF_COMP_MASK(x) (((x) & 0xF) << 12) +#define G_SQ_CF_ALLOC_EXPORT_WORD1_BUF_COMP_MASK(x) (((x) >> 12) & 0xF) +#define C_SQ_CF_ALLOC_EXPORT_WORD1_BUF_COMP_MASK 0xFFFF0FFF +#define P_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ +#define S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_X(x) (((x) & 0x7) << 0) +#define G_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_X(x) (((x) >> 0) & 0x7) +#define C_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_X 0xFFFFFFF8 +#define S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Y(x) (((x) & 0x7) << 3) +#define G_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Y(x) (((x) >> 3) & 0x7) +#define C_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Y 0xFFFFFFC7 +#define S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Z(x) (((x) & 0x7) << 6) +#define G_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Z(x) (((x) >> 6) & 0x7) +#define C_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Z 0xFFFFFE3F +#define S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_W(x) (((x) & 0x7) << 9) +#define G_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_W(x) (((x) >> 9) & 0x7) +#define C_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_W 0xFFFFF1FF +#define P_SQ_ALU_WORD0 +#define S_SQ_ALU_WORD0_SRC0_SEL(x) (((x) & 0x1FF) << 0) +#define G_SQ_ALU_WORD0_SRC0_SEL(x) (((x) >> 0) & 0x1FF) +#define C_SQ_ALU_WORD0_SRC0_SEL 0xFFFFFE00 +#define S_SQ_ALU_WORD0_SRC0_REL(x) (((x) & 0x1) << 9) +#define G_SQ_ALU_WORD0_SRC0_REL(x) (((x) >> 9) & 0x1) +#define C_SQ_ALU_WORD0_SRC0_REL 0xFFFFFDFF +#define S_SQ_ALU_WORD0_SRC0_CHAN(x) (((x) & 0x3) << 10) +#define G_SQ_ALU_WORD0_SRC0_CHAN(x) (((x) >> 10) & 0x3) +#define C_SQ_ALU_WORD0_SRC0_CHAN 0xFFFFF3FF +#define S_SQ_ALU_WORD0_SRC0_NEG(x) (((x) & 0x1) << 12) +#define G_SQ_ALU_WORD0_SRC0_NEG(x) (((x) >> 12) & 0x1) +#define C_SQ_ALU_WORD0_SRC0_NEG 0xFFFFEFFF +#define S_SQ_ALU_WORD0_SRC1_SEL(x) (((x) & 0x1FF) << 13) +#define G_SQ_ALU_WORD0_SRC1_SEL(x) (((x) >> 13) & 0x1FF) +#define C_SQ_ALU_WORD0_SRC1_SEL 0xFFC01FFF +#define S_SQ_ALU_WORD0_SRC1_REL(x) (((x) & 0x1) << 22) +#define G_SQ_ALU_WORD0_SRC1_REL(x) (((x) >> 22) & 0x1) +#define C_SQ_ALU_WORD0_SRC1_REL 0xFFBFFFFF +#define S_SQ_ALU_WORD0_SRC1_CHAN(x) (((x) & 0x3) << 23) +#define G_SQ_ALU_WORD0_SRC1_CHAN(x) (((x) >> 23) & 0x3) +#define C_SQ_ALU_WORD0_SRC1_CHAN 0xFE7FFFFF +#define S_SQ_ALU_WORD0_SRC1_NEG(x) (((x) & 0x1) << 25) +#define G_SQ_ALU_WORD0_SRC1_NEG(x) (((x) >> 25) & 0x1) +#define C_SQ_ALU_WORD0_SRC1_NEG 0xFDFFFFFF +#define S_SQ_ALU_WORD0_INDEX_MODE(x) (((x) & 0x7) << 26) +#define G_SQ_ALU_WORD0_INDEX_MODE(x) (((x) >> 26) & 0x7) +#define C_SQ_ALU_WORD0_INDEX_MODE 0xE3FFFFFF +#define S_SQ_ALU_WORD0_PRED_SEL(x) (((x) & 0x3) << 29) +#define G_SQ_ALU_WORD0_PRED_SEL(x) (((x) >> 29) & 0x3) +#define C_SQ_ALU_WORD0_PRED_SEL 0x9FFFFFFF +#define S_SQ_ALU_WORD0_LAST(x) (((x) & 0x1) << 31) +#define G_SQ_ALU_WORD0_LAST(x) (((x) >> 31) & 0x1) +#define C_SQ_ALU_WORD0_LAST 0x7FFFFFFF +#define P_SQ_ALU_WORD1 +#define S_SQ_ALU_WORD1_ENCODING(x) (((x) & 0x7) << 15) +#define G_SQ_ALU_WORD1_ENCODING(x) (((x) >> 15) & 0x7) +#define C_SQ_ALU_WORD1_ENCODING 0xFFFC7FFF +#define S_SQ_ALU_WORD1_BANK_SWIZZLE(x) (((x) & 0x7) << 18) +#define G_SQ_ALU_WORD1_BANK_SWIZZLE(x) (((x) >> 18) & 0x7) +#define C_SQ_ALU_WORD1_BANK_SWIZZLE 0xFFE3FFFF +#define S_SQ_ALU_WORD1_DST_GPR(x) (((x) & 0x7F) << 21) +#define G_SQ_ALU_WORD1_DST_GPR(x) (((x) >> 21) & 0x7F) +#define C_SQ_ALU_WORD1_DST_GPR 0xF01FFFFF +#define S_SQ_ALU_WORD1_DST_REL(x) (((x) & 0x1) << 28) +#define G_SQ_ALU_WORD1_DST_REL(x) (((x) >> 28) & 0x1) +#define C_SQ_ALU_WORD1_DST_REL 0xEFFFFFFF +#define S_SQ_ALU_WORD1_DST_CHAN(x) (((x) & 0x3) << 29) +#define G_SQ_ALU_WORD1_DST_CHAN(x) (((x) >> 29) & 0x3) +#define C_SQ_ALU_WORD1_DST_CHAN 0x9FFFFFFF +#define S_SQ_ALU_WORD1_CLAMP(x) (((x) & 0x1) << 31) +#define G_SQ_ALU_WORD1_CLAMP(x) (((x) >> 31) & 0x1) +#define C_SQ_ALU_WORD1_CLAMP 0x7FFFFFFF +#define P_SQ_ALU_WORD1_OP2 +#define S_SQ_ALU_WORD1_OP2_SRC0_ABS(x) (((x) & 0x1) << 0) +#define G_SQ_ALU_WORD1_OP2_SRC0_ABS(x) (((x) >> 0) & 0x1) +#define C_SQ_ALU_WORD1_OP2_SRC0_ABS 0xFFFFFFFE +#define S_SQ_ALU_WORD1_OP2_SRC1_ABS(x) (((x) & 0x1) << 1) +#define G_SQ_ALU_WORD1_OP2_SRC1_ABS(x) (((x) >> 1) & 0x1) +#define C_SQ_ALU_WORD1_OP2_SRC1_ABS 0xFFFFFFFD +#define S_SQ_ALU_WORD1_OP2_UPDATE_EXECUTE_MASK(x) (((x) & 0x1) << 2) +#define G_SQ_ALU_WORD1_OP2_UPDATE_EXECUTE_MASK(x) (((x) >> 2) & 0x1) +#define C_SQ_ALU_WORD1_OP2_UPDATE_EXECUTE_MASK 0xFFFFFFFB +#define S_SQ_ALU_WORD1_OP2_UPDATE_PRED(x) (((x) & 0x1) << 3) +#define G_SQ_ALU_WORD1_OP2_UPDATE_PRED(x) (((x) >> 3) & 0x1) +#define C_SQ_ALU_WORD1_OP2_UPDATE_PRED 0xFFFFFFF7 +#define S_SQ_ALU_WORD1_OP2_WRITE_MASK(x) (((x) & 0x1) << 4) +#define G_SQ_ALU_WORD1_OP2_WRITE_MASK(x) (((x) >> 4) & 0x1) +#define C_SQ_ALU_WORD1_OP2_WRITE_MASK 0xFFFFFFEF +#define S_SQ_ALU_WORD1_OP2_OMOD(x) (((x) & 0x3) << 5) +#define G_SQ_ALU_WORD1_OP2_OMOD(x) (((x) >> 5) & 0x3) +#define C_SQ_ALU_WORD1_OP2_OMOD 0xFFFFFF9F +#define S_SQ_ALU_WORD1_OP2_ALU_INST(x) (((x) & 0x7FF) << 7) +#define G_SQ_ALU_WORD1_OP2_ALU_INST(x) (((x) >> 7) & 0x7FF) +#define C_SQ_ALU_WORD1_OP2_ALU_INST 0xFFFC007F +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD 0x00000000 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL 0x00000001 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL_IEEE 0x00000002 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX 0x00000003 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN 0x00000004 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX_DX10 0x00000005 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN_DX10 0x00000006 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETE 0x00000008 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT 0x00000009 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE 0x0000000A +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETNE 0x0000000B +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETE_DX10 0x0000000C +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT_DX10 0x0000000D +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_DX10 0x0000000E +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETNE_DX10 0x0000000F +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FRACT 0x00000010 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_TRUNC 0x00000011 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CEIL 0x00000012 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RNDNE 0x00000013 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLOOR 0x00000014 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA 0x00000015 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_FLOOR 0x00000016 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT 0x00000018 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV 0x00000019 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP 0x0000001A +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_UINT 0x0000001E +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_UINT 0x0000001F +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE 0x00000020 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT 0x00000021 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE 0x00000022 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE 0x00000023 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SET_INV 0x00000024 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SET_POP 0x00000025 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SET_CLR 0x00000026 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SET_RESTORE 0x00000027 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_PUSH 0x00000028 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_PUSH 0x00000029 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_PUSH 0x0000002A +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_PUSH 0x0000002B +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLE 0x0000002C +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT 0x0000002D +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE 0x0000002E +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLNE 0x0000002F +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_AND_INT 0x00000030 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_OR_INT 0x00000031 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_XOR_INT 0x00000032 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOT_INT 0x00000033 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD_INT 0x00000034 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SUB_INT 0x00000035 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX_INT 0x00000036 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN_INT 0x00000037 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX_UINT 0x00000038 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN_UINT 0x00000039 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETE_INT 0x0000003A +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT_INT 0x0000003B +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_INT 0x0000003C +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETNE_INT 0x0000003D +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT_UINT 0x0000003E +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_UINT 0x0000003F +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT_UINT 0x00000040 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE_UINT 0x00000041 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_INT 0x00000042 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_INT 0x00000043 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_INT 0x00000044 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_INT 0x00000045 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLE_INT 0x00000046 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT_INT 0x00000047 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE_INT 0x00000048 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLNE_INT 0x00000049 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_PUSH_INT 0x0000004A +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_PUSH_INT 0x0000004B +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_PUSH_INT 0x0000004C +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_PUSH_INT 0x0000004D +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETLT_PUSH_INT 0x0000004E +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETLE_PUSH_INT 0x0000004F +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4 0x00000050 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4_IEEE 0x00000051 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CUBE 0x00000052 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX4 0x00000053 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_GPR_INT 0x00000060 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE 0x00000061 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_CLAMPED 0x00000062 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE 0x00000063 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_CLAMPED 0x00000064 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_FF 0x00000065 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_IEEE 0x00000066 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_CLAMPED 0x00000067 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_FF 0x00000068 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_IEEE 0x00000069 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SQRT_IEEE 0x0000006A +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT 0x0000006B +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INT_TO_FLT 0x0000006C +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_UINT_TO_FLT 0x0000006D +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SIN 0x0000006E +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_COS 0x0000006F +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ASHR_INT 0x00000070 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LSHR_INT 0x00000071 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LSHL_INT 0x00000072 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_INT 0x00000073 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_INT 0x00000074 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_UINT 0x00000075 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_UINT 0x00000076 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_INT 0x00000077 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_UINT 0x00000078 +#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_UINT 0x00000079 +#define P_SQ_ALU_WORD1_OP3 +#define S_SQ_ALU_WORD1_OP3_SRC2_SEL(x) (((x) & 0x1FF) << 0) +#define G_SQ_ALU_WORD1_OP3_SRC2_SEL(x) (((x) >> 0) & 0x1FF) +#define C_SQ_ALU_WORD1_OP3_SRC2_SEL 0xFFFFFE00 +#define S_SQ_ALU_WORD1_OP3_SRC2_REL(x) (((x) & 0x1) << 9) +#define G_SQ_ALU_WORD1_OP3_SRC2_REL(x) (((x) >> 9) & 0x1) +#define C_SQ_ALU_WORD1_OP3_SRC2_REL 0xFFFFFDFF +#define S_SQ_ALU_WORD1_OP3_SRC2_CHAN(x) (((x) & 0x3) << 10) +#define G_SQ_ALU_WORD1_OP3_SRC2_CHAN(x) (((x) >> 10) & 0x3) +#define C_SQ_ALU_WORD1_OP3_SRC2_CHAN 0xFFFFF3FF +#define S_SQ_ALU_WORD1_OP3_SRC2_NEG(x) (((x) & 0x1) << 12) +#define G_SQ_ALU_WORD1_OP3_SRC2_NEG(x) (((x) >> 12) & 0x1) +#define C_SQ_ALU_WORD1_OP3_SRC2_NEG 0xFFFFEFFF +#define S_SQ_ALU_WORD1_OP3_ALU_INST(x) (((x) & 0x1F) << 13) +#define G_SQ_ALU_WORD1_OP3_ALU_INST(x) (((x) >> 13) & 0x1F) +#define C_SQ_ALU_WORD1_OP3_ALU_INST 0xFFFC1FFF +#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MUL_LIT 0x0000000C +#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MUL_LIT_M2 0x0000000D +#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MUL_LIT_M4 0x0000000E +#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MUL_LIT_D2 0x0000000F +#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD 0x00000010 +#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD_M2 0x00000011 +#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD_M4 0x00000012 +#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD_D2 0x00000013 +#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD_IEEE 0x00000014 +#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD_IEEE_M2 0x00000015 +#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD_IEEE_M4 0x00000016 +#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD_IEEE_D2 0x00000017 +#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDE 0x00000018 +#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGT 0x00000019 +#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGE 0x0000001A +#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDE_INT 0x0000001C +#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGT_INT 0x0000001D +#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGE_INT 0x0000001E +#define P_SQ_VTX_WORD0 +#define S_SQ_VTX_WORD0_VTX_INST(x) (((x) & 0x1F) << 0) +#define G_SQ_VTX_WORD0_VTX_INST(x) (((x) >> 0) & 0x1F) +#define C_SQ_VTX_WORD0_VTX_INST 0xFFFFFFE0 +#define S_SQ_VTX_WORD0_FETCH_TYPE(x) (((x) & 0x3) << 5) +#define G_SQ_VTX_WORD0_FETCH_TYPE(x) (((x) >> 5) & 0x3) +#define C_SQ_VTX_WORD0_FETCH_TYPE 0xFFFFFF9F +#define S_SQ_VTX_WORD0_FETCH_WHOLE_QUAD(x) (((x) & 0x1) << 7) +#define G_SQ_VTX_WORD0_FETCH_WHOLE_QUAD(x) (((x) >> 7) & 0x1) +#define C_SQ_VTX_WORD0_FETCH_WHOLE_QUAD 0xFFFFFF7F +#define S_SQ_VTX_WORD0_BUFFER_ID(x) (((x) & 0xFF) << 8) +#define G_SQ_VTX_WORD0_BUFFER_ID(x) (((x) >> 8) & 0xFF) +#define C_SQ_VTX_WORD0_BUFFER_ID 0xFFFF00FF +#define S_SQ_VTX_WORD0_SRC_GPR(x) (((x) & 0x7F) << 16) +#define G_SQ_VTX_WORD0_SRC_GPR(x) (((x) >> 16) & 0x7F) +#define C_SQ_VTX_WORD0_SRC_GPR 0xFF80FFFF +#define S_SQ_VTX_WORD0_SRC_REL(x) (((x) & 0x1) << 23) +#define G_SQ_VTX_WORD0_SRC_REL(x) (((x) >> 23) & 0x1) +#define C_SQ_VTX_WORD0_SRC_REL 0xFF7FFFFF +#define S_SQ_VTX_WORD0_SRC_SEL_X(x) (((x) & 0x3) << 24) +#define G_SQ_VTX_WORD0_SRC_SEL_X(x) (((x) >> 24) & 0x3) +#define C_SQ_VTX_WORD0_SRC_SEL_X 0xFCFFFFFF +#define S_SQ_VTX_WORD0_MEGA_FETCH_COUNT(x) (((x) & 0x3F) << 26) +#define G_SQ_VTX_WORD0_MEGA_FETCH_COUNT(x) (((x) >> 26) & 0x3F) +#define C_SQ_VTX_WORD0_MEGA_FETCH_COUNT 0x03FFFFFF +#define P_SQ_VTX_WORD1 +#define S_SQ_VTX_WORD1_DST_SEL_X(x) (((x) & 0x7) << 9) +#define G_SQ_VTX_WORD1_DST_SEL_X(x) (((x) >> 9) & 0x7) +#define C_SQ_VTX_WORD1_DST_SEL_X 0xFFFFF1FF +#define S_SQ_VTX_WORD1_DST_SEL_Y(x) (((x) & 0x7) << 12) +#define G_SQ_VTX_WORD1_DST_SEL_Y(x) (((x) >> 12) & 0x7) +#define C_SQ_VTX_WORD1_DST_SEL_Y 0xFFFF8FFF +#define S_SQ_VTX_WORD1_DST_SEL_Z(x) (((x) & 0x7) << 15) +#define G_SQ_VTX_WORD1_DST_SEL_Z(x) (((x) >> 15) & 0x7) +#define C_SQ_VTX_WORD1_DST_SEL_Z 0xFFFC7FFF +#define S_SQ_VTX_WORD1_DST_SEL_W(x) (((x) & 0x7) << 18) +#define G_SQ_VTX_WORD1_DST_SEL_W(x) (((x) >> 18) & 0x7) +#define C_SQ_VTX_WORD1_DST_SEL_W 0xFFE3FFFF +#define S_SQ_VTX_WORD1_USE_CONST_FIELDS(x) (((x) & 0x1) << 21) +#define G_SQ_VTX_WORD1_USE_CONST_FIELDS(x) (((x) >> 21) & 0x1) +#define C_SQ_VTX_WORD1_USE_CONST_FIELDS 0xFFDFFFFF +#define S_SQ_VTX_WORD1_DATA_FORMAT(x) (((x) & 0x3F) << 22) +#define G_SQ_VTX_WORD1_DATA_FORMAT(x) (((x) >> 22) & 0x3F) +#define C_SQ_VTX_WORD1_DATA_FORMAT 0xF03FFFFF +#define S_SQ_VTX_WORD1_NUM_FORMAT_ALL(x) (((x) & 0x3) << 28) +#define G_SQ_VTX_WORD1_NUM_FORMAT_ALL(x) (((x) >> 28) & 0x3) +#define C_SQ_VTX_WORD1_NUM_FORMAT_ALL 0xCFFFFFFF +#define S_SQ_VTX_WORD1_FORMAT_COMP_ALL(x) (((x) & 0x1) << 30) +#define G_SQ_VTX_WORD1_FORMAT_COMP_ALL(x) (((x) >> 30) & 0x1) +#define C_SQ_VTX_WORD1_FORMAT_COMP_ALL 0xBFFFFFFF +#define S_SQ_VTX_WORD1_SRF_MODE_ALL(x) (((x) & 0x1) << 31) +#define G_SQ_VTX_WORD1_SRF_MODE_ALL(x) (((x) >> 31) & 0x1) +#define C_SQ_VTX_WORD1_SRF_MODE_ALL 0x7FFFFFFF +#define P_SQ_VTX_WORD1_GPR +#define S_SQ_VTX_WORD1_GPR_DST_GPR(x) (((x) & 0x7F) << 0) +#define G_SQ_VTX_WORD1_GPR_DST_GPR(x) (((x) >> 0) & 0x7F) +#define C_SQ_VTX_WORD1_GPR_DST_GPR 0xFFFFFF80 +#define S_SQ_VTX_WORD1_GPR_DST_REL(x) (((x) & 0x1) << 7) +#define G_SQ_VTX_WORD1_GPR_DST_REL(x) (((x) >> 7) & 0x1) +#define C_SQ_VTX_WORD1_GPR_DST_REL 0xFFFFFF7F +#define P_SQ_VTX_WORD1_SEM +#define S_SQ_VTX_WORD1_SEM_SEMANTIC_ID(x) (((x) & 0xFF) << 0) +#define G_SQ_VTX_WORD1_SEM_SEMANTIC_ID(x) (((x) >> 0) & 0xFF) +#define C_SQ_VTX_WORD1_SEM_SEMANTIC_ID 0xFFFFFF00 +#define P_SQ_VTX_WORD2 +#define S_SQ_VTX_WORD2_OFFSET(x) (((x) & 0xFFFF) << 0) +#define G_SQ_VTX_WORD2_OFFSET(x) (((x) >> 0) & 0xFFFF) +#define C_SQ_VTX_WORD2_OFFSET 0xFFFF0000 +#define S_SQ_VTX_WORD2_ENDIAN_SWAP(x) (((x) & 0x3) << 16) +#define G_SQ_VTX_WORD2_ENDIAN_SWAP(x) (((x) >> 16) & 0x3) +#define C_SQ_VTX_WORD2_ENDIAN_SWAP 0xFFFCFFFF +#define S_SQ_VTX_WORD2_CONST_BUF_NO_STRIDE(x) (((x) & 0x1) << 18) +#define G_SQ_VTX_WORD2_CONST_BUF_NO_STRIDE(x) (((x) >> 18) & 0x1) +#define C_SQ_VTX_WORD2_CONST_BUF_NO_STRIDE 0xFFFBFFFF +#define S_SQ_VTX_WORD2_MEGA_FETCH(x) (((x) & 0x1) << 19) +#define G_SQ_VTX_WORD2_MEGA_FETCH(x) (((x) >> 19) & 0x1) +#define C_SQ_VTX_WORD2_MEGA_FETCH 0xFFF7FFFF +#define S_SQ_VTX_WORD2_ALT_CONST(x) (((x) & 0x1) << 20) +#define G_SQ_VTX_WORD2_ALT_CONST(x) (((x) >> 20) & 0x1) +#define C_SQ_VTX_WORD2_ALT_CONST 0xFFEFFFFF +#define P_SQ_TEX_WORD0 +#define S_SQ_TEX_WORD0_TEX_INST(x) (((x) & 0x1F) << 0) +#define G_SQ_TEX_WORD0_TEX_INST(x) (((x) >> 0) & 0x1F) +#define C_SQ_TEX_WORD0_TEX_INST 0xFFFFFFE0 +#define S_SQ_TEX_WORD0_BC_FRAC_MODE(x) (((x) & 0x1) << 5) +#define G_SQ_TEX_WORD0_BC_FRAC_MODE(x) (((x) >> 5) & 0x1) +#define C_SQ_TEX_WORD0_BC_FRAC_MODE 0xFFFFFFDF +#define S_SQ_TEX_WORD0_FETCH_WHOLE_QUAD(x) (((x) & 0x1) << 7) +#define G_SQ_TEX_WORD0_FETCH_WHOLE_QUAD(x) (((x) >> 7) & 0x1) +#define C_SQ_TEX_WORD0_FETCH_WHOLE_QUAD 0xFFFFFF7F +#define S_SQ_TEX_WORD0_RESOURCE_ID(x) (((x) & 0xFF) << 8) +#define G_SQ_TEX_WORD0_RESOURCE_ID(x) (((x) >> 8) & 0xFF) +#define C_SQ_TEX_WORD0_RESOURCE_ID 0xFFFF00FF +#define S_SQ_TEX_WORD0_SRC_GPR(x) (((x) & 0x7F) << 16) +#define G_SQ_TEX_WORD0_SRC_GPR(x) (((x) >> 16) & 0x7F) +#define C_SQ_TEX_WORD0_SRC_GPR 0xFF80FFFF +#define S_SQ_TEX_WORD0_SRC_REL(x) (((x) & 0x1) << 23) +#define G_SQ_TEX_WORD0_SRC_REL(x) (((x) >> 23) & 0x1) +#define C_SQ_TEX_WORD0_SRC_REL 0xFF7FFFFF +#define S_SQ_TEX_WORD0_ALT_CONST(x) (((x) & 0x1) << 24) +#define G_SQ_TEX_WORD0_ALT_CONST(x) (((x) >> 24) & 0x1) +#define C_SQ_TEX_WORD0_ALT_CONST 0xFEFFFFFF +#define P_SQ_TEX_WORD1 +#define S_SQ_TEX_WORD1_DST_GPR(x) (((x) & 0x7F) << 0) +#define G_SQ_TEX_WORD1_DST_GPR(x) (((x) >> 0) & 0x7F) +#define C_SQ_TEX_WORD1_DST_GPR 0xFFFFFF80 +#define S_SQ_TEX_WORD1_DST_REL(x) (((x) & 0x1) << 7) +#define G_SQ_TEX_WORD1_DST_REL(x) (((x) >> 7) & 0x1) +#define C_SQ_TEX_WORD1_DST_REL 0xFFFFFF7F +#define S_SQ_TEX_WORD1_DST_SEL_X(x) (((x) & 0x7) << 9) +#define G_SQ_TEX_WORD1_DST_SEL_X(x) (((x) >> 9) & 0x7) +#define C_SQ_TEX_WORD1_DST_SEL_X 0xFFFFF1FF +#define S_SQ_TEX_WORD1_DST_SEL_Y(x) (((x) & 0x7) << 12) +#define G_SQ_TEX_WORD1_DST_SEL_Y(x) (((x) >> 12) & 0x7) +#define C_SQ_TEX_WORD1_DST_SEL_Y 0xFFFF8FFF +#define S_SQ_TEX_WORD1_DST_SEL_Z(x) (((x) & 0x7) << 15) +#define G_SQ_TEX_WORD1_DST_SEL_Z(x) (((x) >> 15) & 0x7) +#define C_SQ_TEX_WORD1_DST_SEL_Z 0xFFFC7FFF +#define S_SQ_TEX_WORD1_DST_SEL_W(x) (((x) & 0x7) << 18) +#define G_SQ_TEX_WORD1_DST_SEL_W(x) (((x) >> 18) & 0x7) +#define C_SQ_TEX_WORD1_DST_SEL_W 0xFFE3FFFF +#define S_SQ_TEX_WORD1_LOD_BIAS(x) (((x) & 0x7F) << 21) +#define G_SQ_TEX_WORD1_LOD_BIAS(x) (((x) >> 21) & 0x7F) +#define C_SQ_TEX_WORD1_LOD_BIAS 0xF01FFFFF +#define S_SQ_TEX_WORD1_COORD_TYPE_X(x) (((x) & 0x1) << 28) +#define G_SQ_TEX_WORD1_COORD_TYPE_X(x) (((x) >> 28) & 0x1) +#define C_SQ_TEX_WORD1_COORD_TYPE_X 0xEFFFFFFF +#define S_SQ_TEX_WORD1_COORD_TYPE_Y(x) (((x) & 0x1) << 29) +#define G_SQ_TEX_WORD1_COORD_TYPE_Y(x) (((x) >> 29) & 0x1) +#define C_SQ_TEX_WORD1_COORD_TYPE_Y 0xDFFFFFFF +#define S_SQ_TEX_WORD1_COORD_TYPE_Z(x) (((x) & 0x1) << 30) +#define G_SQ_TEX_WORD1_COORD_TYPE_Z(x) (((x) >> 30) & 0x1) +#define C_SQ_TEX_WORD1_COORD_TYPE_Z 0xBFFFFFFF +#define S_SQ_TEX_WORD1_COORD_TYPE_W(x) (((x) & 0x1) << 31) +#define G_SQ_TEX_WORD1_COORD_TYPE_W(x) (((x) >> 31) & 0x1) +#define C_SQ_TEX_WORD1_COORD_TYPE_W 0x7FFFFFFF +#define P_SQ_TEX_WORD2 +#define S_SQ_TEX_WORD2_OFFSET_X(x) (((x) & 0x1F) << 0) +#define G_SQ_TEX_WORD2_OFFSET_X(x) (((x) >> 0) & 0x1F) +#define C_SQ_TEX_WORD2_OFFSET_X 0xFFFFFFE0 +#define S_SQ_TEX_WORD2_OFFSET_Y(x) (((x) & 0x1F) << 5) +#define G_SQ_TEX_WORD2_OFFSET_Y(x) (((x) >> 5) & 0x1F) +#define C_SQ_TEX_WORD2_OFFSET_Y 0xFFFFFC1F +#define S_SQ_TEX_WORD2_OFFSET_Z(x) (((x) & 0x1F) << 10) +#define G_SQ_TEX_WORD2_OFFSET_Z(x) (((x) >> 10) & 0x1F) +#define C_SQ_TEX_WORD2_OFFSET_Z 0xFFFF83FF +#define S_SQ_TEX_WORD2_SAMPLER_ID(x) (((x) & 0x1F) << 15) +#define G_SQ_TEX_WORD2_SAMPLER_ID(x) (((x) >> 15) & 0x1F) +#define C_SQ_TEX_WORD2_SAMPLER_ID 0xFFF07FFF +#define S_SQ_TEX_WORD2_SRC_SEL_X(x) (((x) & 0x7) << 20) +#define G_SQ_TEX_WORD2_SRC_SEL_X(x) (((x) >> 20) & 0x7) +#define C_SQ_TEX_WORD2_SRC_SEL_X 0xFF8FFFFF +#define S_SQ_TEX_WORD2_SRC_SEL_Y(x) (((x) & 0x7) << 23) +#define G_SQ_TEX_WORD2_SRC_SEL_Y(x) (((x) >> 23) & 0x7) +#define C_SQ_TEX_WORD2_SRC_SEL_Y 0xFC7FFFFF +#define S_SQ_TEX_WORD2_SRC_SEL_Z(x) (((x) & 0x7) << 26) +#define G_SQ_TEX_WORD2_SRC_SEL_Z(x) (((x) >> 26) & 0x7) +#define C_SQ_TEX_WORD2_SRC_SEL_Z 0xE3FFFFFF +#define S_SQ_TEX_WORD2_SRC_SEL_W(x) (((x) & 0x7) << 29) +#define G_SQ_TEX_WORD2_SRC_SEL_W(x) (((x) >> 29) & 0x7) +#define C_SQ_TEX_WORD2_SRC_SEL_W 0x1FFFFFFF +#define P_SQ_ALU_WORD1_OP2_V2 +#define S_SQ_ALU_WORD1_OP2_V2_SRC0_ABS(x) (((x) & 0x1) << 0) +#define G_SQ_ALU_WORD1_OP2_V2_SRC0_ABS(x) (((x) >> 0) & 0x1) +#define C_SQ_ALU_WORD1_OP2_V2_SRC0_ABS 0xFFFFFFFE +#define S_SQ_ALU_WORD1_OP2_V2_SRC1_ABS(x) (((x) & 0x1) << 1) +#define G_SQ_ALU_WORD1_OP2_V2_SRC1_ABS(x) (((x) >> 1) & 0x1) +#define C_SQ_ALU_WORD1_OP2_V2_SRC1_ABS 0xFFFFFFFD +#define S_SQ_ALU_WORD1_OP2_V2_UPDATE_EXECUTE_MASK(x) (((x) & 0x1) << 2) +#define G_SQ_ALU_WORD1_OP2_V2_UPDATE_EXECUTE_MASK(x) (((x) >> 2) & 0x1) +#define C_SQ_ALU_WORD1_OP2_V2_UPDATE_EXECUTE_MASK 0xFFFFFFFB +#define S_SQ_ALU_WORD1_OP2_V2_UPDATE_PRED(x) (((x) & 0x1) << 3) +#define G_SQ_ALU_WORD1_OP2_V2_UPDATE_PRED(x) (((x) >> 3) & 0x1) +#define C_SQ_ALU_WORD1_OP2_V2_UPDATE_PRED 0xFFFFFFF7 +#define S_SQ_ALU_WORD1_OP2_V2_WRITE_MASK(x) (((x) & 0x1) << 4) +#define G_SQ_ALU_WORD1_OP2_V2_WRITE_MASK(x) (((x) >> 4) & 0x1) +#define C_SQ_ALU_WORD1_OP2_V2_WRITE_MASK 0xFFFFFFEF +#define S_SQ_ALU_WORD1_OP2_V2_OMOD(x) (((x) & 0x3) << 5) +#define G_SQ_ALU_WORD1_OP2_V2_OMOD(x) (((x) >> 5) & 0x3) +#define C_SQ_ALU_WORD1_OP2_V2_OMOD 0xFFFFFF9F +#define S_SQ_ALU_WORD1_OP2_V2_ALU_INST(x) (((x) & 0x7FF) << 7) +#define G_SQ_ALU_WORD1_OP2_V2_ALU_INST(x) (((x) >> 7) & 0x7FF) +#define C_SQ_ALU_WORD1_OP2_V2_ALU_INST 0xFFFC007F + +#endif diff --git a/src/gallium/drivers/r600/radeon.h b/src/gallium/drivers/r600/radeon.h new file mode 100644 index 00000000000..ec94b112d69 --- /dev/null +++ b/src/gallium/drivers/r600/radeon.h @@ -0,0 +1,602 @@ +/* + * Copyright © 2009 Jerome Glisse + * + * This file is free software; you can redistribute it and/or modify + * it under the terms of version 2 of the GNU General Public License + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software Foundation, + * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. + */ +#ifndef RADEON_H +#define RADEON_H + +#define RADEON_CTX_MAX_PM4 (64 * 1024 / 4) + +#include + +typedef uint64_t u64; +typedef uint32_t u32; +typedef uint16_t u16; +typedef uint8_t u8; + +struct radeon; + +struct pipe_screen *radeon_create_screen(struct radeon *rw); + +enum radeon_family { + CHIP_UNKNOWN, + CHIP_R100, + CHIP_RV100, + CHIP_RS100, + CHIP_RV200, + CHIP_RS200, + CHIP_R200, + CHIP_RV250, + CHIP_RS300, + CHIP_RV280, + CHIP_R300, + CHIP_R350, + CHIP_RV350, + CHIP_RV380, + CHIP_R420, + CHIP_R423, + CHIP_RV410, + CHIP_RS400, + CHIP_RS480, + CHIP_RS600, + CHIP_RS690, + CHIP_RS740, + CHIP_RV515, + CHIP_R520, + CHIP_RV530, + CHIP_RV560, + CHIP_RV570, + CHIP_R580, + CHIP_R600, + CHIP_RV610, + CHIP_RV630, + CHIP_RV670, + CHIP_RV620, + CHIP_RV635, + CHIP_RS780, + CHIP_RS880, + CHIP_RV770, + CHIP_RV730, + CHIP_RV710, + CHIP_RV740, + CHIP_CEDAR, + CHIP_REDWOOD, + CHIP_JUNIPER, + CHIP_CYPRESS, + CHIP_HEMLOCK, + CHIP_LAST, +}; + +/* + * radeon object functions + */ +struct radeon_bo { + unsigned refcount; + unsigned handle; + unsigned size; + unsigned alignment; + unsigned map_count; + void *data; +}; +struct radeon_bo *radeon_bo(struct radeon *radeon, unsigned handle, + unsigned size, unsigned alignment, void *ptr); +int radeon_bo_map(struct radeon *radeon, struct radeon_bo *bo); +void radeon_bo_unmap(struct radeon *radeon, struct radeon_bo *bo); +struct radeon_bo *radeon_bo_incref(struct radeon *radeon, struct radeon_bo *bo); +struct radeon_bo *radeon_bo_decref(struct radeon *radeon, struct radeon_bo *bo); +int radeon_bo_wait(struct radeon *radeon, struct radeon_bo *bo); + +/* + * states functions + */ +struct radeon_state { + struct radeon *radeon; + unsigned refcount; + unsigned type; + unsigned id; + unsigned nstates; + u32 *states; + unsigned npm4; + unsigned cpm4; + u32 pm4_crc; + u32 *pm4; + u32 nimmd; + u32 *immd; + unsigned nbo; + struct radeon_bo *bo[4]; + unsigned nreloc; + unsigned reloc_pm4_id[8]; + unsigned reloc_bo_id[8]; + u32 placement[8]; + unsigned bo_dirty[4]; +}; + +struct radeon_state *radeon_state(struct radeon *radeon, u32 type, u32 id); +struct radeon_state *radeon_state_incref(struct radeon_state *state); +struct radeon_state *radeon_state_decref(struct radeon_state *state); +int radeon_state_pm4(struct radeon_state *state); + +/* + * draw functions + */ +struct radeon_draw { + unsigned refcount; + struct radeon *radeon; + unsigned nstate; + struct radeon_state **state; + unsigned cpm4; +}; + +struct radeon_draw *radeon_draw(struct radeon *radeon); +struct radeon_draw *radeon_draw_duplicate(struct radeon_draw *draw); +struct radeon_draw *radeon_draw_incref(struct radeon_draw *draw); +struct radeon_draw *radeon_draw_decref(struct radeon_draw *draw); +int radeon_draw_set(struct radeon_draw *draw, struct radeon_state *state); +int radeon_draw_set_new(struct radeon_draw *draw, struct radeon_state *state); +int radeon_draw_check(struct radeon_draw *draw); + +struct radeon_ctx *radeon_ctx(struct radeon *radeon); +struct radeon_ctx *radeon_ctx_decref(struct radeon_ctx *ctx); +struct radeon_ctx *radeon_ctx_incref(struct radeon_ctx *ctx); +int radeon_ctx_set_draw(struct radeon_ctx *ctx, struct radeon_draw *draw); +int radeon_ctx_set_draw_new(struct radeon_ctx *ctx, struct radeon_draw *draw); +int radeon_ctx_pm4(struct radeon_ctx *ctx); +int radeon_ctx_submit(struct radeon_ctx *ctx); +void radeon_ctx_dump_bof(struct radeon_ctx *ctx, const char *file); + +/* + * R600/R700 + */ + +#define R600_NSTATE 1273 +#define R600_NTYPE 25 + +#define R600_CONFIG 0 +#define R600_CONFIG_TYPE 0 +#define R600_CB_CNTL 1 +#define R600_CB_CNTL_TYPE 1 +#define R600_RASTERIZER 2 +#define R600_RASTERIZER_TYPE 2 +#define R600_VIEWPORT 3 +#define R600_VIEWPORT_TYPE 3 +#define R600_SCISSOR 4 +#define R600_SCISSOR_TYPE 4 +#define R600_BLEND 5 +#define R600_BLEND_TYPE 5 +#define R600_DSA 6 +#define R600_DSA_TYPE 6 +#define R600_VS_SHADER 7 +#define R600_VS_SHADER_TYPE 7 +#define R600_PS_SHADER 8 +#define R600_PS_SHADER_TYPE 8 +#define R600_PS_CONSTANT 9 +#define R600_PS_CONSTANT_TYPE 9 +#define R600_VS_CONSTANT 265 +#define R600_VS_CONSTANT_TYPE 10 +#define R600_PS_RESOURCE 521 +#define R600_PS_RESOURCE_TYPE 11 +#define R600_VS_RESOURCE 681 +#define R600_VS_RESOURCE_TYPE 12 +#define R600_FS_RESOURCE 841 +#define R600_FS_RESOURCE_TYPE 13 +#define R600_GS_RESOURCE 1001 +#define R600_GS_RESOURCE_TYPE 14 +#define R600_PS_SAMPLER 1161 +#define R600_PS_SAMPLER_TYPE 15 +#define R600_VS_SAMPLER 1179 +#define R600_VS_SAMPLER_TYPE 16 +#define R600_GS_SAMPLER 1197 +#define R600_GS_SAMPLER_TYPE 17 +#define R600_PS_SAMPLER_BORDER 1215 +#define R600_PS_SAMPLER_BORDER_TYPE 18 +#define R600_VS_SAMPLER_BORDER 1233 +#define R600_VS_SAMPLER_BORDER_TYPE 19 +#define R600_GS_SAMPLER_BORDER 1251 +#define R600_GS_SAMPLER_BORDER_TYPE 20 +#define R600_CB0 1269 +#define R600_CB0_TYPE 21 +#define R600_DB 1270 +#define R600_DB_TYPE 22 +#define R600_VGT 1271 +#define R600_VGT_TYPE 23 +#define R600_DRAW 1272 +#define R600_DRAW_TYPE 24 +/* R600_CONFIG */ +#define R600_CONFIG__SQ_CONFIG 0 +#define R600_CONFIG__SQ_GPR_RESOURCE_MGMT_1 1 +#define R600_CONFIG__SQ_GPR_RESOURCE_MGMT_2 2 +#define R600_CONFIG__SQ_THREAD_RESOURCE_MGMT 3 +#define R600_CONFIG__SQ_STACK_RESOURCE_MGMT_1 4 +#define R600_CONFIG__SQ_STACK_RESOURCE_MGMT_2 5 +#define R600_CONFIG__SQ_DYN_GPR_CNTL_PS_FLUSH_REQ 6 +#define R600_CONFIG__TA_CNTL_AUX 7 +#define R600_CONFIG__VC_ENHANCE 8 +#define R600_CONFIG__DB_DEBUG 9 +#define R600_CONFIG__DB_WATERMARKS 10 +#define R600_CONFIG__SX_MISC 11 +#define R600_CONFIG__SPI_THREAD_GROUPING 12 +#define R600_CONFIG__CB_SHADER_CONTROL 13 +#define R600_CONFIG__SQ_ESGS_RING_ITEMSIZE 14 +#define R600_CONFIG__SQ_GSVS_RING_ITEMSIZE 15 +#define R600_CONFIG__SQ_ESTMP_RING_ITEMSIZE 16 +#define R600_CONFIG__SQ_GSTMP_RING_ITEMSIZE 17 +#define R600_CONFIG__SQ_VSTMP_RING_ITEMSIZE 18 +#define R600_CONFIG__SQ_PSTMP_RING_ITEMSIZE 19 +#define R600_CONFIG__SQ_FBUF_RING_ITEMSIZE 20 +#define R600_CONFIG__SQ_REDUC_RING_ITEMSIZE 21 +#define R600_CONFIG__SQ_GS_VERT_ITEMSIZE 22 +#define R600_CONFIG__VGT_OUTPUT_PATH_CNTL 23 +#define R600_CONFIG__VGT_HOS_CNTL 24 +#define R600_CONFIG__VGT_HOS_MAX_TESS_LEVEL 25 +#define R600_CONFIG__VGT_HOS_MIN_TESS_LEVEL 26 +#define R600_CONFIG__VGT_HOS_REUSE_DEPTH 27 +#define R600_CONFIG__VGT_GROUP_PRIM_TYPE 28 +#define R600_CONFIG__VGT_GROUP_FIRST_DECR 29 +#define R600_CONFIG__VGT_GROUP_DECR 30 +#define R600_CONFIG__VGT_GROUP_VECT_0_CNTL 31 +#define R600_CONFIG__VGT_GROUP_VECT_1_CNTL 32 +#define R600_CONFIG__VGT_GROUP_VECT_0_FMT_CNTL 33 +#define R600_CONFIG__VGT_GROUP_VECT_1_FMT_CNTL 34 +#define R600_CONFIG__VGT_GS_MODE 35 +#define R600_CONFIG__PA_SC_MODE_CNTL 36 +#define R600_CONFIG__VGT_STRMOUT_EN 37 +#define R600_CONFIG__VGT_REUSE_OFF 38 +#define R600_CONFIG__VGT_VTX_CNT_EN 39 +#define R600_CONFIG__VGT_STRMOUT_BUFFER_EN 40 +#define R600_CONFIG_SIZE 41 +#define R600_CONFIG_PM4 128 +/* R600_CB_CNTL */ +#define R600_CB_CNTL__CB_CLEAR_RED 0 +#define R600_CB_CNTL__CB_CLEAR_GREEN 1 +#define R600_CB_CNTL__CB_CLEAR_BLUE 2 +#define R600_CB_CNTL__CB_CLEAR_ALPHA 3 +#define R600_CB_CNTL__CB_SHADER_MASK 4 +#define R600_CB_CNTL__CB_TARGET_MASK 5 +#define R600_CB_CNTL__CB_FOG_RED 6 +#define R600_CB_CNTL__CB_FOG_GREEN 7 +#define R600_CB_CNTL__CB_FOG_BLUE 8 +#define R600_CB_CNTL__CB_COLOR_CONTROL 9 +#define R600_CB_CNTL__PA_SC_AA_CONFIG 10 +#define R600_CB_CNTL__PA_SC_AA_SAMPLE_LOCS_MCTX 11 +#define R600_CB_CNTL__PA_SC_AA_SAMPLE_LOCS_8S_WD1_MCTX 12 +#define R600_CB_CNTL__CB_CLRCMP_CONTROL 13 +#define R600_CB_CNTL__CB_CLRCMP_SRC 14 +#define R600_CB_CNTL__CB_CLRCMP_DST 15 +#define R600_CB_CNTL__CB_CLRCMP_MSK 16 +#define R600_CB_CNTL__PA_SC_AA_MASK 17 +#define R600_CB_CNTL_SIZE 18 +#define R600_CB_CNTL_PM4 128 +/* R600_RASTERIZER */ +#define R600_RASTERIZER__SPI_INTERP_CONTROL_0 0 +#define R600_RASTERIZER__PA_CL_CLIP_CNTL 1 +#define R600_RASTERIZER__PA_SU_SC_MODE_CNTL 2 +#define R600_RASTERIZER__PA_CL_VS_OUT_CNTL 3 +#define R600_RASTERIZER__PA_CL_NANINF_CNTL 4 +#define R600_RASTERIZER__PA_SU_POINT_SIZE 5 +#define R600_RASTERIZER__PA_SU_POINT_MINMAX 6 +#define R600_RASTERIZER__PA_SU_LINE_CNTL 7 +#define R600_RASTERIZER__PA_SC_LINE_STIPPLE 8 +#define R600_RASTERIZER__PA_SC_MPASS_PS_CNTL 9 +#define R600_RASTERIZER__PA_SC_LINE_CNTL 10 +#define R600_RASTERIZER__PA_CL_GB_VERT_CLIP_ADJ 11 +#define R600_RASTERIZER__PA_CL_GB_VERT_DISC_ADJ 12 +#define R600_RASTERIZER__PA_CL_GB_HORZ_CLIP_ADJ 13 +#define R600_RASTERIZER__PA_CL_GB_HORZ_DISC_ADJ 14 +#define R600_RASTERIZER__PA_SU_POLY_OFFSET_DB_FMT_CNTL 15 +#define R600_RASTERIZER__PA_SU_POLY_OFFSET_CLAMP 16 +#define R600_RASTERIZER__PA_SU_POLY_OFFSET_FRONT_SCALE 17 +#define R600_RASTERIZER__PA_SU_POLY_OFFSET_FRONT_OFFSET 18 +#define R600_RASTERIZER__PA_SU_POLY_OFFSET_BACK_SCALE 19 +#define R600_RASTERIZER__PA_SU_POLY_OFFSET_BACK_OFFSET 20 +#define R600_RASTERIZER_SIZE 21 +#define R600_RASTERIZER_PM4 128 +/* R600_VIEWPORT */ +#define R600_VIEWPORT__PA_SC_VPORT_ZMIN_0 0 +#define R600_VIEWPORT__PA_SC_VPORT_ZMAX_0 1 +#define R600_VIEWPORT__PA_CL_VPORT_XSCALE_0 2 +#define R600_VIEWPORT__PA_CL_VPORT_YSCALE_0 3 +#define R600_VIEWPORT__PA_CL_VPORT_ZSCALE_0 4 +#define R600_VIEWPORT__PA_CL_VPORT_XOFFSET_0 5 +#define R600_VIEWPORT__PA_CL_VPORT_YOFFSET_0 6 +#define R600_VIEWPORT__PA_CL_VPORT_ZOFFSET_0 7 +#define R600_VIEWPORT__PA_CL_VTE_CNTL 8 +#define R600_VIEWPORT_SIZE 9 +#define R600_VIEWPORT_PM4 128 +/* R600_SCISSOR */ +#define R600_SCISSOR__PA_SC_SCREEN_SCISSOR_TL 0 +#define R600_SCISSOR__PA_SC_SCREEN_SCISSOR_BR 1 +#define R600_SCISSOR__PA_SC_WINDOW_OFFSET 2 +#define R600_SCISSOR__PA_SC_WINDOW_SCISSOR_TL 3 +#define R600_SCISSOR__PA_SC_WINDOW_SCISSOR_BR 4 +#define R600_SCISSOR__PA_SC_CLIPRECT_RULE 5 +#define R600_SCISSOR__PA_SC_CLIPRECT_0_TL 6 +#define R600_SCISSOR__PA_SC_CLIPRECT_0_BR 7 +#define R600_SCISSOR__PA_SC_CLIPRECT_1_TL 8 +#define R600_SCISSOR__PA_SC_CLIPRECT_1_BR 9 +#define R600_SCISSOR__PA_SC_CLIPRECT_2_TL 10 +#define R600_SCISSOR__PA_SC_CLIPRECT_2_BR 11 +#define R600_SCISSOR__PA_SC_CLIPRECT_3_TL 12 +#define R600_SCISSOR__PA_SC_CLIPRECT_3_BR 13 +#define R600_SCISSOR__PA_SC_EDGERULE 14 +#define R600_SCISSOR__PA_SC_GENERIC_SCISSOR_TL 15 +#define R600_SCISSOR__PA_SC_GENERIC_SCISSOR_BR 16 +#define R600_SCISSOR__PA_SC_VPORT_SCISSOR_0_TL 17 +#define R600_SCISSOR__PA_SC_VPORT_SCISSOR_0_BR 18 +#define R600_SCISSOR_SIZE 19 +#define R600_SCISSOR_PM4 128 +/* R600_BLEND */ +#define R600_BLEND__CB_BLEND_RED 0 +#define R600_BLEND__CB_BLEND_GREEN 1 +#define R600_BLEND__CB_BLEND_BLUE 2 +#define R600_BLEND__CB_BLEND_ALPHA 3 +#define R600_BLEND__CB_BLEND0_CONTROL 4 +#define R600_BLEND__CB_BLEND1_CONTROL 5 +#define R600_BLEND__CB_BLEND2_CONTROL 6 +#define R600_BLEND__CB_BLEND3_CONTROL 7 +#define R600_BLEND__CB_BLEND4_CONTROL 8 +#define R600_BLEND__CB_BLEND5_CONTROL 9 +#define R600_BLEND__CB_BLEND6_CONTROL 10 +#define R600_BLEND__CB_BLEND7_CONTROL 11 +#define R600_BLEND__CB_BLEND_CONTROL 12 +#define R600_BLEND_SIZE 13 +#define R600_BLEND_PM4 128 +/* R600_DSA */ +#define R600_DSA__DB_STENCIL_CLEAR 0 +#define R600_DSA__DB_DEPTH_CLEAR 1 +#define R600_DSA__SX_ALPHA_TEST_CONTROL 2 +#define R600_DSA__DB_STENCILREFMASK 3 +#define R600_DSA__DB_STENCILREFMASK_BF 4 +#define R600_DSA__SX_ALPHA_REF 5 +#define R600_DSA__SPI_FOG_FUNC_SCALE 6 +#define R600_DSA__SPI_FOG_FUNC_BIAS 7 +#define R600_DSA__SPI_FOG_CNTL 8 +#define R600_DSA__DB_DEPTH_CONTROL 9 +#define R600_DSA__DB_SHADER_CONTROL 10 +#define R600_DSA__DB_RENDER_CONTROL 11 +#define R600_DSA__DB_RENDER_OVERRIDE 12 +#define R600_DSA__DB_SRESULTS_COMPARE_STATE1 13 +#define R600_DSA__DB_PRELOAD_CONTROL 14 +#define R600_DSA__DB_ALPHA_TO_MASK 15 +#define R600_DSA_SIZE 16 +#define R600_DSA_PM4 128 +/* R600_VS_SHADER */ +#define R600_VS_SHADER__SQ_VTX_SEMANTIC_0 0 +#define R600_VS_SHADER__SQ_VTX_SEMANTIC_1 1 +#define R600_VS_SHADER__SQ_VTX_SEMANTIC_2 2 +#define R600_VS_SHADER__SQ_VTX_SEMANTIC_3 3 +#define R600_VS_SHADER__SQ_VTX_SEMANTIC_4 4 +#define R600_VS_SHADER__SQ_VTX_SEMANTIC_5 5 +#define R600_VS_SHADER__SQ_VTX_SEMANTIC_6 6 +#define R600_VS_SHADER__SQ_VTX_SEMANTIC_7 7 +#define R600_VS_SHADER__SQ_VTX_SEMANTIC_8 8 +#define R600_VS_SHADER__SQ_VTX_SEMANTIC_9 9 +#define R600_VS_SHADER__SQ_VTX_SEMANTIC_10 10 +#define R600_VS_SHADER__SQ_VTX_SEMANTIC_11 11 +#define R600_VS_SHADER__SQ_VTX_SEMANTIC_12 12 +#define R600_VS_SHADER__SQ_VTX_SEMANTIC_13 13 +#define R600_VS_SHADER__SQ_VTX_SEMANTIC_14 14 +#define R600_VS_SHADER__SQ_VTX_SEMANTIC_15 15 +#define R600_VS_SHADER__SQ_VTX_SEMANTIC_16 16 +#define R600_VS_SHADER__SQ_VTX_SEMANTIC_17 17 +#define R600_VS_SHADER__SQ_VTX_SEMANTIC_18 18 +#define R600_VS_SHADER__SQ_VTX_SEMANTIC_19 19 +#define R600_VS_SHADER__SQ_VTX_SEMANTIC_20 20 +#define R600_VS_SHADER__SQ_VTX_SEMANTIC_21 21 +#define R600_VS_SHADER__SQ_VTX_SEMANTIC_22 22 +#define R600_VS_SHADER__SQ_VTX_SEMANTIC_23 23 +#define R600_VS_SHADER__SQ_VTX_SEMANTIC_24 24 +#define R600_VS_SHADER__SQ_VTX_SEMANTIC_25 25 +#define R600_VS_SHADER__SQ_VTX_SEMANTIC_26 26 +#define R600_VS_SHADER__SQ_VTX_SEMANTIC_27 27 +#define R600_VS_SHADER__SQ_VTX_SEMANTIC_28 28 +#define R600_VS_SHADER__SQ_VTX_SEMANTIC_29 29 +#define R600_VS_SHADER__SQ_VTX_SEMANTIC_30 30 +#define R600_VS_SHADER__SQ_VTX_SEMANTIC_31 31 +#define R600_VS_SHADER__SPI_VS_OUT_ID_0 32 +#define R600_VS_SHADER__SPI_VS_OUT_ID_1 33 +#define R600_VS_SHADER__SPI_VS_OUT_ID_2 34 +#define R600_VS_SHADER__SPI_VS_OUT_ID_3 35 +#define R600_VS_SHADER__SPI_VS_OUT_ID_4 36 +#define R600_VS_SHADER__SPI_VS_OUT_ID_5 37 +#define R600_VS_SHADER__SPI_VS_OUT_ID_6 38 +#define R600_VS_SHADER__SPI_VS_OUT_ID_7 39 +#define R600_VS_SHADER__SPI_VS_OUT_ID_8 40 +#define R600_VS_SHADER__SPI_VS_OUT_ID_9 41 +#define R600_VS_SHADER__SPI_VS_OUT_CONFIG 42 +#define R600_VS_SHADER__SQ_PGM_START_VS 43 +#define R600_VS_SHADER__SQ_PGM_RESOURCES_VS 44 +#define R600_VS_SHADER__SQ_PGM_START_FS 45 +#define R600_VS_SHADER__SQ_PGM_RESOURCES_FS 46 +#define R600_VS_SHADER__SQ_PGM_CF_OFFSET_VS 47 +#define R600_VS_SHADER__SQ_PGM_CF_OFFSET_FS 48 +#define R600_VS_SHADER_SIZE 49 +#define R600_VS_SHADER_PM4 128 +/* R600_PS_SHADER */ +#define R600_PS_SHADER__SPI_PS_INPUT_CNTL_0 0 +#define R600_PS_SHADER__SPI_PS_INPUT_CNTL_1 1 +#define R600_PS_SHADER__SPI_PS_INPUT_CNTL_2 2 +#define R600_PS_SHADER__SPI_PS_INPUT_CNTL_3 3 +#define R600_PS_SHADER__SPI_PS_INPUT_CNTL_4 4 +#define R600_PS_SHADER__SPI_PS_INPUT_CNTL_5 5 +#define R600_PS_SHADER__SPI_PS_INPUT_CNTL_6 6 +#define R600_PS_SHADER__SPI_PS_INPUT_CNTL_7 7 +#define R600_PS_SHADER__SPI_PS_INPUT_CNTL_8 8 +#define R600_PS_SHADER__SPI_PS_INPUT_CNTL_9 9 +#define R600_PS_SHADER__SPI_PS_INPUT_CNTL_10 10 +#define R600_PS_SHADER__SPI_PS_INPUT_CNTL_11 11 +#define R600_PS_SHADER__SPI_PS_INPUT_CNTL_12 12 +#define R600_PS_SHADER__SPI_PS_INPUT_CNTL_13 13 +#define R600_PS_SHADER__SPI_PS_INPUT_CNTL_14 14 +#define R600_PS_SHADER__SPI_PS_INPUT_CNTL_15 15 +#define R600_PS_SHADER__SPI_PS_INPUT_CNTL_16 16 +#define R600_PS_SHADER__SPI_PS_INPUT_CNTL_17 17 +#define R600_PS_SHADER__SPI_PS_INPUT_CNTL_18 18 +#define R600_PS_SHADER__SPI_PS_INPUT_CNTL_19 19 +#define R600_PS_SHADER__SPI_PS_INPUT_CNTL_20 20 +#define R600_PS_SHADER__SPI_PS_INPUT_CNTL_21 21 +#define R600_PS_SHADER__SPI_PS_INPUT_CNTL_22 22 +#define R600_PS_SHADER__SPI_PS_INPUT_CNTL_23 23 +#define R600_PS_SHADER__SPI_PS_INPUT_CNTL_24 24 +#define R600_PS_SHADER__SPI_PS_INPUT_CNTL_25 25 +#define R600_PS_SHADER__SPI_PS_INPUT_CNTL_26 26 +#define R600_PS_SHADER__SPI_PS_INPUT_CNTL_27 27 +#define R600_PS_SHADER__SPI_PS_INPUT_CNTL_28 28 +#define R600_PS_SHADER__SPI_PS_INPUT_CNTL_29 29 +#define R600_PS_SHADER__SPI_PS_INPUT_CNTL_30 30 +#define R600_PS_SHADER__SPI_PS_INPUT_CNTL_31 31 +#define R600_PS_SHADER__SPI_PS_IN_CONTROL_0 32 +#define R600_PS_SHADER__SPI_PS_IN_CONTROL_1 33 +#define R600_PS_SHADER__SPI_INPUT_Z 34 +#define R600_PS_SHADER__SQ_PGM_START_PS 35 +#define R600_PS_SHADER__SQ_PGM_RESOURCES_PS 36 +#define R600_PS_SHADER__SQ_PGM_EXPORTS_PS 37 +#define R600_PS_SHADER__SQ_PGM_CF_OFFSET_PS 38 +#define R600_PS_SHADER_SIZE 39 +#define R600_PS_SHADER_PM4 128 +/* R600_PS_CONSTANT */ +#define R600_PS_CONSTANT__SQ_ALU_CONSTANT0_0 0 +#define R600_PS_CONSTANT__SQ_ALU_CONSTANT1_0 1 +#define R600_PS_CONSTANT__SQ_ALU_CONSTANT2_0 2 +#define R600_PS_CONSTANT__SQ_ALU_CONSTANT3_0 3 +#define R600_PS_CONSTANT_SIZE 4 +#define R600_PS_CONSTANT_PM4 128 +/* R600_VS_CONSTANT */ +#define R600_VS_CONSTANT__SQ_ALU_CONSTANT0_256 0 +#define R600_VS_CONSTANT__SQ_ALU_CONSTANT1_256 1 +#define R600_VS_CONSTANT__SQ_ALU_CONSTANT2_256 2 +#define R600_VS_CONSTANT__SQ_ALU_CONSTANT3_256 3 +#define R600_VS_CONSTANT_SIZE 4 +#define R600_VS_CONSTANT_PM4 128 +/* R600_PS_RESOURCE */ +#define R600_PS_RESOURCE__RESOURCE0_WORD0 0 +#define R600_PS_RESOURCE__RESOURCE0_WORD1 1 +#define R600_PS_RESOURCE__RESOURCE0_WORD2 2 +#define R600_PS_RESOURCE__RESOURCE0_WORD3 3 +#define R600_PS_RESOURCE__RESOURCE0_WORD4 4 +#define R600_PS_RESOURCE__RESOURCE0_WORD5 5 +#define R600_PS_RESOURCE__RESOURCE0_WORD6 6 +#define R600_PS_RESOURCE_SIZE 7 +#define R600_PS_RESOURCE_PM4 128 +/* R600_VS_RESOURCE */ +#define R600_VS_RESOURCE__RESOURCE160_WORD0 0 +#define R600_VS_RESOURCE__RESOURCE160_WORD1 1 +#define R600_VS_RESOURCE__RESOURCE160_WORD2 2 +#define R600_VS_RESOURCE__RESOURCE160_WORD3 3 +#define R600_VS_RESOURCE__RESOURCE160_WORD4 4 +#define R600_VS_RESOURCE__RESOURCE160_WORD5 5 +#define R600_VS_RESOURCE__RESOURCE160_WORD6 6 +#define R600_VS_RESOURCE_SIZE 7 +#define R600_VS_RESOURCE_PM4 128 +/* R600_FS_RESOURCE */ +#define R600_FS_RESOURCE__RESOURCE320_WORD0 0 +#define R600_FS_RESOURCE__RESOURCE320_WORD1 1 +#define R600_FS_RESOURCE__RESOURCE320_WORD2 2 +#define R600_FS_RESOURCE__RESOURCE320_WORD3 3 +#define R600_FS_RESOURCE__RESOURCE320_WORD4 4 +#define R600_FS_RESOURCE__RESOURCE320_WORD5 5 +#define R600_FS_RESOURCE__RESOURCE320_WORD6 6 +#define R600_FS_RESOURCE_SIZE 7 +#define R600_FS_RESOURCE_PM4 128 +/* R600_GS_RESOURCE */ +#define R600_GS_RESOURCE__RESOURCE336_WORD0 0 +#define R600_GS_RESOURCE__RESOURCE336_WORD1 1 +#define R600_GS_RESOURCE__RESOURCE336_WORD2 2 +#define R600_GS_RESOURCE__RESOURCE336_WORD3 3 +#define R600_GS_RESOURCE__RESOURCE336_WORD4 4 +#define R600_GS_RESOURCE__RESOURCE336_WORD5 5 +#define R600_GS_RESOURCE__RESOURCE336_WORD6 6 +#define R600_GS_RESOURCE_SIZE 7 +#define R600_GS_RESOURCE_PM4 128 +/* R600_PS_SAMPLER */ +#define R600_PS_SAMPLER__SQ_TEX_SAMPLER_WORD0_0 0 +#define R600_PS_SAMPLER__SQ_TEX_SAMPLER_WORD1_0 1 +#define R600_PS_SAMPLER__SQ_TEX_SAMPLER_WORD2_0 2 +#define R600_PS_SAMPLER_SIZE 3 +#define R600_PS_SAMPLER_PM4 128 +/* R600_VS_SAMPLER */ +#define R600_VS_SAMPLER__SQ_TEX_SAMPLER_WORD0_18 0 +#define R600_VS_SAMPLER__SQ_TEX_SAMPLER_WORD1_18 1 +#define R600_VS_SAMPLER__SQ_TEX_SAMPLER_WORD2_18 2 +#define R600_VS_SAMPLER_SIZE 3 +#define R600_VS_SAMPLER_PM4 128 +/* R600_GS_SAMPLER */ +#define R600_GS_SAMPLER__SQ_TEX_SAMPLER_WORD0_36 0 +#define R600_GS_SAMPLER__SQ_TEX_SAMPLER_WORD1_36 1 +#define R600_GS_SAMPLER__SQ_TEX_SAMPLER_WORD2_36 2 +#define R600_GS_SAMPLER_SIZE 3 +#define R600_GS_SAMPLER_PM4 128 +/* R600_PS_SAMPLER_BORDER */ +#define R600_PS_SAMPLER_BORDER__TD_PS_SAMPLER0_BORDER_RED 0 +#define R600_PS_SAMPLER_BORDER__TD_PS_SAMPLER0_BORDER_GREEN 1 +#define R600_PS_SAMPLER_BORDER__TD_PS_SAMPLER0_BORDER_BLUE 2 +#define R600_PS_SAMPLER_BORDER__TD_PS_SAMPLER0_BORDER_ALPHA 3 +#define R600_PS_SAMPLER_BORDER_SIZE 4 +#define R600_PS_SAMPLER_BORDER_PM4 128 +/* R600_VS_SAMPLER_BORDER */ +#define R600_VS_SAMPLER_BORDER__TD_VS_SAMPLER0_BORDER_RED 0 +#define R600_VS_SAMPLER_BORDER__TD_VS_SAMPLER0_BORDER_GREEN 1 +#define R600_VS_SAMPLER_BORDER__TD_VS_SAMPLER0_BORDER_BLUE 2 +#define R600_VS_SAMPLER_BORDER__TD_VS_SAMPLER0_BORDER_ALPHA 3 +#define R600_VS_SAMPLER_BORDER_SIZE 4 +#define R600_VS_SAMPLER_BORDER_PM4 128 +/* R600_GS_SAMPLER_BORDER */ +#define R600_GS_SAMPLER_BORDER__TD_GS_SAMPLER0_BORDER_RED 0 +#define R600_GS_SAMPLER_BORDER__TD_GS_SAMPLER0_BORDER_GREEN 1 +#define R600_GS_SAMPLER_BORDER__TD_GS_SAMPLER0_BORDER_BLUE 2 +#define R600_GS_SAMPLER_BORDER__TD_GS_SAMPLER0_BORDER_ALPHA 3 +#define R600_GS_SAMPLER_BORDER_SIZE 4 +#define R600_GS_SAMPLER_BORDER_PM4 128 +/* R600_CB0 */ +#define R600_CB0__CB_COLOR0_BASE 0 +#define R600_CB0__CB_COLOR0_INFO 1 +#define R600_CB0__CB_COLOR0_SIZE 2 +#define R600_CB0__CB_COLOR0_VIEW 3 +#define R600_CB0__CB_COLOR0_FRAG 4 +#define R600_CB0__CB_COLOR0_TILE 5 +#define R600_CB0__CB_COLOR0_MASK 6 +#define R600_CB0_SIZE 7 +#define R600_CB0_PM4 128 +/* R600_DB */ +#define R600_DB__DB_DEPTH_BASE 0 +#define R600_DB__DB_DEPTH_SIZE 1 +#define R600_DB__DB_DEPTH_VIEW 2 +#define R600_DB__DB_DEPTH_INFO 3 +#define R600_DB__DB_HTILE_SURFACE 4 +#define R600_DB__DB_PREFETCH_LIMIT 5 +#define R600_DB_SIZE 6 +#define R600_DB_PM4 128 +/* R600_VGT */ +#define R600_VGT__VGT_PRIMITIVE_TYPE 0 +#define R600_VGT__VGT_MAX_VTX_INDX 1 +#define R600_VGT__VGT_MIN_VTX_INDX 2 +#define R600_VGT__VGT_INDX_OFFSET 3 +#define R600_VGT__VGT_MULTI_PRIM_IB_RESET_INDX 4 +#define R600_VGT__VGT_DMA_INDEX_TYPE 5 +#define R600_VGT__VGT_PRIMITIVEID_EN 6 +#define R600_VGT__VGT_DMA_NUM_INSTANCES 7 +#define R600_VGT__VGT_MULTI_PRIM_IB_RESET_EN 8 +#define R600_VGT__VGT_INSTANCE_STEP_RATE_0 9 +#define R600_VGT__VGT_INSTANCE_STEP_RATE_1 10 +#define R600_VGT_SIZE 11 +#define R600_VGT_PM4 128 +/* R600_DRAW */ +#define R600_DRAW__VGT_NUM_INDICES 0 +#define R600_DRAW__VGT_DMA_BASE_HI 1 +#define R600_DRAW__VGT_DMA_BASE 2 +#define R600_DRAW__VGT_DRAW_INITIATOR 3 +#define R600_DRAW_SIZE 4 +#define R600_DRAW_PM4 128 + +#endif -- cgit v1.2.3