From 49fa4a4e600cbb35c43a85fab2ed4aac3e6acccf Mon Sep 17 00:00:00 2001 From: Marek Olšák Date: Fri, 11 Nov 2016 21:14:03 +0100 Subject: gallium/radeon: add RADEON_SURF_OPTIMIZE_FOR_SPACE MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit FORCE_TILING should disable it. It has no effect now, but that may change soon. Tested-by: Edmondo Tommasina Reviewed-by: Nicolai Hähnle --- src/gallium/drivers/radeon/r600_texture.c | 2 ++ src/gallium/drivers/radeon/radeon_winsys.h | 1 + 2 files changed, 3 insertions(+) (limited to 'src/gallium/drivers') diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c index 97673ee2250..259ff36800c 100644 --- a/src/gallium/drivers/radeon/r600_texture.c +++ b/src/gallium/drivers/radeon/r600_texture.c @@ -253,6 +253,8 @@ static int r600_init_surface(struct r600_common_screen *rscreen, if (is_imported) flags |= RADEON_SURF_IMPORTED; + if (!(ptex->flags & R600_RESOURCE_FLAG_FORCE_TILING)) + flags |= RADEON_SURF_OPTIMIZE_FOR_SPACE; r = rscreen->ws->surface_init(rscreen->ws, ptex, flags, bpe, array_mode, surface); diff --git a/src/gallium/drivers/radeon/radeon_winsys.h b/src/gallium/drivers/radeon/radeon_winsys.h index 3e30e954574..3027c4a8b53 100644 --- a/src/gallium/drivers/radeon/radeon_winsys.h +++ b/src/gallium/drivers/radeon/radeon_winsys.h @@ -281,6 +281,7 @@ enum radeon_micro_mode { #define RADEON_SURF_DISABLE_DCC (1 << 22) #define RADEON_SURF_TC_COMPATIBLE_HTILE (1 << 23) #define RADEON_SURF_IMPORTED (1 << 24) +#define RADEON_SURF_OPTIMIZE_FOR_SPACE (1 << 25) struct radeon_surf_level { uint64_t offset; -- cgit v1.2.3