From 074f1f3c0c2cd15213a62eb7f589423ece6391c8 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Thu, 25 Aug 2016 12:15:29 -0700 Subject: vc4: Add support for the 2-bit LOAD_IMM variants. Extracted and fixed up from a patch by jonasarrow on github. This ended up not getting used for ddx/ddy, but seems like it might still be useful. --- src/gallium/drivers/vc4/vc4_qir.h | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) (limited to 'src/gallium/drivers/vc4/vc4_qir.h') diff --git a/src/gallium/drivers/vc4/vc4_qir.h b/src/gallium/drivers/vc4/vc4_qir.h index 9e61200ef64..90cc1385043 100644 --- a/src/gallium/drivers/vc4/vc4_qir.h +++ b/src/gallium/drivers/vc4/vc4_qir.h @@ -156,8 +156,18 @@ enum qop { */ QOP_TEX_RESULT, + /* 32-bit immediate loaded to each SIMD channel */ QOP_LOAD_IMM, + /* 32-bit immediate divided into 16 2-bit unsigned int values and + * loaded to each corresponding SIMD channel. + */ + QOP_LOAD_IMM_U2, + /* 32-bit immediate divided into 16 2-bit signed int values and + * loaded to each corresponding SIMD channel. + */ + QOP_LOAD_IMM_I2, + /* Jumps to block->successor[0] if the qinst->cond (as a * QPU_COND_BRANCH_*) passes, or block->successor[1] if not. Note * that block->successor[1] may be unset if the condition is ALWAYS. @@ -796,6 +806,22 @@ qir_LOAD_IMM(struct vc4_compile *c, uint32_t val) qir_reg(QFILE_LOAD_IMM, val), c->undef)); } +static inline struct qreg +qir_LOAD_IMM_U2(struct vc4_compile *c, uint32_t val) +{ + return qir_emit_def(c, qir_inst(QOP_LOAD_IMM_U2, c->undef, + qir_reg(QFILE_LOAD_IMM, val), + c->undef)); +} + +static inline struct qreg +qir_LOAD_IMM_I2(struct vc4_compile *c, uint32_t val) +{ + return qir_emit_def(c, qir_inst(QOP_LOAD_IMM_I2, c->undef, + qir_reg(QFILE_LOAD_IMM, val), + c->undef)); +} + static inline void qir_MOV_cond(struct vc4_compile *c, uint8_t cond, struct qreg dest, struct qreg src) -- cgit v1.2.3