From b2309393039b2ec0cc00a8e6fd828c60c4ef1e11 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Mon, 6 Feb 2017 17:30:59 -0800 Subject: vc4: Avoid emitting small immediates for UBO indirect load address guards. The kernel will reject our shader if we emit one here, and having 4, 8, or 12 as the top end of our UBO clamp rare is enough that it's not worth making the kernel let us. Fixes piglit fs-const-array-of-struct and fs-const-array-of-struct-of-array since recent GLSL linking changes made us get this as an indirect load of a uniform, instead of a tempoary. Cc: "13.0 17.0" --- src/gallium/drivers/vc4/vc4_program.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src/gallium/drivers/vc4/vc4_program.c') diff --git a/src/gallium/drivers/vc4/vc4_program.c b/src/gallium/drivers/vc4/vc4_program.c index a7cc6687962..4865bcbd283 100644 --- a/src/gallium/drivers/vc4/vc4_program.c +++ b/src/gallium/drivers/vc4/vc4_program.c @@ -116,9 +116,9 @@ indirect_uniform_load(struct vc4_compile *c, nir_intrinsic_instr *intr) /* Clamp to [0, array size). Note that MIN/MAX are signed. */ indirect_offset = qir_MAX(c, indirect_offset, qir_uniform_ui(c, 0)); - indirect_offset = qir_MIN(c, indirect_offset, - qir_uniform_ui(c, (range->dst_offset + - range->size - 4))); + indirect_offset = qir_MIN_NOIMM(c, indirect_offset, + qir_uniform_ui(c, (range->dst_offset + + range->size - 4))); qir_ADD_dest(c, qir_reg(QFILE_TEX_S_DIRECT, 0), indirect_offset, @@ -382,7 +382,7 @@ ntq_emit_txf(struct vc4_compile *c, nir_tex_instr *instr) /* Perform the clamping required by kernel validation. */ addr = qir_MAX(c, addr, qir_uniform_ui(c, 0)); - addr = qir_MIN(c, addr, qir_uniform_ui(c, size - 4)); + addr = qir_MIN_NOIMM(c, addr, qir_uniform_ui(c, size - 4)); qir_ADD_dest(c, qir_reg(QFILE_TEX_S_DIRECT, 0), addr, qir_uniform(c, QUNIFORM_TEXTURE_MSAA_ADDR, unit)); -- cgit v1.2.3