From 4f7fe2cf2cb16ac27ea0f6cc0da84ee2c64c3754 Mon Sep 17 00:00:00 2001
From: Tom Stellard <thomas.stellard@amd.com>
Date: Wed, 13 Mar 2013 12:59:33 -0400
Subject: radeonsi: Set TCL1_ACTION_ENA when invalidating the texture cache
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com
---
 src/gallium/drivers/radeonsi/radeonsi_pm4.c | 1 +
 1 file changed, 1 insertion(+)

(limited to 'src/gallium/drivers/radeonsi')

diff --git a/src/gallium/drivers/radeonsi/radeonsi_pm4.c b/src/gallium/drivers/radeonsi/radeonsi_pm4.c
index e7441fed82a..526f087bb90 100644
--- a/src/gallium/drivers/radeonsi/radeonsi_pm4.c
+++ b/src/gallium/drivers/radeonsi/radeonsi_pm4.c
@@ -137,6 +137,7 @@ void si_pm4_inval_shader_cache(struct si_pm4_state *state)
 void si_pm4_inval_texture_cache(struct si_pm4_state *state)
 {
 	state->cp_coher_cntl |= S_0085F0_TC_ACTION_ENA(1);
+	state->cp_coher_cntl |= S_0085F0_TCL1_ACTION_ENA(1);
 }
 
 void si_pm4_inval_fb_cache(struct si_pm4_state *state, unsigned nr_cbufs)
-- 
cgit v1.2.3