From 7d4a10a29f6f667f2a4a89ebc87df4c01ccb3597 Mon Sep 17 00:00:00 2001 From: Marek Olšák Date: Tue, 27 Aug 2019 20:29:11 -0400 Subject: ac/surface: add RADEON_SURF_NO_FMASK This controls FMASK and CMASK computation for MSAA. Acked-by: Pierre-Eric Pelloux-Prayer --- src/gallium/drivers/radeonsi/si_texture.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) (limited to 'src/gallium/drivers/radeonsi/si_texture.c') diff --git a/src/gallium/drivers/radeonsi/si_texture.c b/src/gallium/drivers/radeonsi/si_texture.c index 64fcd50f3a1..1f7cab6b2f3 100644 --- a/src/gallium/drivers/radeonsi/si_texture.c +++ b/src/gallium/drivers/radeonsi/si_texture.c @@ -315,6 +315,8 @@ static int si_init_surface(struct si_screen *sscreen, flags |= RADEON_SURF_IMPORTED | RADEON_SURF_SHAREABLE; if (!(ptex->flags & SI_RESOURCE_FLAG_FORCE_MSAA_TILING)) flags |= RADEON_SURF_OPTIMIZE_FOR_SPACE; + if (sscreen->debug_flags & DBG(NO_FMASK)) + flags |= RADEON_SURF_NO_FMASK; if (sscreen->info.chip_class >= GFX10 && (ptex->flags & SI_RESOURCE_FLAG_FORCE_MSAA_TILING)) { @@ -1369,9 +1371,7 @@ si_texture_create_object(struct pipe_screen *screen, si_texture_allocate_htile(sscreen, tex); } } else { - if (base->nr_samples > 1 && - !buf && - !(sscreen->debug_flags & DBG(NO_FMASK))) { + if (tex->surface.fmask_size) { /* Allocate FMASK. */ tex->fmask_offset = align64(tex->size, tex->surface.fmask_alignment); @@ -1382,9 +1382,6 @@ si_texture_create_object(struct pipe_screen *screen, tex->size = tex->cmask_offset + tex->surface.cmask_size; tex->cb_color_info |= S_028C70_FAST_CLEAR(1); tex->cmask_buffer = &tex->buffer; - - if (!tex->surface.fmask_size || !tex->surface.cmask_size) - goto error; } /* Shared textures must always set up DCC here. -- cgit v1.2.3