From 77bcbe712e5224043101bdfc19aee7038bc8b0ee Mon Sep 17 00:00:00 2001 From: Marek Olšák Date: Wed, 17 Oct 2018 12:26:54 -0400 Subject: radeonsi: clamp point size to the limit This fixes dEQP-GLES2.functional.rasterization.limits.points. Broken by: ea039f789d9b54e1bd1d644b6a29863ca3500314 Tested-by: Jakob Bornecrantz --- src/gallium/drivers/radeonsi/si_pipe.h | 1 + 1 file changed, 1 insertion(+) (limited to 'src/gallium/drivers/radeonsi/si_pipe.h') diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h index 6edc06cece7..dc95afb7421 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.h +++ b/src/gallium/drivers/radeonsi/si_pipe.h @@ -48,6 +48,7 @@ #define SI_BASE_VERTEX_UNKNOWN INT_MIN #define SI_RESTART_INDEX_UNKNOWN INT_MIN #define SI_NUM_SMOOTH_AA_SAMPLES 8 +#define SI_MAX_POINT_SIZE 2048 #define SI_GS_PER_ES 128 /* Alignment for optimal CP DMA performance. */ #define SI_CPDMA_ALIGNMENT 32 -- cgit v1.2.3